xref: /freebsd/sys/arm/broadcom/bcm2835/bcm2835_intr.c (revision 171af33c53f246e08da0ca776c842289a8948f08)
1 /*-
2  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
3  * All rights reserved.
4  *
5  * Based on OMAP3 INTC code by Ben Gray
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/ktr.h>
38 #include <sys/module.h>
39 #include <sys/rman.h>
40 #include <machine/bus.h>
41 #include <machine/intr.h>
42 
43 #include <dev/fdt/fdt_common.h>
44 #include <dev/ofw/openfirm.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 
48 #define	INTC_PENDING_BASIC	0x00
49 #define	INTC_PENDING_BANK1	0x04
50 #define	INTC_PENDING_BANK2	0x08
51 #define	INTC_FIQ_CONTROL	0x0C
52 #define	INTC_ENABLE_BANK1	0x10
53 #define	INTC_ENABLE_BANK2	0x14
54 #define	INTC_ENABLE_BASIC	0x18
55 #define	INTC_DISABLE_BANK1	0x1C
56 #define	INTC_DISABLE_BANK2	0x20
57 #define	INTC_DISABLE_BASIC	0x24
58 
59 #define	BANK1_START	8
60 #define	BANK1_END	(BANK1_START + 32 - 1)
61 #define	BANK2_START	(BANK1_START + 32)
62 #define	BANK2_END	(BANK2_START + 32 - 1)
63 #define	BANK3_START	(BANK2_START + 32)
64 
65 #define	IS_IRQ_BASIC(n)	(((n) >= 0) && ((n) < BANK1_START))
66 #define	IS_IRQ_BANK1(n)	(((n) >= BANK1_START) && ((n) <= BANK1_END))
67 #define	IS_IRQ_BANK2(n)	(((n) >= BANK2_START) && ((n) <= BANK2_END))
68 #define	IRQ_BANK1(n)	((n) - BANK1_START)
69 #define	IRQ_BANK2(n)	((n) - BANK2_START)
70 
71 #ifdef  DEBUG
72 #define dprintf(fmt, args...) printf(fmt, ##args)
73 #else
74 #define dprintf(fmt, args...)
75 #endif
76 
77 struct bcm_intc_softc {
78 	device_t		sc_dev;
79 	struct resource *	intc_res;
80 	bus_space_tag_t		intc_bst;
81 	bus_space_handle_t	intc_bsh;
82 };
83 
84 static struct bcm_intc_softc *bcm_intc_sc = NULL;
85 
86 #define	intc_read_4(_sc, reg)		\
87     bus_space_read_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg))
88 #define	intc_write_4(_sc, reg, val)		\
89     bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val))
90 
91 static int
92 bcm_intc_probe(device_t dev)
93 {
94 
95 	if (!ofw_bus_status_okay(dev))
96 		return (ENXIO);
97 
98 	if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-armctrl-ic"))
99 		return (ENXIO);
100 	device_set_desc(dev, "BCM2835 Interrupt Controller");
101 	return (BUS_PROBE_DEFAULT);
102 }
103 
104 static int
105 bcm_intc_attach(device_t dev)
106 {
107 	struct		bcm_intc_softc *sc = device_get_softc(dev);
108 	int		rid = 0;
109 
110 	sc->sc_dev = dev;
111 
112 	if (bcm_intc_sc)
113 		return (ENXIO);
114 
115 	sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
116 	if (sc->intc_res == NULL) {
117 		device_printf(dev, "could not allocate memory resource\n");
118 		return (ENXIO);
119 	}
120 
121 	sc->intc_bst = rman_get_bustag(sc->intc_res);
122 	sc->intc_bsh = rman_get_bushandle(sc->intc_res);
123 
124 	bcm_intc_sc = sc;
125 
126 	return (0);
127 }
128 
129 static device_method_t bcm_intc_methods[] = {
130 	DEVMETHOD(device_probe,		bcm_intc_probe),
131 	DEVMETHOD(device_attach,	bcm_intc_attach),
132 	{ 0, 0 }
133 };
134 
135 static driver_t bcm_intc_driver = {
136 	"intc",
137 	bcm_intc_methods,
138 	sizeof(struct bcm_intc_softc),
139 };
140 
141 static devclass_t bcm_intc_devclass;
142 
143 DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0);
144 
145 int
146 arm_get_next_irq(int last_irq)
147 {
148 	struct bcm_intc_softc *sc = bcm_intc_sc;
149 	uint32_t pending;
150 	int32_t irq = last_irq + 1;
151 
152 	/* Sanity check */
153 	if (irq < 0)
154 		irq = 0;
155 
156 	/* TODO: should we mask last_irq? */
157 	if (irq < BANK1_START) {
158 		pending = intc_read_4(sc, INTC_PENDING_BASIC);
159 		if ((pending & 0xFF) == 0) {
160 			irq  = BANK1_START;	/* skip to next bank */
161 		} else do {
162 			if (pending & (1 << irq))
163 				return irq;
164 			irq++;
165 		} while (irq < BANK1_START);
166 	}
167 	if (irq < BANK2_START) {
168 		pending = intc_read_4(sc, INTC_PENDING_BANK1);
169 		if (pending == 0) {
170 			irq  = BANK2_START;	/* skip to next bank */
171 		} else do {
172 			if (pending & (1 << IRQ_BANK1(irq)))
173 				return irq;
174 			irq++;
175 		} while (irq < BANK2_START);
176 	}
177 	if (irq < BANK3_START) {
178 		pending = intc_read_4(sc, INTC_PENDING_BANK2);
179 		if (pending != 0) do {
180 			if (pending & (1 << IRQ_BANK2(irq)))
181 				return irq;
182 			irq++;
183 		} while (irq < BANK3_START);
184 	}
185 	return (-1);
186 }
187 
188 void
189 arm_mask_irq(uintptr_t nb)
190 {
191 	struct bcm_intc_softc *sc = bcm_intc_sc;
192 	dprintf("%s: %d\n", __func__, nb);
193 
194 	if (IS_IRQ_BASIC(nb))
195 		intc_write_4(sc, INTC_DISABLE_BASIC, (1 << nb));
196 	else if (IS_IRQ_BANK1(nb))
197 		intc_write_4(sc, INTC_DISABLE_BANK1, (1 << IRQ_BANK1(nb)));
198 	else if (IS_IRQ_BANK2(nb))
199 		intc_write_4(sc, INTC_DISABLE_BANK2, (1 << IRQ_BANK2(nb)));
200 	else
201 		printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
202 }
203 
204 void
205 arm_unmask_irq(uintptr_t nb)
206 {
207 	struct bcm_intc_softc *sc = bcm_intc_sc;
208 	dprintf("%s: %d\n", __func__, nb);
209 
210 	if (IS_IRQ_BASIC(nb))
211 		intc_write_4(sc, INTC_ENABLE_BASIC, (1 << nb));
212 	else if (IS_IRQ_BANK1(nb))
213 		intc_write_4(sc, INTC_ENABLE_BANK1, (1 << IRQ_BANK1(nb)));
214 	else if (IS_IRQ_BANK2(nb))
215 		intc_write_4(sc, INTC_ENABLE_BANK2, (1 << IRQ_BANK2(nb)));
216 	else
217 		printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
218 }
219