xref: /freebsd/sys/arm/broadcom/bcm2835/bcm2835_intr.c (revision 145992504973bd16cf3518af9ba5ce185fefa82a)
1 /*-
2  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
3  * All rights reserved.
4  *
5  * Based on OMAP3 INTC code by Ben Gray
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/ktr.h>
38 #include <sys/module.h>
39 #include <sys/rman.h>
40 #include <machine/bus.h>
41 #include <machine/intr.h>
42 
43 #include <dev/fdt/fdt_common.h>
44 #include <dev/ofw/openfirm.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 
48 #define	INTC_PENDING_BASIC	0x00
49 #define	INTC_PENDING_BANK1	0x04
50 #define	INTC_PENDING_BANK2	0x08
51 #define	INTC_FIQ_CONTROL	0x0C
52 #define	INTC_ENABLE_BANK1	0x10
53 #define	INTC_ENABLE_BANK2	0x14
54 #define	INTC_ENABLE_BASIC	0x18
55 #define	INTC_DISABLE_BANK1	0x1C
56 #define	INTC_DISABLE_BANK2	0x20
57 #define	INTC_DISABLE_BASIC	0x24
58 
59 #define	BANK1_START	8
60 #define	BANK1_END	(BANK1_START + 32 - 1)
61 #define	BANK2_START	(BANK1_START + 32)
62 #define	BANK2_END	(BANK2_START + 32 - 1)
63 
64 #define	IS_IRQ_BASIC(n)	(((n) >= 0) && ((n) < BANK1_START))
65 #define	IS_IRQ_BANK1(n)	(((n) >= BANK1_START) && ((n) <= BANK1_END))
66 #define	IS_IRQ_BANK2(n)	(((n) >= BANK2_START) && ((n) <= BANK2_END))
67 #define	IRQ_BANK1(n)	((n) - BANK1_START)
68 #define	IRQ_BANK2(n)	((n) - BANK2_START)
69 
70 #ifdef  DEBUG
71 #define dprintf(fmt, args...) printf(fmt, ##args)
72 #else
73 #define dprintf(fmt, args...)
74 #endif
75 
76 struct bcm_intc_softc {
77 	device_t		sc_dev;
78 	struct resource *	intc_res;
79 	bus_space_tag_t		intc_bst;
80 	bus_space_handle_t	intc_bsh;
81 };
82 
83 static struct bcm_intc_softc *bcm_intc_sc = NULL;
84 
85 #define	intc_read_4(reg)		\
86     bus_space_read_4(bcm_intc_sc->intc_bst, bcm_intc_sc->intc_bsh, reg)
87 #define	intc_write_4(reg, val)		\
88     bus_space_write_4(bcm_intc_sc->intc_bst, bcm_intc_sc->intc_bsh, reg, val)
89 
90 static int
91 bcm_intc_probe(device_t dev)
92 {
93 	if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-armctrl-ic"))
94 		return (ENXIO);
95 	device_set_desc(dev, "BCM2835 Interrupt Controller");
96 	return (BUS_PROBE_DEFAULT);
97 }
98 
99 static int
100 bcm_intc_attach(device_t dev)
101 {
102 	struct		bcm_intc_softc *sc = device_get_softc(dev);
103 	int		rid = 0;
104 
105 	sc->sc_dev = dev;
106 
107 	if (bcm_intc_sc)
108 		return (ENXIO);
109 
110 	sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
111 	if (sc->intc_res == NULL) {
112 		device_printf(dev, "could not allocate memory resource\n");
113 		return (ENXIO);
114 	}
115 
116 	sc->intc_bst = rman_get_bustag(sc->intc_res);
117 	sc->intc_bsh = rman_get_bushandle(sc->intc_res);
118 
119 	bcm_intc_sc = sc;
120 
121 	return (0);
122 }
123 
124 static device_method_t bcm_intc_methods[] = {
125 	DEVMETHOD(device_probe,		bcm_intc_probe),
126 	DEVMETHOD(device_attach,	bcm_intc_attach),
127 	{ 0, 0 }
128 };
129 
130 static driver_t bcm_intc_driver = {
131 	"intc",
132 	bcm_intc_methods,
133 	sizeof(struct bcm_intc_softc),
134 };
135 
136 static devclass_t bcm_intc_devclass;
137 
138 DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0);
139 
140 int
141 arm_get_next_irq(int last_irq)
142 {
143 	uint32_t pending;
144 	int32_t irq = last_irq + 1;
145 
146 	/* Sanity check */
147 	if (irq < 0)
148 		irq = 0;
149 
150 	/* TODO: should we mask last_irq? */
151 	pending = intc_read_4(INTC_PENDING_BASIC);
152 	while (irq < BANK1_START) {
153 		if (pending & (1 << irq))
154 			return irq;
155 		irq++;
156 	}
157 
158 	pending = intc_read_4(INTC_PENDING_BANK1);
159 	while (irq < BANK2_START) {
160 		if (pending & (1 << IRQ_BANK1(irq)))
161 			return irq;
162 		irq++;
163 	}
164 
165 	pending = intc_read_4(INTC_PENDING_BANK2);
166 	while (irq <= BANK2_END) {
167 		if (pending & (1 << IRQ_BANK2(irq)))
168 			return irq;
169 		irq++;
170 	}
171 
172 	return (-1);
173 }
174 
175 void
176 arm_mask_irq(uintptr_t nb)
177 {
178 	dprintf("%s: %d\n", __func__, nb);
179 
180 	if (IS_IRQ_BASIC(nb))
181 		intc_write_4(INTC_DISABLE_BASIC, (1 << nb));
182 	else if (IS_IRQ_BANK1(nb))
183 		intc_write_4(INTC_DISABLE_BANK1, (1 << IRQ_BANK1(nb)));
184 	else if (IS_IRQ_BANK2(nb))
185 		intc_write_4(INTC_DISABLE_BANK2, (1 << IRQ_BANK2(nb)));
186 	else
187 		printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
188 }
189 
190 void
191 arm_unmask_irq(uintptr_t nb)
192 {
193 	dprintf("%s: %d\n", __func__, nb);
194 
195 	if (IS_IRQ_BASIC(nb))
196 		intc_write_4(INTC_ENABLE_BASIC, (1 << nb));
197 	else if (IS_IRQ_BANK1(nb))
198 		intc_write_4(INTC_ENABLE_BANK1, (1 << IRQ_BANK1(nb)));
199 	else if (IS_IRQ_BANK2(nb))
200 		intc_write_4(INTC_ENABLE_BANK2, (1 << IRQ_BANK2(nb)));
201 	else
202 		printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
203 }
204