1 /*- 2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * Copyright (c) 2012 Luiz Otavio O Souza. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bus.h> 34 #include <sys/gpio.h> 35 #include <sys/interrupt.h> 36 #include <sys/kernel.h> 37 #include <sys/lock.h> 38 #include <sys/module.h> 39 #include <sys/mutex.h> 40 #include <sys/rman.h> 41 #include <sys/sysctl.h> 42 43 #include <machine/bus.h> 44 45 #include <dev/gpio/gpiobusvar.h> 46 #include <dev/ofw/ofw_bus.h> 47 48 #include <arm/broadcom/bcm2835/bcm2835_gpio.h> 49 50 #include "gpio_if.h" 51 52 #ifdef DEBUG 53 #define dprintf(fmt, args...) do { printf("%s(): ", __func__); \ 54 printf(fmt,##args); } while (0) 55 #else 56 #define dprintf(fmt, args...) 57 #endif 58 59 #define BCM_GPIO_IRQS 4 60 #define BCM_GPIO_PINS 54 61 #define BCM_GPIO_PINS_PER_BANK 32 62 #define BCM_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \ 63 GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN) 64 65 static struct resource_spec bcm_gpio_res_spec[] = { 66 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 67 { SYS_RES_IRQ, 0, RF_ACTIVE }, 68 { SYS_RES_IRQ, 1, RF_ACTIVE }, 69 { SYS_RES_IRQ, 2, RF_ACTIVE }, 70 { SYS_RES_IRQ, 3, RF_ACTIVE }, 71 { -1, 0, 0 } 72 }; 73 74 struct bcm_gpio_sysctl { 75 struct bcm_gpio_softc *sc; 76 uint32_t pin; 77 }; 78 79 struct bcm_gpio_softc { 80 device_t sc_dev; 81 device_t sc_busdev; 82 struct mtx sc_mtx; 83 struct resource * sc_res[BCM_GPIO_IRQS + 1]; 84 bus_space_tag_t sc_bst; 85 bus_space_handle_t sc_bsh; 86 void * sc_intrhand[BCM_GPIO_IRQS]; 87 int sc_gpio_npins; 88 int sc_ro_npins; 89 int sc_ro_pins[BCM_GPIO_PINS]; 90 struct gpio_pin sc_gpio_pins[BCM_GPIO_PINS]; 91 struct intr_event * sc_events[BCM_GPIO_PINS]; 92 struct bcm_gpio_sysctl sc_sysctl[BCM_GPIO_PINS]; 93 enum intr_trigger sc_irq_trigger[BCM_GPIO_PINS]; 94 enum intr_polarity sc_irq_polarity[BCM_GPIO_PINS]; 95 }; 96 97 enum bcm_gpio_pud { 98 BCM_GPIO_NONE, 99 BCM_GPIO_PULLDOWN, 100 BCM_GPIO_PULLUP, 101 }; 102 103 #define BCM_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx) 104 #define BCM_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx) 105 #define BCM_GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 106 #define BCM_GPIO_WRITE(_sc, _off, _val) \ 107 bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _off, _val) 108 #define BCM_GPIO_READ(_sc, _off) \ 109 bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, _off) 110 #define BCM_GPIO_CLEAR_BITS(_sc, _off, _bits) \ 111 BCM_GPIO_WRITE(_sc, _off, BCM_GPIO_READ(_sc, _off) & ~(_bits)) 112 #define BCM_GPIO_SET_BITS(_sc, _off, _bits) \ 113 BCM_GPIO_WRITE(_sc, _off, BCM_GPIO_READ(_sc, _off) | _bits) 114 #define BCM_GPIO_BANK(a) (a / BCM_GPIO_PINS_PER_BANK) 115 #define BCM_GPIO_MASK(a) (1U << (a % BCM_GPIO_PINS_PER_BANK)) 116 117 #define BCM_GPIO_GPFSEL(_bank) (0x00 + _bank * 4) /* Function Select */ 118 #define BCM_GPIO_GPSET(_bank) (0x1c + _bank * 4) /* Pin Out Set */ 119 #define BCM_GPIO_GPCLR(_bank) (0x28 + _bank * 4) /* Pin Out Clear */ 120 #define BCM_GPIO_GPLEV(_bank) (0x34 + _bank * 4) /* Pin Level */ 121 #define BCM_GPIO_GPEDS(_bank) (0x40 + _bank * 4) /* Event Status */ 122 #define BCM_GPIO_GPREN(_bank) (0x4c + _bank * 4) /* Rising Edge irq */ 123 #define BCM_GPIO_GPFEN(_bank) (0x58 + _bank * 4) /* Falling Edge irq */ 124 #define BCM_GPIO_GPHEN(_bank) (0x64 + _bank * 4) /* High Level irq */ 125 #define BCM_GPIO_GPLEN(_bank) (0x70 + _bank * 4) /* Low Level irq */ 126 #define BCM_GPIO_GPAREN(_bank) (0x7c + _bank * 4) /* Async Rising Edge */ 127 #define BCM_GPIO_GPAFEN(_bank) (0x88 + _bank * 4) /* Async Falling Egde */ 128 #define BCM_GPIO_GPPUD(_bank) (0x94) /* Pin Pull up/down */ 129 #define BCM_GPIO_GPPUDCLK(_bank) (0x98 + _bank * 4) /* Pin Pull up clock */ 130 131 static struct bcm_gpio_softc *bcm_gpio_sc = NULL; 132 133 static int 134 bcm_gpio_pin_is_ro(struct bcm_gpio_softc *sc, int pin) 135 { 136 int i; 137 138 for (i = 0; i < sc->sc_ro_npins; i++) 139 if (pin == sc->sc_ro_pins[i]) 140 return (1); 141 return (0); 142 } 143 144 static uint32_t 145 bcm_gpio_get_function(struct bcm_gpio_softc *sc, uint32_t pin) 146 { 147 uint32_t bank, func, offset; 148 149 /* Five banks, 10 pins per bank, 3 bits per pin. */ 150 bank = pin / 10; 151 offset = (pin - bank * 10) * 3; 152 153 BCM_GPIO_LOCK(sc); 154 func = (BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)) >> offset) & 7; 155 BCM_GPIO_UNLOCK(sc); 156 157 return (func); 158 } 159 160 static void 161 bcm_gpio_func_str(uint32_t nfunc, char *buf, int bufsize) 162 { 163 164 switch (nfunc) { 165 case BCM_GPIO_INPUT: 166 strncpy(buf, "input", bufsize); 167 break; 168 case BCM_GPIO_OUTPUT: 169 strncpy(buf, "output", bufsize); 170 break; 171 case BCM_GPIO_ALT0: 172 strncpy(buf, "alt0", bufsize); 173 break; 174 case BCM_GPIO_ALT1: 175 strncpy(buf, "alt1", bufsize); 176 break; 177 case BCM_GPIO_ALT2: 178 strncpy(buf, "alt2", bufsize); 179 break; 180 case BCM_GPIO_ALT3: 181 strncpy(buf, "alt3", bufsize); 182 break; 183 case BCM_GPIO_ALT4: 184 strncpy(buf, "alt4", bufsize); 185 break; 186 case BCM_GPIO_ALT5: 187 strncpy(buf, "alt5", bufsize); 188 break; 189 default: 190 strncpy(buf, "invalid", bufsize); 191 } 192 } 193 194 static int 195 bcm_gpio_str_func(char *func, uint32_t *nfunc) 196 { 197 198 if (strcasecmp(func, "input") == 0) 199 *nfunc = BCM_GPIO_INPUT; 200 else if (strcasecmp(func, "output") == 0) 201 *nfunc = BCM_GPIO_OUTPUT; 202 else if (strcasecmp(func, "alt0") == 0) 203 *nfunc = BCM_GPIO_ALT0; 204 else if (strcasecmp(func, "alt1") == 0) 205 *nfunc = BCM_GPIO_ALT1; 206 else if (strcasecmp(func, "alt2") == 0) 207 *nfunc = BCM_GPIO_ALT2; 208 else if (strcasecmp(func, "alt3") == 0) 209 *nfunc = BCM_GPIO_ALT3; 210 else if (strcasecmp(func, "alt4") == 0) 211 *nfunc = BCM_GPIO_ALT4; 212 else if (strcasecmp(func, "alt5") == 0) 213 *nfunc = BCM_GPIO_ALT5; 214 else 215 return (-1); 216 217 return (0); 218 } 219 220 static uint32_t 221 bcm_gpio_func_flag(uint32_t nfunc) 222 { 223 224 switch (nfunc) { 225 case BCM_GPIO_INPUT: 226 return (GPIO_PIN_INPUT); 227 case BCM_GPIO_OUTPUT: 228 return (GPIO_PIN_OUTPUT); 229 } 230 return (0); 231 } 232 233 static void 234 bcm_gpio_set_function(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t f) 235 { 236 uint32_t bank, data, offset; 237 238 /* Must be called with lock held. */ 239 BCM_GPIO_LOCK_ASSERT(sc); 240 241 /* Five banks, 10 pins per bank, 3 bits per pin. */ 242 bank = pin / 10; 243 offset = (pin - bank * 10) * 3; 244 245 data = BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)); 246 data &= ~(7 << offset); 247 data |= (f << offset); 248 BCM_GPIO_WRITE(sc, BCM_GPIO_GPFSEL(bank), data); 249 } 250 251 static void 252 bcm_gpio_set_pud(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t state) 253 { 254 uint32_t bank, offset; 255 256 /* Must be called with lock held. */ 257 BCM_GPIO_LOCK_ASSERT(sc); 258 259 bank = pin / 32; 260 offset = pin - 32 * bank; 261 262 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), state); 263 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), (1 << offset)); 264 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), 0); 265 BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0); 266 } 267 268 void 269 bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc) 270 { 271 struct bcm_gpio_softc *sc; 272 int i; 273 274 sc = device_get_softc(dev); 275 BCM_GPIO_LOCK(sc); 276 277 /* Disable pull-up or pull-down on pin. */ 278 bcm_gpio_set_pud(sc, pin, BCM_GPIO_NONE); 279 280 /* And now set the pin function. */ 281 bcm_gpio_set_function(sc, pin, nfunc); 282 283 /* Update the pin flags. */ 284 for (i = 0; i < sc->sc_gpio_npins; i++) { 285 if (sc->sc_gpio_pins[i].gp_pin == pin) 286 break; 287 } 288 if (i < sc->sc_gpio_npins) 289 sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc); 290 291 BCM_GPIO_UNLOCK(sc); 292 } 293 294 static void 295 bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin, 296 unsigned int flags) 297 { 298 299 BCM_GPIO_LOCK(sc); 300 301 /* 302 * Manage input/output. 303 */ 304 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { 305 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); 306 if (flags & GPIO_PIN_OUTPUT) { 307 pin->gp_flags |= GPIO_PIN_OUTPUT; 308 bcm_gpio_set_function(sc, pin->gp_pin, 309 BCM_GPIO_OUTPUT); 310 } else { 311 pin->gp_flags |= GPIO_PIN_INPUT; 312 bcm_gpio_set_function(sc, pin->gp_pin, 313 BCM_GPIO_INPUT); 314 } 315 } 316 317 /* Manage Pull-up/pull-down. */ 318 pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN); 319 if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) { 320 if (flags & GPIO_PIN_PULLUP) { 321 pin->gp_flags |= GPIO_PIN_PULLUP; 322 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLUP); 323 } else { 324 pin->gp_flags |= GPIO_PIN_PULLDOWN; 325 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLDOWN); 326 } 327 } else 328 bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_NONE); 329 330 BCM_GPIO_UNLOCK(sc); 331 } 332 333 static device_t 334 bcm_gpio_get_bus(device_t dev) 335 { 336 struct bcm_gpio_softc *sc; 337 338 sc = device_get_softc(dev); 339 340 return (sc->sc_busdev); 341 } 342 343 static int 344 bcm_gpio_pin_max(device_t dev, int *maxpin) 345 { 346 347 *maxpin = BCM_GPIO_PINS - 1; 348 return (0); 349 } 350 351 static int 352 bcm_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 353 { 354 struct bcm_gpio_softc *sc = device_get_softc(dev); 355 int i; 356 357 for (i = 0; i < sc->sc_gpio_npins; i++) { 358 if (sc->sc_gpio_pins[i].gp_pin == pin) 359 break; 360 } 361 362 if (i >= sc->sc_gpio_npins) 363 return (EINVAL); 364 365 BCM_GPIO_LOCK(sc); 366 *caps = sc->sc_gpio_pins[i].gp_caps; 367 BCM_GPIO_UNLOCK(sc); 368 369 return (0); 370 } 371 372 static int 373 bcm_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 374 { 375 struct bcm_gpio_softc *sc = device_get_softc(dev); 376 int i; 377 378 for (i = 0; i < sc->sc_gpio_npins; i++) { 379 if (sc->sc_gpio_pins[i].gp_pin == pin) 380 break; 381 } 382 383 if (i >= sc->sc_gpio_npins) 384 return (EINVAL); 385 386 BCM_GPIO_LOCK(sc); 387 *flags = sc->sc_gpio_pins[i].gp_flags; 388 BCM_GPIO_UNLOCK(sc); 389 390 return (0); 391 } 392 393 static int 394 bcm_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 395 { 396 struct bcm_gpio_softc *sc = device_get_softc(dev); 397 int i; 398 399 for (i = 0; i < sc->sc_gpio_npins; i++) { 400 if (sc->sc_gpio_pins[i].gp_pin == pin) 401 break; 402 } 403 404 if (i >= sc->sc_gpio_npins) 405 return (EINVAL); 406 407 BCM_GPIO_LOCK(sc); 408 memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME); 409 BCM_GPIO_UNLOCK(sc); 410 411 return (0); 412 } 413 414 static int 415 bcm_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 416 { 417 struct bcm_gpio_softc *sc = device_get_softc(dev); 418 int i; 419 420 for (i = 0; i < sc->sc_gpio_npins; i++) { 421 if (sc->sc_gpio_pins[i].gp_pin == pin) 422 break; 423 } 424 425 if (i >= sc->sc_gpio_npins) 426 return (EINVAL); 427 428 /* We never touch on read-only/reserved pins. */ 429 if (bcm_gpio_pin_is_ro(sc, pin)) 430 return (EINVAL); 431 432 bcm_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags); 433 434 return (0); 435 } 436 437 static int 438 bcm_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) 439 { 440 struct bcm_gpio_softc *sc = device_get_softc(dev); 441 uint32_t bank, offset; 442 int i; 443 444 for (i = 0; i < sc->sc_gpio_npins; i++) { 445 if (sc->sc_gpio_pins[i].gp_pin == pin) 446 break; 447 } 448 449 if (i >= sc->sc_gpio_npins) 450 return (EINVAL); 451 452 /* We never write to read-only/reserved pins. */ 453 if (bcm_gpio_pin_is_ro(sc, pin)) 454 return (EINVAL); 455 456 bank = pin / 32; 457 offset = pin - 32 * bank; 458 459 BCM_GPIO_LOCK(sc); 460 if (value) 461 BCM_GPIO_WRITE(sc, BCM_GPIO_GPSET(bank), (1 << offset)); 462 else 463 BCM_GPIO_WRITE(sc, BCM_GPIO_GPCLR(bank), (1 << offset)); 464 BCM_GPIO_UNLOCK(sc); 465 466 return (0); 467 } 468 469 static int 470 bcm_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 471 { 472 struct bcm_gpio_softc *sc = device_get_softc(dev); 473 uint32_t bank, offset, reg_data; 474 int i; 475 476 for (i = 0; i < sc->sc_gpio_npins; i++) { 477 if (sc->sc_gpio_pins[i].gp_pin == pin) 478 break; 479 } 480 481 if (i >= sc->sc_gpio_npins) 482 return (EINVAL); 483 484 bank = pin / 32; 485 offset = pin - 32 * bank; 486 487 BCM_GPIO_LOCK(sc); 488 reg_data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank)); 489 BCM_GPIO_UNLOCK(sc); 490 *val = (reg_data & (1 << offset)) ? 1 : 0; 491 492 return (0); 493 } 494 495 static int 496 bcm_gpio_pin_toggle(device_t dev, uint32_t pin) 497 { 498 struct bcm_gpio_softc *sc = device_get_softc(dev); 499 uint32_t bank, data, offset; 500 int i; 501 502 for (i = 0; i < sc->sc_gpio_npins; i++) { 503 if (sc->sc_gpio_pins[i].gp_pin == pin) 504 break; 505 } 506 507 if (i >= sc->sc_gpio_npins) 508 return (EINVAL); 509 510 /* We never write to read-only/reserved pins. */ 511 if (bcm_gpio_pin_is_ro(sc, pin)) 512 return (EINVAL); 513 514 bank = pin / 32; 515 offset = pin - 32 * bank; 516 517 BCM_GPIO_LOCK(sc); 518 data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank)); 519 if (data & (1 << offset)) 520 BCM_GPIO_WRITE(sc, BCM_GPIO_GPCLR(bank), (1 << offset)); 521 else 522 BCM_GPIO_WRITE(sc, BCM_GPIO_GPSET(bank), (1 << offset)); 523 BCM_GPIO_UNLOCK(sc); 524 525 return (0); 526 } 527 528 static int 529 bcm_gpio_func_proc(SYSCTL_HANDLER_ARGS) 530 { 531 char buf[16]; 532 struct bcm_gpio_softc *sc; 533 struct bcm_gpio_sysctl *sc_sysctl; 534 uint32_t nfunc; 535 int error; 536 537 sc_sysctl = arg1; 538 sc = sc_sysctl->sc; 539 540 /* Get the current pin function. */ 541 nfunc = bcm_gpio_get_function(sc, sc_sysctl->pin); 542 bcm_gpio_func_str(nfunc, buf, sizeof(buf)); 543 544 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 545 if (error != 0 || req->newptr == NULL) 546 return (error); 547 /* Ignore changes on read-only pins. */ 548 if (bcm_gpio_pin_is_ro(sc, sc_sysctl->pin)) 549 return (0); 550 /* Parse the user supplied string and check for a valid pin function. */ 551 if (bcm_gpio_str_func(buf, &nfunc) != 0) 552 return (EINVAL); 553 554 /* Update the pin alternate function. */ 555 bcm_gpio_set_alternate(sc->sc_dev, sc_sysctl->pin, nfunc); 556 557 return (0); 558 } 559 560 static void 561 bcm_gpio_sysctl_init(struct bcm_gpio_softc *sc) 562 { 563 char pinbuf[3]; 564 struct bcm_gpio_sysctl *sc_sysctl; 565 struct sysctl_ctx_list *ctx; 566 struct sysctl_oid *tree_node, *pin_node, *pinN_node; 567 struct sysctl_oid_list *tree, *pin_tree, *pinN_tree; 568 int i; 569 570 /* 571 * Add per-pin sysctl tree/handlers. 572 */ 573 ctx = device_get_sysctl_ctx(sc->sc_dev); 574 tree_node = device_get_sysctl_tree(sc->sc_dev); 575 tree = SYSCTL_CHILDREN(tree_node); 576 pin_node = SYSCTL_ADD_NODE(ctx, tree, OID_AUTO, "pin", 577 CTLFLAG_RD, NULL, "GPIO Pins"); 578 pin_tree = SYSCTL_CHILDREN(pin_node); 579 580 for (i = 0; i < sc->sc_gpio_npins; i++) { 581 582 snprintf(pinbuf, sizeof(pinbuf), "%d", i); 583 pinN_node = SYSCTL_ADD_NODE(ctx, pin_tree, OID_AUTO, pinbuf, 584 CTLFLAG_RD, NULL, "GPIO Pin"); 585 pinN_tree = SYSCTL_CHILDREN(pinN_node); 586 587 sc->sc_sysctl[i].sc = sc; 588 sc_sysctl = &sc->sc_sysctl[i]; 589 sc_sysctl->sc = sc; 590 sc_sysctl->pin = sc->sc_gpio_pins[i].gp_pin; 591 SYSCTL_ADD_PROC(ctx, pinN_tree, OID_AUTO, "function", 592 CTLFLAG_RW | CTLTYPE_STRING, sc_sysctl, 593 sizeof(struct bcm_gpio_sysctl), bcm_gpio_func_proc, 594 "A", "Pin Function"); 595 } 596 } 597 598 static int 599 bcm_gpio_get_ro_pins(struct bcm_gpio_softc *sc, phandle_t node, 600 const char *propname, const char *label) 601 { 602 int i, need_comma, npins, range_start, range_stop; 603 pcell_t *pins; 604 605 /* Get the property data. */ 606 npins = OF_getencprop_alloc(node, propname, sizeof(*pins), 607 (void **)&pins); 608 if (npins < 0) 609 return (-1); 610 if (npins == 0) { 611 free(pins, M_OFWPROP); 612 return (0); 613 } 614 for (i = 0; i < npins; i++) 615 sc->sc_ro_pins[i + sc->sc_ro_npins] = pins[i]; 616 sc->sc_ro_npins += npins; 617 need_comma = 0; 618 device_printf(sc->sc_dev, "%s pins: ", label); 619 range_start = range_stop = pins[0]; 620 for (i = 1; i < npins; i++) { 621 if (pins[i] != range_stop + 1) { 622 if (need_comma) 623 printf(","); 624 if (range_start != range_stop) 625 printf("%d-%d", range_start, range_stop); 626 else 627 printf("%d", range_start); 628 range_start = range_stop = pins[i]; 629 need_comma = 1; 630 } else 631 range_stop++; 632 } 633 if (need_comma) 634 printf(","); 635 if (range_start != range_stop) 636 printf("%d-%d.\n", range_start, range_stop); 637 else 638 printf("%d.\n", range_start); 639 free(pins, M_OFWPROP); 640 641 return (0); 642 } 643 644 static int 645 bcm_gpio_get_reserved_pins(struct bcm_gpio_softc *sc) 646 { 647 char *name; 648 phandle_t gpio, node, reserved; 649 ssize_t len; 650 651 /* Get read-only pins. */ 652 gpio = ofw_bus_get_node(sc->sc_dev); 653 if (bcm_gpio_get_ro_pins(sc, gpio, "broadcom,read-only", 654 "read-only") != 0) 655 return (-1); 656 /* Traverse the GPIO subnodes to find the reserved pins node. */ 657 reserved = 0; 658 node = OF_child(gpio); 659 while ((node != 0) && (reserved == 0)) { 660 len = OF_getprop_alloc(node, "name", 1, (void **)&name); 661 if (len == -1) 662 return (-1); 663 if (strcmp(name, "reserved") == 0) 664 reserved = node; 665 free(name, M_OFWPROP); 666 node = OF_peer(node); 667 } 668 if (reserved == 0) 669 return (-1); 670 /* Get the reserved pins. */ 671 if (bcm_gpio_get_ro_pins(sc, reserved, "broadcom,pins", 672 "reserved") != 0) 673 return (-1); 674 675 return (0); 676 } 677 678 static int 679 bcm_gpio_intr(void *arg) 680 { 681 int bank_last, irq; 682 struct bcm_gpio_softc *sc; 683 struct intr_event *event; 684 uint32_t bank, mask, reg; 685 686 sc = (struct bcm_gpio_softc *)arg; 687 reg = 0; 688 bank_last = -1; 689 for (irq = 0; irq < BCM_GPIO_PINS; irq++) { 690 bank = BCM_GPIO_BANK(irq); 691 mask = BCM_GPIO_MASK(irq); 692 if (bank != bank_last) { 693 reg = BCM_GPIO_READ(sc, BCM_GPIO_GPEDS(bank)); 694 bank_last = bank; 695 } 696 if (reg & mask) { 697 event = sc->sc_events[irq]; 698 if (event != NULL && !TAILQ_EMPTY(&event->ie_handlers)) 699 intr_event_handle(event, NULL); 700 else { 701 device_printf(sc->sc_dev, "Stray IRQ %d\n", 702 irq); 703 } 704 /* Clear the Status bit by writing '1' to it. */ 705 BCM_GPIO_WRITE(sc, BCM_GPIO_GPEDS(bank), mask); 706 } 707 } 708 709 return (FILTER_HANDLED); 710 } 711 712 static int 713 bcm_gpio_probe(device_t dev) 714 { 715 716 if (!ofw_bus_status_okay(dev)) 717 return (ENXIO); 718 719 if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-gpio")) 720 return (ENXIO); 721 722 device_set_desc(dev, "BCM2708/2835 GPIO controller"); 723 return (BUS_PROBE_DEFAULT); 724 } 725 726 static int 727 bcm_gpio_intr_attach(device_t dev) 728 { 729 struct bcm_gpio_softc *sc; 730 int i; 731 732 sc = device_get_softc(dev); 733 for (i = 0; i < BCM_GPIO_IRQS; i++) { 734 if (bus_setup_intr(dev, sc->sc_res[i + 1], 735 INTR_TYPE_MISC | INTR_MPSAFE, bcm_gpio_intr, 736 NULL, sc, &sc->sc_intrhand[i]) != 0) { 737 return (-1); 738 } 739 } 740 741 return (0); 742 } 743 744 static void 745 bcm_gpio_intr_detach(device_t dev) 746 { 747 struct bcm_gpio_softc *sc; 748 int i; 749 750 sc = device_get_softc(dev); 751 for (i = 0; i < BCM_GPIO_IRQS; i++) { 752 if (sc->sc_intrhand[i]) { 753 bus_teardown_intr(dev, sc->sc_res[i + 1], 754 sc->sc_intrhand[i]); 755 } 756 } 757 } 758 759 static int 760 bcm_gpio_attach(device_t dev) 761 { 762 int i, j; 763 phandle_t gpio; 764 struct bcm_gpio_softc *sc; 765 uint32_t func; 766 767 if (bcm_gpio_sc != NULL) 768 return (ENXIO); 769 770 bcm_gpio_sc = sc = device_get_softc(dev); 771 sc->sc_dev = dev; 772 mtx_init(&sc->sc_mtx, "bcm gpio", "gpio", MTX_SPIN); 773 if (bus_alloc_resources(dev, bcm_gpio_res_spec, sc->sc_res) != 0) { 774 device_printf(dev, "cannot allocate resources\n"); 775 goto fail; 776 } 777 sc->sc_bst = rman_get_bustag(sc->sc_res[0]); 778 sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); 779 /* Setup the GPIO interrupt handler. */ 780 if (bcm_gpio_intr_attach(dev)) { 781 device_printf(dev, "unable to setup the gpio irq handler\n"); 782 goto fail; 783 } 784 /* Find our node. */ 785 gpio = ofw_bus_get_node(sc->sc_dev); 786 if (!OF_hasprop(gpio, "gpio-controller")) 787 /* Node is not a GPIO controller. */ 788 goto fail; 789 /* 790 * Find the read-only pins. These are pins we never touch or bad 791 * things could happen. 792 */ 793 if (bcm_gpio_get_reserved_pins(sc) == -1) 794 goto fail; 795 /* Initialize the software controlled pins. */ 796 for (i = 0, j = 0; j < BCM_GPIO_PINS; j++) { 797 snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME, 798 "pin %d", j); 799 func = bcm_gpio_get_function(sc, j); 800 sc->sc_gpio_pins[i].gp_pin = j; 801 sc->sc_gpio_pins[i].gp_caps = BCM_GPIO_DEFAULT_CAPS; 802 sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(func); 803 /* The default is active-low interrupts. */ 804 sc->sc_irq_trigger[i] = INTR_TRIGGER_LEVEL; 805 sc->sc_irq_polarity[i] = INTR_POLARITY_LOW; 806 i++; 807 } 808 sc->sc_gpio_npins = i; 809 bcm_gpio_sysctl_init(sc); 810 sc->sc_busdev = gpiobus_attach_bus(dev); 811 if (sc->sc_busdev == NULL) 812 goto fail; 813 814 return (0); 815 816 fail: 817 bcm_gpio_intr_detach(dev); 818 bus_release_resources(dev, bcm_gpio_res_spec, sc->sc_res); 819 mtx_destroy(&sc->sc_mtx); 820 821 return (ENXIO); 822 } 823 824 static int 825 bcm_gpio_detach(device_t dev) 826 { 827 828 return (EBUSY); 829 } 830 831 static uint32_t 832 bcm_gpio_intr_reg(struct bcm_gpio_softc *sc, unsigned int irq, uint32_t bank) 833 { 834 835 if (irq > BCM_GPIO_PINS) 836 return (0); 837 if (sc->sc_irq_trigger[irq] == INTR_TRIGGER_LEVEL) { 838 if (sc->sc_irq_polarity[irq] == INTR_POLARITY_LOW) 839 return (BCM_GPIO_GPLEN(bank)); 840 else if (sc->sc_irq_polarity[irq] == INTR_POLARITY_HIGH) 841 return (BCM_GPIO_GPHEN(bank)); 842 } else if (sc->sc_irq_trigger[irq] == INTR_TRIGGER_EDGE) { 843 if (sc->sc_irq_polarity[irq] == INTR_POLARITY_LOW) 844 return (BCM_GPIO_GPFEN(bank)); 845 else if (sc->sc_irq_polarity[irq] == INTR_POLARITY_HIGH) 846 return (BCM_GPIO_GPREN(bank)); 847 } 848 849 return (0); 850 } 851 852 static void 853 bcm_gpio_mask_irq(void *source) 854 { 855 uint32_t bank, mask, reg; 856 unsigned int irq; 857 858 irq = (unsigned int)source; 859 if (irq > BCM_GPIO_PINS) 860 return; 861 if (bcm_gpio_pin_is_ro(bcm_gpio_sc, irq)) 862 return; 863 bank = BCM_GPIO_BANK(irq); 864 mask = BCM_GPIO_MASK(irq); 865 BCM_GPIO_LOCK(bcm_gpio_sc); 866 reg = bcm_gpio_intr_reg(bcm_gpio_sc, irq, bank); 867 if (reg != 0) 868 BCM_GPIO_CLEAR_BITS(bcm_gpio_sc, reg, mask); 869 BCM_GPIO_UNLOCK(bcm_gpio_sc); 870 } 871 872 static void 873 bcm_gpio_unmask_irq(void *source) 874 { 875 uint32_t bank, mask, reg; 876 unsigned int irq; 877 878 irq = (unsigned int)source; 879 if (irq > BCM_GPIO_PINS) 880 return; 881 if (bcm_gpio_pin_is_ro(bcm_gpio_sc, irq)) 882 return; 883 bank = BCM_GPIO_BANK(irq); 884 mask = BCM_GPIO_MASK(irq); 885 BCM_GPIO_LOCK(bcm_gpio_sc); 886 reg = bcm_gpio_intr_reg(bcm_gpio_sc, irq, bank); 887 if (reg != 0) 888 BCM_GPIO_SET_BITS(bcm_gpio_sc, reg, mask); 889 BCM_GPIO_UNLOCK(bcm_gpio_sc); 890 } 891 892 static int 893 bcm_gpio_activate_resource(device_t bus, device_t child, int type, int rid, 894 struct resource *res) 895 { 896 int pin; 897 898 if (type != SYS_RES_IRQ) 899 return (ENXIO); 900 /* Unmask the interrupt. */ 901 pin = rman_get_start(res); 902 bcm_gpio_unmask_irq((void *)pin); 903 904 return (0); 905 } 906 907 static int 908 bcm_gpio_deactivate_resource(device_t bus, device_t child, int type, int rid, 909 struct resource *res) 910 { 911 int pin; 912 913 if (type != SYS_RES_IRQ) 914 return (ENXIO); 915 /* Mask the interrupt. */ 916 pin = rman_get_start(res); 917 bcm_gpio_mask_irq((void *)pin); 918 919 return (0); 920 } 921 922 static int 923 bcm_gpio_config_intr(device_t dev, int irq, enum intr_trigger trig, 924 enum intr_polarity pol) 925 { 926 int bank; 927 struct bcm_gpio_softc *sc; 928 uint32_t mask, oldreg, reg; 929 930 if (irq > BCM_GPIO_PINS) 931 return (EINVAL); 932 /* There is no standard trigger or polarity. */ 933 if (trig == INTR_TRIGGER_CONFORM || pol == INTR_POLARITY_CONFORM) 934 return (EINVAL); 935 sc = device_get_softc(dev); 936 if (bcm_gpio_pin_is_ro(sc, irq)) 937 return (EINVAL); 938 bank = BCM_GPIO_BANK(irq); 939 mask = BCM_GPIO_MASK(irq); 940 BCM_GPIO_LOCK(sc); 941 oldreg = bcm_gpio_intr_reg(sc, irq, bank); 942 sc->sc_irq_trigger[irq] = trig; 943 sc->sc_irq_polarity[irq] = pol; 944 reg = bcm_gpio_intr_reg(sc, irq, bank); 945 if (reg != 0) 946 BCM_GPIO_SET_BITS(sc, reg, mask); 947 if (reg != oldreg && oldreg != 0) 948 BCM_GPIO_CLEAR_BITS(sc, oldreg, mask); 949 BCM_GPIO_UNLOCK(sc); 950 951 return (0); 952 } 953 954 static int 955 bcm_gpio_setup_intr(device_t bus, device_t child, struct resource *ires, 956 int flags, driver_filter_t *filt, driver_intr_t *handler, 957 void *arg, void **cookiep) 958 { 959 struct bcm_gpio_softc *sc; 960 struct intr_event *event; 961 int pin, error; 962 963 sc = device_get_softc(bus); 964 pin = rman_get_start(ires); 965 if (pin > BCM_GPIO_PINS) 966 panic("%s: bad pin %d", __func__, pin); 967 event = sc->sc_events[pin]; 968 if (event == NULL) { 969 error = intr_event_create(&event, (void *)pin, 0, pin, 970 bcm_gpio_mask_irq, bcm_gpio_unmask_irq, NULL, NULL, 971 "gpio%d pin%d:", device_get_unit(bus), pin); 972 if (error != 0) 973 return (error); 974 sc->sc_events[pin] = event; 975 } 976 intr_event_add_handler(event, device_get_nameunit(child), filt, 977 handler, arg, intr_priority(flags), flags, cookiep); 978 979 return (0); 980 } 981 982 static int 983 bcm_gpio_teardown_intr(device_t dev, device_t child, struct resource *ires, 984 void *cookie) 985 { 986 struct bcm_gpio_softc *sc; 987 int pin, err; 988 989 sc = device_get_softc(dev); 990 pin = rman_get_start(ires); 991 if (pin > BCM_GPIO_PINS) 992 panic("%s: bad pin %d", __func__, pin); 993 if (sc->sc_events[pin] == NULL) 994 panic("Trying to teardown unoccupied IRQ"); 995 err = intr_event_remove_handler(cookie); 996 if (!err) 997 sc->sc_events[pin] = NULL; 998 999 return (err); 1000 } 1001 1002 static phandle_t 1003 bcm_gpio_get_node(device_t bus, device_t dev) 1004 { 1005 1006 /* We only have one child, the GPIO bus, which needs our own node. */ 1007 return (ofw_bus_get_node(bus)); 1008 } 1009 1010 static device_method_t bcm_gpio_methods[] = { 1011 /* Device interface */ 1012 DEVMETHOD(device_probe, bcm_gpio_probe), 1013 DEVMETHOD(device_attach, bcm_gpio_attach), 1014 DEVMETHOD(device_detach, bcm_gpio_detach), 1015 1016 /* GPIO protocol */ 1017 DEVMETHOD(gpio_get_bus, bcm_gpio_get_bus), 1018 DEVMETHOD(gpio_pin_max, bcm_gpio_pin_max), 1019 DEVMETHOD(gpio_pin_getname, bcm_gpio_pin_getname), 1020 DEVMETHOD(gpio_pin_getflags, bcm_gpio_pin_getflags), 1021 DEVMETHOD(gpio_pin_getcaps, bcm_gpio_pin_getcaps), 1022 DEVMETHOD(gpio_pin_setflags, bcm_gpio_pin_setflags), 1023 DEVMETHOD(gpio_pin_get, bcm_gpio_pin_get), 1024 DEVMETHOD(gpio_pin_set, bcm_gpio_pin_set), 1025 DEVMETHOD(gpio_pin_toggle, bcm_gpio_pin_toggle), 1026 1027 /* Bus interface */ 1028 DEVMETHOD(bus_activate_resource, bcm_gpio_activate_resource), 1029 DEVMETHOD(bus_deactivate_resource, bcm_gpio_deactivate_resource), 1030 DEVMETHOD(bus_config_intr, bcm_gpio_config_intr), 1031 DEVMETHOD(bus_setup_intr, bcm_gpio_setup_intr), 1032 DEVMETHOD(bus_teardown_intr, bcm_gpio_teardown_intr), 1033 1034 /* ofw_bus interface */ 1035 DEVMETHOD(ofw_bus_get_node, bcm_gpio_get_node), 1036 1037 DEVMETHOD_END 1038 }; 1039 1040 static devclass_t bcm_gpio_devclass; 1041 1042 static driver_t bcm_gpio_driver = { 1043 "gpio", 1044 bcm_gpio_methods, 1045 sizeof(struct bcm_gpio_softc), 1046 }; 1047 1048 DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0); 1049