1b9450e43SRui Paulo /*- 211cede48SLuiz Otavio O Souza * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp> 3b9450e43SRui Paulo * All rights reserved. 4b9450e43SRui Paulo * 5b9450e43SRui Paulo * Redistribution and use in source and binary forms, with or without 6b9450e43SRui Paulo * modification, are permitted provided that the following conditions 7b9450e43SRui Paulo * are met: 8b9450e43SRui Paulo * 1. Redistributions of source code must retain the above copyright 9b9450e43SRui Paulo * notice, this list of conditions and the following disclaimer. 10b9450e43SRui Paulo * 2. Redistributions in binary form must reproduce the above copyright 11b9450e43SRui Paulo * notice, this list of conditions and the following disclaimer in the 12b9450e43SRui Paulo * documentation and/or other materials provided with the distribution. 13b9450e43SRui Paulo * 14b9450e43SRui Paulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15b9450e43SRui Paulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16b9450e43SRui Paulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17b9450e43SRui Paulo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18b9450e43SRui Paulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19b9450e43SRui Paulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20b9450e43SRui Paulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21b9450e43SRui Paulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22b9450e43SRui Paulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23b9450e43SRui Paulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24b9450e43SRui Paulo * SUCH DAMAGE. 25b9450e43SRui Paulo * 26b9450e43SRui Paulo */ 27b9450e43SRui Paulo 28b9450e43SRui Paulo #include <sys/cdefs.h> 29b9450e43SRui Paulo __FBSDID("$FreeBSD$"); 30b9450e43SRui Paulo 31b9450e43SRui Paulo #include <sys/param.h> 32b9450e43SRui Paulo #include <sys/systm.h> 33b9450e43SRui Paulo #include <sys/bus.h> 34b9450e43SRui Paulo #include <sys/cpu.h> 35b9450e43SRui Paulo #include <sys/kernel.h> 36b9450e43SRui Paulo #include <sys/lock.h> 37b9450e43SRui Paulo #include <sys/malloc.h> 38b9450e43SRui Paulo #include <sys/module.h> 39b9450e43SRui Paulo #include <sys/mutex.h> 40b9450e43SRui Paulo #include <sys/sema.h> 41b9450e43SRui Paulo #include <sys/sysctl.h> 42b9450e43SRui Paulo 43b9450e43SRui Paulo #include <machine/bus.h> 44b9450e43SRui Paulo #include <machine/cpu.h> 45b9450e43SRui Paulo #include <machine/intr.h> 46b9450e43SRui Paulo 47e374c335SEmmanuel Vadot #include <dev/ofw/ofw_bus.h> 48e374c335SEmmanuel Vadot #include <dev/ofw/ofw_bus_subr.h> 49e374c335SEmmanuel Vadot 50b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_mbox.h> 51b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h> 52b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_vcbus.h> 53b9450e43SRui Paulo 54b9450e43SRui Paulo #include "cpufreq_if.h" 55b9450e43SRui Paulo #include "mbox_if.h" 56b9450e43SRui Paulo 57b9450e43SRui Paulo #ifdef DEBUG 58b9450e43SRui Paulo #define DPRINTF(fmt, ...) do { \ 59b9450e43SRui Paulo printf("%s:%u: ", __func__, __LINE__); \ 60b9450e43SRui Paulo printf(fmt, ##__VA_ARGS__); \ 61b9450e43SRui Paulo } while (0) 62b9450e43SRui Paulo #else 63b9450e43SRui Paulo #define DPRINTF(fmt, ...) 64b9450e43SRui Paulo #endif 65b9450e43SRui Paulo 66b9450e43SRui Paulo #define HZ2MHZ(freq) ((freq) / (1000 * 1000)) 67b9450e43SRui Paulo #define MHZ2HZ(freq) ((freq) * (1000 * 1000)) 6811cede48SLuiz Otavio O Souza 69f1f425aeSOleksandr Tymoshenko #ifdef SOC_BCM2835 70b9450e43SRui Paulo #define OFFSET2MVOLT(val) (1200 + ((val) * 25)) 71b9450e43SRui Paulo #define MVOLT2OFFSET(val) (((val) - 1200) / 25) 72b9450e43SRui Paulo #define DEFAULT_ARM_FREQUENCY 700 7311cede48SLuiz Otavio O Souza #define DEFAULT_LOWEST_FREQ 300 74f1f425aeSOleksandr Tymoshenko #else 75f1f425aeSOleksandr Tymoshenko #define OFFSET2MVOLT(val) (((val) / 1000)) 76f1f425aeSOleksandr Tymoshenko #define MVOLT2OFFSET(val) (((val) * 1000)) 77f1f425aeSOleksandr Tymoshenko #define DEFAULT_ARM_FREQUENCY 600 78f1f425aeSOleksandr Tymoshenko #define DEFAULT_LOWEST_FREQ 600 7911cede48SLuiz Otavio O Souza #endif 80b9450e43SRui Paulo #define DEFAULT_CORE_FREQUENCY 250 81b9450e43SRui Paulo #define DEFAULT_SDRAM_FREQUENCY 400 82b9450e43SRui Paulo #define TRANSITION_LATENCY 1000 83b9450e43SRui Paulo #define MIN_OVER_VOLTAGE -16 84b9450e43SRui Paulo #define MAX_OVER_VOLTAGE 6 85b9450e43SRui Paulo #define MSG_ERROR -999999999 86b9450e43SRui Paulo #define MHZSTEP 100 87b9450e43SRui Paulo #define HZSTEP (MHZ2HZ(MHZSTEP)) 889d6672e1SLuiz Otavio O Souza #define TZ_ZEROC 2731 89b9450e43SRui Paulo 90b9450e43SRui Paulo #define VC_LOCK(sc) do { \ 91b9450e43SRui Paulo sema_wait(&vc_sema); \ 92b9450e43SRui Paulo } while (0) 93b9450e43SRui Paulo #define VC_UNLOCK(sc) do { \ 94b9450e43SRui Paulo sema_post(&vc_sema); \ 95b9450e43SRui Paulo } while (0) 96b9450e43SRui Paulo 97b9450e43SRui Paulo /* ARM->VC mailbox property semaphore */ 98b9450e43SRui Paulo static struct sema vc_sema; 99b9450e43SRui Paulo 100b9450e43SRui Paulo static struct sysctl_ctx_list bcm2835_sysctl_ctx; 101b9450e43SRui Paulo 102b9450e43SRui Paulo struct bcm2835_cpufreq_softc { 103b9450e43SRui Paulo device_t dev; 104b9450e43SRui Paulo int arm_max_freq; 105b9450e43SRui Paulo int arm_min_freq; 106b9450e43SRui Paulo int core_max_freq; 107b9450e43SRui Paulo int core_min_freq; 108b9450e43SRui Paulo int sdram_max_freq; 109b9450e43SRui Paulo int sdram_min_freq; 110b9450e43SRui Paulo int max_voltage_core; 111b9450e43SRui Paulo int min_voltage_core; 112b9450e43SRui Paulo 113b9450e43SRui Paulo /* the values written in mbox */ 114b9450e43SRui Paulo int voltage_core; 115b9450e43SRui Paulo int voltage_sdram; 116b9450e43SRui Paulo int voltage_sdram_c; 117b9450e43SRui Paulo int voltage_sdram_i; 118b9450e43SRui Paulo int voltage_sdram_p; 119b9450e43SRui Paulo int turbo_mode; 120b9450e43SRui Paulo 121b9450e43SRui Paulo /* initial hook for waiting mbox intr */ 122b9450e43SRui Paulo struct intr_config_hook init_hook; 123b9450e43SRui Paulo }; 124b9450e43SRui Paulo 125e374c335SEmmanuel Vadot static struct ofw_compat_data compat_data[] = { 126e374c335SEmmanuel Vadot { "broadcom,bcm2835-vc", 1 }, 127e374c335SEmmanuel Vadot { "broadcom,bcm2708-vc", 1 }, 128e374c335SEmmanuel Vadot { "brcm,bcm2709", 1 }, 129e446dd5dSPeter Jeremy { "brcm,bcm2835", 1 }, 130f362a398SEmmanuel Vadot { "brcm,bcm2836", 1 }, 131adcd9597SOleksandr Tymoshenko { "brcm,bcm2837", 1 }, 132*e245e555SKyle Evans { "brcm,bcm2711", 1 }, 133e374c335SEmmanuel Vadot { NULL, 0 } 134e374c335SEmmanuel Vadot }; 135e374c335SEmmanuel Vadot 136b9450e43SRui Paulo static int cpufreq_verbose = 0; 137b9450e43SRui Paulo TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose); 138b9450e43SRui Paulo static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ; 139b9450e43SRui Paulo TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq); 140b9450e43SRui Paulo 141e9faba9dSLuiz Otavio O Souza #ifdef PROP_DEBUG 142b9450e43SRui Paulo static void 143b9450e43SRui Paulo bcm2835_dump(const void *data, int len) 144b9450e43SRui Paulo { 145b9450e43SRui Paulo const uint8_t *p = (const uint8_t*)data; 146b9450e43SRui Paulo int i; 147b9450e43SRui Paulo 148b9450e43SRui Paulo printf("dump @ %p:\n", data); 149b9450e43SRui Paulo for (i = 0; i < len; i++) { 150b9450e43SRui Paulo printf("%2.2x ", p[i]); 151b9450e43SRui Paulo if ((i % 4) == 3) 152b9450e43SRui Paulo printf(" "); 153b9450e43SRui Paulo if ((i % 16) == 15) 154b9450e43SRui Paulo printf("\n"); 155b9450e43SRui Paulo } 156b9450e43SRui Paulo printf("\n"); 157b9450e43SRui Paulo } 158b9450e43SRui Paulo #endif 159b9450e43SRui Paulo 160b9450e43SRui Paulo static int 161b9450e43SRui Paulo bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc, 162b9450e43SRui Paulo uint32_t clock_id) 163b9450e43SRui Paulo { 164cd3903c6SOleksandr Tymoshenko struct msg_get_clock_rate msg; 165b9450e43SRui Paulo int rate; 166b9450e43SRui Paulo int err; 167b9450e43SRui Paulo 168b9450e43SRui Paulo /* 169b9450e43SRui Paulo * Get clock rate 170b9450e43SRui Paulo * Tag: 0x00030002 171b9450e43SRui Paulo * Request: 172b9450e43SRui Paulo * Length: 4 173b9450e43SRui Paulo * Value: 174b9450e43SRui Paulo * u32: clock id 175b9450e43SRui Paulo * Response: 176b9450e43SRui Paulo * Length: 8 177b9450e43SRui Paulo * Value: 178b9450e43SRui Paulo * u32: clock id 179b9450e43SRui Paulo * u32: rate (in Hz) 180b9450e43SRui Paulo */ 181b9450e43SRui Paulo 182b9450e43SRui Paulo /* setup single tag buffer */ 183cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 184cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 185cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 186cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE; 187cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 188cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 189cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 190cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 191b9450e43SRui Paulo 192b9450e43SRui Paulo /* call mailbox property */ 193cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 194b9450e43SRui Paulo if (err) { 195b9450e43SRui Paulo device_printf(sc->dev, "can't get clock rate (id=%u)\n", 196b9450e43SRui Paulo clock_id); 197b9450e43SRui Paulo return (MSG_ERROR); 198b9450e43SRui Paulo } 199b9450e43SRui Paulo 200b9450e43SRui Paulo /* result (Hz) */ 201cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 202b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 203b9450e43SRui Paulo return (rate); 204b9450e43SRui Paulo } 205b9450e43SRui Paulo 206b9450e43SRui Paulo static int 207b9450e43SRui Paulo bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc, 208b9450e43SRui Paulo uint32_t clock_id) 209b9450e43SRui Paulo { 210cd3903c6SOleksandr Tymoshenko struct msg_get_max_clock_rate msg; 211b9450e43SRui Paulo int rate; 212b9450e43SRui Paulo int err; 213b9450e43SRui Paulo 214b9450e43SRui Paulo /* 215b9450e43SRui Paulo * Get max clock rate 216b9450e43SRui Paulo * Tag: 0x00030004 217b9450e43SRui Paulo * Request: 218b9450e43SRui Paulo * Length: 4 219b9450e43SRui Paulo * Value: 220b9450e43SRui Paulo * u32: clock id 221b9450e43SRui Paulo * Response: 222b9450e43SRui Paulo * Length: 8 223b9450e43SRui Paulo * Value: 224b9450e43SRui Paulo * u32: clock id 225b9450e43SRui Paulo * u32: rate (in Hz) 226b9450e43SRui Paulo */ 227b9450e43SRui Paulo 228b9450e43SRui Paulo /* setup single tag buffer */ 229cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 230cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 231cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 232cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE; 233cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 234cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 235cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 236cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 237b9450e43SRui Paulo 238b9450e43SRui Paulo /* call mailbox property */ 239cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 240b9450e43SRui Paulo if (err) { 241b9450e43SRui Paulo device_printf(sc->dev, "can't get max clock rate (id=%u)\n", 242b9450e43SRui Paulo clock_id); 243b9450e43SRui Paulo return (MSG_ERROR); 244b9450e43SRui Paulo } 245b9450e43SRui Paulo 246b9450e43SRui Paulo /* result (Hz) */ 247cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 248b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 249b9450e43SRui Paulo return (rate); 250b9450e43SRui Paulo } 251b9450e43SRui Paulo 252b9450e43SRui Paulo static int 253b9450e43SRui Paulo bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc, 254b9450e43SRui Paulo uint32_t clock_id) 255b9450e43SRui Paulo { 256cd3903c6SOleksandr Tymoshenko struct msg_get_min_clock_rate msg; 257b9450e43SRui Paulo int rate; 258b9450e43SRui Paulo int err; 259b9450e43SRui Paulo 260b9450e43SRui Paulo /* 261b9450e43SRui Paulo * Get min clock rate 262b9450e43SRui Paulo * Tag: 0x00030007 263b9450e43SRui Paulo * Request: 264b9450e43SRui Paulo * Length: 4 265b9450e43SRui Paulo * Value: 266b9450e43SRui Paulo * u32: clock id 267b9450e43SRui Paulo * Response: 268b9450e43SRui Paulo * Length: 8 269b9450e43SRui Paulo * Value: 270b9450e43SRui Paulo * u32: clock id 271b9450e43SRui Paulo * u32: rate (in Hz) 272b9450e43SRui Paulo */ 273b9450e43SRui Paulo 274b9450e43SRui Paulo /* setup single tag buffer */ 275cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 276cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 277cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 278cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE; 279cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 280cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 281cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 282cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 283b9450e43SRui Paulo 284b9450e43SRui Paulo /* call mailbox property */ 285cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 286b9450e43SRui Paulo if (err) { 287b9450e43SRui Paulo device_printf(sc->dev, "can't get min clock rate (id=%u)\n", 288b9450e43SRui Paulo clock_id); 289b9450e43SRui Paulo return (MSG_ERROR); 290b9450e43SRui Paulo } 291b9450e43SRui Paulo 292b9450e43SRui Paulo /* result (Hz) */ 293cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 294b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 295b9450e43SRui Paulo return (rate); 296b9450e43SRui Paulo } 297b9450e43SRui Paulo 298b9450e43SRui Paulo static int 299b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc, 300b9450e43SRui Paulo uint32_t clock_id, uint32_t rate_hz) 301b9450e43SRui Paulo { 302cd3903c6SOleksandr Tymoshenko struct msg_set_clock_rate msg; 303b9450e43SRui Paulo int rate; 304b9450e43SRui Paulo int err; 305b9450e43SRui Paulo 306b9450e43SRui Paulo /* 307b9450e43SRui Paulo * Set clock rate 308b9450e43SRui Paulo * Tag: 0x00038002 309b9450e43SRui Paulo * Request: 310b9450e43SRui Paulo * Length: 8 311b9450e43SRui Paulo * Value: 312b9450e43SRui Paulo * u32: clock id 313b9450e43SRui Paulo * u32: rate (in Hz) 314b9450e43SRui Paulo * Response: 315b9450e43SRui Paulo * Length: 8 316b9450e43SRui Paulo * Value: 317b9450e43SRui Paulo * u32: clock id 318b9450e43SRui Paulo * u32: rate (in Hz) 319b9450e43SRui Paulo */ 320b9450e43SRui Paulo 321b9450e43SRui Paulo /* setup single tag buffer */ 322cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 323cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 324cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 325cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE; 326cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 327cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 328cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 329cd3903c6SOleksandr Tymoshenko msg.body.req.rate_hz = rate_hz; 330cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 331b9450e43SRui Paulo 332b9450e43SRui Paulo /* call mailbox property */ 333cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 334b9450e43SRui Paulo if (err) { 335b9450e43SRui Paulo device_printf(sc->dev, "can't set clock rate (id=%u)\n", 336b9450e43SRui Paulo clock_id); 337b9450e43SRui Paulo return (MSG_ERROR); 338b9450e43SRui Paulo } 339b9450e43SRui Paulo 340b9450e43SRui Paulo /* workaround for core clock */ 341b9450e43SRui Paulo if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) { 342b9450e43SRui Paulo /* for safety (may change voltage without changing clock) */ 343b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 344b9450e43SRui Paulo 345b9450e43SRui Paulo /* 346b9450e43SRui Paulo * XXX: the core clock is unable to change at once, 347b9450e43SRui Paulo * to change certainly, write it twice now. 348b9450e43SRui Paulo */ 349b9450e43SRui Paulo 350b9450e43SRui Paulo /* setup single tag buffer */ 351cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 352cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 353cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 354cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE; 355cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 356cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 357cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 358cd3903c6SOleksandr Tymoshenko msg.body.req.rate_hz = rate_hz; 359cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 360b9450e43SRui Paulo 361b9450e43SRui Paulo /* call mailbox property */ 362cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 363b9450e43SRui Paulo if (err) { 364b9450e43SRui Paulo device_printf(sc->dev, 365b9450e43SRui Paulo "can't set clock rate (id=%u)\n", clock_id); 366b9450e43SRui Paulo return (MSG_ERROR); 367b9450e43SRui Paulo } 368b9450e43SRui Paulo } 369b9450e43SRui Paulo 370b9450e43SRui Paulo /* result (Hz) */ 371cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 372b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 373b9450e43SRui Paulo return (rate); 374b9450e43SRui Paulo } 375b9450e43SRui Paulo 376b9450e43SRui Paulo static int 377b9450e43SRui Paulo bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc) 378b9450e43SRui Paulo { 379cd3903c6SOleksandr Tymoshenko struct msg_get_turbo msg; 380b9450e43SRui Paulo int level; 381b9450e43SRui Paulo int err; 382b9450e43SRui Paulo 383b9450e43SRui Paulo /* 384b9450e43SRui Paulo * Get turbo 385b9450e43SRui Paulo * Tag: 0x00030009 386b9450e43SRui Paulo * Request: 387b9450e43SRui Paulo * Length: 4 388b9450e43SRui Paulo * Value: 389b9450e43SRui Paulo * u32: id 390b9450e43SRui Paulo * Response: 391b9450e43SRui Paulo * Length: 8 392b9450e43SRui Paulo * Value: 393b9450e43SRui Paulo * u32: id 394b9450e43SRui Paulo * u32: level 395b9450e43SRui Paulo */ 396b9450e43SRui Paulo 397b9450e43SRui Paulo /* setup single tag buffer */ 398cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 399cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 400cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 401cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO; 402cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 403cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 404cd3903c6SOleksandr Tymoshenko msg.body.req.id = 0; 405cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 406b9450e43SRui Paulo 407b9450e43SRui Paulo /* call mailbox property */ 408cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 409b9450e43SRui Paulo if (err) { 410b9450e43SRui Paulo device_printf(sc->dev, "can't get turbo\n"); 411b9450e43SRui Paulo return (MSG_ERROR); 412b9450e43SRui Paulo } 413b9450e43SRui Paulo 414b9450e43SRui Paulo /* result 0=non-turbo, 1=turbo */ 415cd3903c6SOleksandr Tymoshenko level = (int)msg.body.resp.level; 416b9450e43SRui Paulo DPRINTF("level = %d\n", level); 417b9450e43SRui Paulo return (level); 418b9450e43SRui Paulo } 419b9450e43SRui Paulo 420b9450e43SRui Paulo static int 421b9450e43SRui Paulo bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level) 422b9450e43SRui Paulo { 423cd3903c6SOleksandr Tymoshenko struct msg_set_turbo msg; 424b9450e43SRui Paulo int value; 425b9450e43SRui Paulo int err; 426b9450e43SRui Paulo 427b9450e43SRui Paulo /* 428b9450e43SRui Paulo * Set turbo 429b9450e43SRui Paulo * Tag: 0x00038009 430b9450e43SRui Paulo * Request: 431b9450e43SRui Paulo * Length: 8 432b9450e43SRui Paulo * Value: 433b9450e43SRui Paulo * u32: id 434b9450e43SRui Paulo * u32: level 435b9450e43SRui Paulo * Response: 436b9450e43SRui Paulo * Length: 8 437b9450e43SRui Paulo * Value: 438b9450e43SRui Paulo * u32: id 439b9450e43SRui Paulo * u32: level 440b9450e43SRui Paulo */ 441b9450e43SRui Paulo 442b9450e43SRui Paulo /* replace unknown value to OFF */ 443b9450e43SRui Paulo if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF) 444b9450e43SRui Paulo level = BCM2835_MBOX_TURBO_OFF; 445b9450e43SRui Paulo 446b9450e43SRui Paulo /* setup single tag buffer */ 447cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 448cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 449cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 450cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO; 451cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 452cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 453cd3903c6SOleksandr Tymoshenko msg.body.req.id = 0; 454cd3903c6SOleksandr Tymoshenko msg.body.req.level = level; 455cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 456b9450e43SRui Paulo 457b9450e43SRui Paulo /* call mailbox property */ 458cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 459b9450e43SRui Paulo if (err) { 460b9450e43SRui Paulo device_printf(sc->dev, "can't set turbo\n"); 461b9450e43SRui Paulo return (MSG_ERROR); 462b9450e43SRui Paulo } 463b9450e43SRui Paulo 464b9450e43SRui Paulo /* result 0=non-turbo, 1=turbo */ 465cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.level; 466b9450e43SRui Paulo DPRINTF("level = %d\n", value); 467b9450e43SRui Paulo return (value); 468b9450e43SRui Paulo } 469b9450e43SRui Paulo 470b9450e43SRui Paulo static int 471b9450e43SRui Paulo bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc, 472b9450e43SRui Paulo uint32_t voltage_id) 473b9450e43SRui Paulo { 474cd3903c6SOleksandr Tymoshenko struct msg_get_voltage msg; 475b9450e43SRui Paulo int value; 476b9450e43SRui Paulo int err; 477b9450e43SRui Paulo 478b9450e43SRui Paulo /* 479b9450e43SRui Paulo * Get voltage 480b9450e43SRui Paulo * Tag: 0x00030003 481b9450e43SRui Paulo * Request: 482b9450e43SRui Paulo * Length: 4 483b9450e43SRui Paulo * Value: 484b9450e43SRui Paulo * u32: voltage id 485b9450e43SRui Paulo * Response: 486b9450e43SRui Paulo * Length: 8 487b9450e43SRui Paulo * Value: 488b9450e43SRui Paulo * u32: voltage id 489b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 490b9450e43SRui Paulo */ 491b9450e43SRui Paulo 492b9450e43SRui Paulo /* setup single tag buffer */ 493cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 494cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 495cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 496cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE; 497cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 498cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 499cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 500cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 501b9450e43SRui Paulo 502b9450e43SRui Paulo /* call mailbox property */ 503cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 504b9450e43SRui Paulo if (err) { 505b9450e43SRui Paulo device_printf(sc->dev, "can't get voltage\n"); 506b9450e43SRui Paulo return (MSG_ERROR); 507b9450e43SRui Paulo } 508b9450e43SRui Paulo 509b9450e43SRui Paulo /* result (offset from 1.2V) */ 510cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 511b9450e43SRui Paulo DPRINTF("value = %d\n", value); 512b9450e43SRui Paulo return (value); 513b9450e43SRui Paulo } 514b9450e43SRui Paulo 515b9450e43SRui Paulo static int 516b9450e43SRui Paulo bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc, 517b9450e43SRui Paulo uint32_t voltage_id) 518b9450e43SRui Paulo { 519cd3903c6SOleksandr Tymoshenko struct msg_get_max_voltage msg; 520b9450e43SRui Paulo int value; 521b9450e43SRui Paulo int err; 522b9450e43SRui Paulo 523b9450e43SRui Paulo /* 524b9450e43SRui Paulo * Get voltage 525b9450e43SRui Paulo * Tag: 0x00030005 526b9450e43SRui Paulo * Request: 527b9450e43SRui Paulo * Length: 4 528b9450e43SRui Paulo * Value: 529b9450e43SRui Paulo * u32: voltage id 530b9450e43SRui Paulo * Response: 531b9450e43SRui Paulo * Length: 8 532b9450e43SRui Paulo * Value: 533b9450e43SRui Paulo * u32: voltage id 534b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 535b9450e43SRui Paulo */ 536b9450e43SRui Paulo 537b9450e43SRui Paulo /* setup single tag buffer */ 538cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 539cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 540cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 541cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE; 542cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 543cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 544cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 545cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 546b9450e43SRui Paulo 547b9450e43SRui Paulo /* call mailbox property */ 548cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 549b9450e43SRui Paulo if (err) { 550b9450e43SRui Paulo device_printf(sc->dev, "can't get max voltage\n"); 551b9450e43SRui Paulo return (MSG_ERROR); 552b9450e43SRui Paulo } 553b9450e43SRui Paulo 554b9450e43SRui Paulo /* result (offset from 1.2V) */ 555cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 556b9450e43SRui Paulo DPRINTF("value = %d\n", value); 557b9450e43SRui Paulo return (value); 558b9450e43SRui Paulo } 559b9450e43SRui Paulo static int 560b9450e43SRui Paulo bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc, 561b9450e43SRui Paulo uint32_t voltage_id) 562b9450e43SRui Paulo { 563cd3903c6SOleksandr Tymoshenko struct msg_get_min_voltage msg; 564b9450e43SRui Paulo int value; 565b9450e43SRui Paulo int err; 566b9450e43SRui Paulo 567b9450e43SRui Paulo /* 568b9450e43SRui Paulo * Get voltage 569b9450e43SRui Paulo * Tag: 0x00030008 570b9450e43SRui Paulo * Request: 571b9450e43SRui Paulo * Length: 4 572b9450e43SRui Paulo * Value: 573b9450e43SRui Paulo * u32: voltage id 574b9450e43SRui Paulo * Response: 575b9450e43SRui Paulo * Length: 8 576b9450e43SRui Paulo * Value: 577b9450e43SRui Paulo * u32: voltage id 578b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 579b9450e43SRui Paulo */ 580b9450e43SRui Paulo 581b9450e43SRui Paulo /* setup single tag buffer */ 582cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 583cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 584cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 585cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE; 586cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 587cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 588cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 589cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 590b9450e43SRui Paulo 591b9450e43SRui Paulo /* call mailbox property */ 592cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 593b9450e43SRui Paulo if (err) { 594b9450e43SRui Paulo device_printf(sc->dev, "can't get min voltage\n"); 595b9450e43SRui Paulo return (MSG_ERROR); 596b9450e43SRui Paulo } 597b9450e43SRui Paulo 598b9450e43SRui Paulo /* result (offset from 1.2V) */ 599cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 600b9450e43SRui Paulo DPRINTF("value = %d\n", value); 601b9450e43SRui Paulo return (value); 602b9450e43SRui Paulo } 603b9450e43SRui Paulo 604b9450e43SRui Paulo static int 605b9450e43SRui Paulo bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc, 606b9450e43SRui Paulo uint32_t voltage_id, int32_t value) 607b9450e43SRui Paulo { 608cd3903c6SOleksandr Tymoshenko struct msg_set_voltage msg; 609b9450e43SRui Paulo int err; 610b9450e43SRui Paulo 611b9450e43SRui Paulo /* 612b9450e43SRui Paulo * Set voltage 613b9450e43SRui Paulo * Tag: 0x00038003 614b9450e43SRui Paulo * Request: 615b9450e43SRui Paulo * Length: 4 616b9450e43SRui Paulo * Value: 617b9450e43SRui Paulo * u32: voltage id 618b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 619b9450e43SRui Paulo * Response: 620b9450e43SRui Paulo * Length: 8 621b9450e43SRui Paulo * Value: 622b9450e43SRui Paulo * u32: voltage id 623b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 624b9450e43SRui Paulo */ 625b9450e43SRui Paulo 626b9450e43SRui Paulo /* 627b9450e43SRui Paulo * over_voltage: 628b9450e43SRui Paulo * 0 (1.2 V). Values above 6 are only allowed when force_turbo or 629b9450e43SRui Paulo * current_limit_override are specified (which set the warranty bit). 630b9450e43SRui Paulo */ 631b9450e43SRui Paulo if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) { 632b9450e43SRui Paulo /* currently not supported */ 633b9450e43SRui Paulo device_printf(sc->dev, "not supported voltage: %d\n", value); 634b9450e43SRui Paulo return (MSG_ERROR); 635b9450e43SRui Paulo } 636b9450e43SRui Paulo 637b9450e43SRui Paulo /* setup single tag buffer */ 638cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 639cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 640cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 641cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE; 642cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 643cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 644cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 645cd3903c6SOleksandr Tymoshenko msg.body.req.value = (uint32_t)value; 646cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 647b9450e43SRui Paulo 648b9450e43SRui Paulo /* call mailbox property */ 649cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 650b9450e43SRui Paulo if (err) { 651b9450e43SRui Paulo device_printf(sc->dev, "can't set voltage\n"); 652b9450e43SRui Paulo return (MSG_ERROR); 653b9450e43SRui Paulo } 654b9450e43SRui Paulo 655b9450e43SRui Paulo /* result (offset from 1.2V) */ 656cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 657b9450e43SRui Paulo DPRINTF("value = %d\n", value); 658b9450e43SRui Paulo return (value); 659b9450e43SRui Paulo } 660b9450e43SRui Paulo 661b9450e43SRui Paulo static int 662b9450e43SRui Paulo bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc) 663b9450e43SRui Paulo { 664cd3903c6SOleksandr Tymoshenko struct msg_get_temperature msg; 665b9450e43SRui Paulo int value; 666b9450e43SRui Paulo int err; 667b9450e43SRui Paulo 668b9450e43SRui Paulo /* 669b9450e43SRui Paulo * Get temperature 670b9450e43SRui Paulo * Tag: 0x00030006 671b9450e43SRui Paulo * Request: 672b9450e43SRui Paulo * Length: 4 673b9450e43SRui Paulo * Value: 674b9450e43SRui Paulo * u32: temperature id 675b9450e43SRui Paulo * Response: 676b9450e43SRui Paulo * Length: 8 677b9450e43SRui Paulo * Value: 678b9450e43SRui Paulo * u32: temperature id 679b9450e43SRui Paulo * u32: value 680b9450e43SRui Paulo */ 681b9450e43SRui Paulo 682b9450e43SRui Paulo /* setup single tag buffer */ 683cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 684cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 685cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 686cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE; 687cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 688cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 689cd3903c6SOleksandr Tymoshenko msg.body.req.temperature_id = 0; 690cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 691b9450e43SRui Paulo 692b9450e43SRui Paulo /* call mailbox property */ 693cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 694b9450e43SRui Paulo if (err) { 695b9450e43SRui Paulo device_printf(sc->dev, "can't get temperature\n"); 696b9450e43SRui Paulo return (MSG_ERROR); 697b9450e43SRui Paulo } 698b9450e43SRui Paulo 699b9450e43SRui Paulo /* result (temperature of degree C) */ 700cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 701b9450e43SRui Paulo DPRINTF("value = %d\n", value); 702b9450e43SRui Paulo return (value); 703b9450e43SRui Paulo } 704b9450e43SRui Paulo 705b9450e43SRui Paulo 706b9450e43SRui Paulo 707b9450e43SRui Paulo static int 708b9450e43SRui Paulo sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS) 709b9450e43SRui Paulo { 710b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 711b9450e43SRui Paulo int val; 712b9450e43SRui Paulo int err; 713b9450e43SRui Paulo 714b9450e43SRui Paulo /* get realtime value */ 715b9450e43SRui Paulo VC_LOCK(sc); 716b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM); 717b9450e43SRui Paulo VC_UNLOCK(sc); 718b9450e43SRui Paulo if (val == MSG_ERROR) 719b9450e43SRui Paulo return (EIO); 720b9450e43SRui Paulo 721b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 722b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 723b9450e43SRui Paulo return (err); 724b9450e43SRui Paulo 725b9450e43SRui Paulo /* write request */ 726b9450e43SRui Paulo VC_LOCK(sc); 727b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 728b9450e43SRui Paulo val); 729b9450e43SRui Paulo VC_UNLOCK(sc); 730b9450e43SRui Paulo if (err == MSG_ERROR) { 731b9450e43SRui Paulo device_printf(sc->dev, "set clock arm_freq error\n"); 732b9450e43SRui Paulo return (EIO); 733b9450e43SRui Paulo } 734b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 735b9450e43SRui Paulo 736b9450e43SRui Paulo return (0); 737b9450e43SRui Paulo } 738b9450e43SRui Paulo 739b9450e43SRui Paulo static int 740b9450e43SRui Paulo sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS) 741b9450e43SRui Paulo { 742b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 743b9450e43SRui Paulo int val; 744b9450e43SRui Paulo int err; 745b9450e43SRui Paulo 746b9450e43SRui Paulo /* get realtime value */ 747b9450e43SRui Paulo VC_LOCK(sc); 748b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE); 749b9450e43SRui Paulo VC_UNLOCK(sc); 750b9450e43SRui Paulo if (val == MSG_ERROR) 751b9450e43SRui Paulo return (EIO); 752b9450e43SRui Paulo 753b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 754b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 755b9450e43SRui Paulo return (err); 756b9450e43SRui Paulo 757b9450e43SRui Paulo /* write request */ 758b9450e43SRui Paulo VC_LOCK(sc); 759b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 760b9450e43SRui Paulo val); 761b9450e43SRui Paulo if (err == MSG_ERROR) { 762b9450e43SRui Paulo VC_UNLOCK(sc); 763b9450e43SRui Paulo device_printf(sc->dev, "set clock core_freq error\n"); 764b9450e43SRui Paulo return (EIO); 765b9450e43SRui Paulo } 766b9450e43SRui Paulo VC_UNLOCK(sc); 767b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 768b9450e43SRui Paulo 769b9450e43SRui Paulo return (0); 770b9450e43SRui Paulo } 771b9450e43SRui Paulo 772b9450e43SRui Paulo static int 773b9450e43SRui Paulo sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS) 774b9450e43SRui Paulo { 775b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 776b9450e43SRui Paulo int val; 777b9450e43SRui Paulo int err; 778b9450e43SRui Paulo 779b9450e43SRui Paulo /* get realtime value */ 780b9450e43SRui Paulo VC_LOCK(sc); 781b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM); 782b9450e43SRui Paulo VC_UNLOCK(sc); 783b9450e43SRui Paulo if (val == MSG_ERROR) 784b9450e43SRui Paulo return (EIO); 785b9450e43SRui Paulo 786b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 787b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 788b9450e43SRui Paulo return (err); 789b9450e43SRui Paulo 790b9450e43SRui Paulo /* write request */ 791b9450e43SRui Paulo VC_LOCK(sc); 792b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM, 793b9450e43SRui Paulo val); 794b9450e43SRui Paulo VC_UNLOCK(sc); 795b9450e43SRui Paulo if (err == MSG_ERROR) { 796b9450e43SRui Paulo device_printf(sc->dev, "set clock sdram_freq error\n"); 797b9450e43SRui Paulo return (EIO); 798b9450e43SRui Paulo } 799b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 800b9450e43SRui Paulo 801b9450e43SRui Paulo return (0); 802b9450e43SRui Paulo } 803b9450e43SRui Paulo 804b9450e43SRui Paulo static int 805b9450e43SRui Paulo sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS) 806b9450e43SRui Paulo { 807b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 808b9450e43SRui Paulo int val; 809b9450e43SRui Paulo int err; 810b9450e43SRui Paulo 811b9450e43SRui Paulo /* get realtime value */ 812b9450e43SRui Paulo VC_LOCK(sc); 813b9450e43SRui Paulo val = bcm2835_cpufreq_get_turbo(sc); 814b9450e43SRui Paulo VC_UNLOCK(sc); 815b9450e43SRui Paulo if (val == MSG_ERROR) 816b9450e43SRui Paulo return (EIO); 817b9450e43SRui Paulo 818b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 819b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 820b9450e43SRui Paulo return (err); 821b9450e43SRui Paulo 822b9450e43SRui Paulo /* write request */ 823b9450e43SRui Paulo if (val > 0) 824b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_ON; 825b9450e43SRui Paulo else 826b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_OFF; 827b9450e43SRui Paulo 828b9450e43SRui Paulo VC_LOCK(sc); 829b9450e43SRui Paulo err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode); 830b9450e43SRui Paulo VC_UNLOCK(sc); 831b9450e43SRui Paulo if (err == MSG_ERROR) { 832b9450e43SRui Paulo device_printf(sc->dev, "set turbo error\n"); 833b9450e43SRui Paulo return (EIO); 834b9450e43SRui Paulo } 835b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 836b9450e43SRui Paulo 837b9450e43SRui Paulo return (0); 838b9450e43SRui Paulo } 839b9450e43SRui Paulo 840b9450e43SRui Paulo static int 841b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS) 842b9450e43SRui Paulo { 843b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 844b9450e43SRui Paulo int val; 845b9450e43SRui Paulo int err; 846b9450e43SRui Paulo 847b9450e43SRui Paulo /* get realtime value */ 848b9450e43SRui Paulo VC_LOCK(sc); 849b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE); 850b9450e43SRui Paulo VC_UNLOCK(sc); 851b9450e43SRui Paulo if (val == MSG_ERROR) 852b9450e43SRui Paulo return (EIO); 853b9450e43SRui Paulo 854b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 855b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 856b9450e43SRui Paulo return (err); 857b9450e43SRui Paulo 858b9450e43SRui Paulo /* write request */ 859b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 860b9450e43SRui Paulo return (EINVAL); 861b9450e43SRui Paulo sc->voltage_core = val; 862b9450e43SRui Paulo 863b9450e43SRui Paulo VC_LOCK(sc); 864b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE, 865b9450e43SRui Paulo sc->voltage_core); 866b9450e43SRui Paulo VC_UNLOCK(sc); 867b9450e43SRui Paulo if (err == MSG_ERROR) { 868b9450e43SRui Paulo device_printf(sc->dev, "set voltage core error\n"); 869b9450e43SRui Paulo return (EIO); 870b9450e43SRui Paulo } 871b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 872b9450e43SRui Paulo 873b9450e43SRui Paulo return (0); 874b9450e43SRui Paulo } 875b9450e43SRui Paulo 876b9450e43SRui Paulo static int 877b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS) 878b9450e43SRui Paulo { 879b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 880b9450e43SRui Paulo int val; 881b9450e43SRui Paulo int err; 882b9450e43SRui Paulo 883b9450e43SRui Paulo /* get realtime value */ 884b9450e43SRui Paulo VC_LOCK(sc); 885b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 886b9450e43SRui Paulo VC_UNLOCK(sc); 887b9450e43SRui Paulo if (val == MSG_ERROR) 888b9450e43SRui Paulo return (EIO); 889b9450e43SRui Paulo 890b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 891b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 892b9450e43SRui Paulo return (err); 893b9450e43SRui Paulo 894b9450e43SRui Paulo /* write request */ 895b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 896b9450e43SRui Paulo return (EINVAL); 897b9450e43SRui Paulo sc->voltage_sdram_c = val; 898b9450e43SRui Paulo 899b9450e43SRui Paulo VC_LOCK(sc); 900b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C, 901b9450e43SRui Paulo sc->voltage_sdram_c); 902b9450e43SRui Paulo VC_UNLOCK(sc); 903b9450e43SRui Paulo if (err == MSG_ERROR) { 904b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_c error\n"); 905b9450e43SRui Paulo return (EIO); 906b9450e43SRui Paulo } 907b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 908b9450e43SRui Paulo 909b9450e43SRui Paulo return (0); 910b9450e43SRui Paulo } 911b9450e43SRui Paulo 912b9450e43SRui Paulo static int 913b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS) 914b9450e43SRui Paulo { 915b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 916b9450e43SRui Paulo int val; 917b9450e43SRui Paulo int err; 918b9450e43SRui Paulo 919b9450e43SRui Paulo /* get realtime value */ 920b9450e43SRui Paulo VC_LOCK(sc); 921b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 922b9450e43SRui Paulo VC_UNLOCK(sc); 923b9450e43SRui Paulo if (val == MSG_ERROR) 924b9450e43SRui Paulo return (EIO); 925b9450e43SRui Paulo 926b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 927b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 928b9450e43SRui Paulo return (err); 929b9450e43SRui Paulo 930b9450e43SRui Paulo /* write request */ 931b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 932b9450e43SRui Paulo return (EINVAL); 933b9450e43SRui Paulo sc->voltage_sdram_i = val; 934b9450e43SRui Paulo 935b9450e43SRui Paulo VC_LOCK(sc); 936b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I, 937b9450e43SRui Paulo sc->voltage_sdram_i); 938b9450e43SRui Paulo VC_UNLOCK(sc); 939b9450e43SRui Paulo if (err == MSG_ERROR) { 940b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_i error\n"); 941b9450e43SRui Paulo return (EIO); 942b9450e43SRui Paulo } 943b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 944b9450e43SRui Paulo 945b9450e43SRui Paulo return (0); 946b9450e43SRui Paulo } 947b9450e43SRui Paulo 948b9450e43SRui Paulo static int 949b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS) 950b9450e43SRui Paulo { 951b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 952b9450e43SRui Paulo int val; 953b9450e43SRui Paulo int err; 954b9450e43SRui Paulo 955b9450e43SRui Paulo /* get realtime value */ 956b9450e43SRui Paulo VC_LOCK(sc); 957b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 958b9450e43SRui Paulo VC_UNLOCK(sc); 959b9450e43SRui Paulo if (val == MSG_ERROR) 960b9450e43SRui Paulo return (EIO); 961b9450e43SRui Paulo 962b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 963b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 964b9450e43SRui Paulo return (err); 965b9450e43SRui Paulo 966b9450e43SRui Paulo /* write request */ 967b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 968b9450e43SRui Paulo return (EINVAL); 969b9450e43SRui Paulo sc->voltage_sdram_p = val; 970b9450e43SRui Paulo 971b9450e43SRui Paulo VC_LOCK(sc); 972b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P, 973b9450e43SRui Paulo sc->voltage_sdram_p); 974b9450e43SRui Paulo VC_UNLOCK(sc); 975b9450e43SRui Paulo if (err == MSG_ERROR) { 976b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_p error\n"); 977b9450e43SRui Paulo return (EIO); 978b9450e43SRui Paulo } 979b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 980b9450e43SRui Paulo 981b9450e43SRui Paulo return (0); 982b9450e43SRui Paulo } 983b9450e43SRui Paulo 984b9450e43SRui Paulo static int 985b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS) 986b9450e43SRui Paulo { 987b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 988b9450e43SRui Paulo int val; 989b9450e43SRui Paulo int err; 990b9450e43SRui Paulo 991b9450e43SRui Paulo /* multiple write only */ 992b9450e43SRui Paulo if (!req->newptr) 993b9450e43SRui Paulo return (EINVAL); 994b9450e43SRui Paulo val = 0; 995b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 996b9450e43SRui Paulo if (err) 997b9450e43SRui Paulo return (err); 998b9450e43SRui Paulo 999b9450e43SRui Paulo /* write request */ 1000b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 1001b9450e43SRui Paulo return (EINVAL); 1002b9450e43SRui Paulo sc->voltage_sdram = val; 1003b9450e43SRui Paulo 1004b9450e43SRui Paulo VC_LOCK(sc); 1005b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C, 1006b9450e43SRui Paulo val); 1007b9450e43SRui Paulo if (err == MSG_ERROR) { 1008b9450e43SRui Paulo VC_UNLOCK(sc); 1009b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_c error\n"); 1010b9450e43SRui Paulo return (EIO); 1011b9450e43SRui Paulo } 1012b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I, 1013b9450e43SRui Paulo val); 1014b9450e43SRui Paulo if (err == MSG_ERROR) { 1015b9450e43SRui Paulo VC_UNLOCK(sc); 1016b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_i error\n"); 1017b9450e43SRui Paulo return (EIO); 1018b9450e43SRui Paulo } 1019b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P, 1020b9450e43SRui Paulo val); 1021b9450e43SRui Paulo if (err == MSG_ERROR) { 1022b9450e43SRui Paulo VC_UNLOCK(sc); 1023b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_p error\n"); 1024b9450e43SRui Paulo return (EIO); 1025b9450e43SRui Paulo } 1026b9450e43SRui Paulo VC_UNLOCK(sc); 1027b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1028b9450e43SRui Paulo 1029b9450e43SRui Paulo return (0); 1030b9450e43SRui Paulo } 1031b9450e43SRui Paulo 1032b9450e43SRui Paulo static int 1033b9450e43SRui Paulo sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS) 1034b9450e43SRui Paulo { 1035b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 1036b9450e43SRui Paulo int val; 1037b9450e43SRui Paulo int err; 1038b9450e43SRui Paulo 1039b9450e43SRui Paulo /* get realtime value */ 1040b9450e43SRui Paulo VC_LOCK(sc); 1041b9450e43SRui Paulo val = bcm2835_cpufreq_get_temperature(sc); 1042b9450e43SRui Paulo VC_UNLOCK(sc); 1043b9450e43SRui Paulo if (val == MSG_ERROR) 1044b9450e43SRui Paulo return (EIO); 1045b9450e43SRui Paulo 1046b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 1047b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 1048b9450e43SRui Paulo return (err); 1049b9450e43SRui Paulo 1050b9450e43SRui Paulo /* write request */ 1051b9450e43SRui Paulo return (EINVAL); 1052b9450e43SRui Paulo } 1053b9450e43SRui Paulo 1054b9450e43SRui Paulo static int 1055b9450e43SRui Paulo sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS) 1056b9450e43SRui Paulo { 1057b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 1058b9450e43SRui Paulo int val; 1059b9450e43SRui Paulo int err; 1060b9450e43SRui Paulo 1061b9450e43SRui Paulo /* get realtime value */ 1062b9450e43SRui Paulo VC_LOCK(sc); 1063b9450e43SRui Paulo val = bcm2835_cpufreq_get_temperature(sc); 1064b9450e43SRui Paulo VC_UNLOCK(sc); 1065b9450e43SRui Paulo if (val == MSG_ERROR) 1066b9450e43SRui Paulo return (EIO); 1067b9450e43SRui Paulo 1068b9450e43SRui Paulo /* 1/1000 celsius (raw) to 1/10 kelvin */ 1069e4b6eaf7SLuiz Otavio O Souza val = val / 100 + TZ_ZEROC; 1070b9450e43SRui Paulo 1071b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 1072b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 1073b9450e43SRui Paulo return (err); 1074b9450e43SRui Paulo 1075b9450e43SRui Paulo /* write request */ 1076b9450e43SRui Paulo return (EINVAL); 1077b9450e43SRui Paulo } 1078b9450e43SRui Paulo 1079b9450e43SRui Paulo 1080b9450e43SRui Paulo static void 1081b9450e43SRui Paulo bcm2835_cpufreq_init(void *arg) 1082b9450e43SRui Paulo { 1083b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg; 1084b9450e43SRui Paulo struct sysctl_ctx_list *ctx; 1085b9450e43SRui Paulo device_t cpu; 1086b9450e43SRui Paulo int arm_freq, core_freq, sdram_freq; 1087b9450e43SRui Paulo int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq; 1088b9450e43SRui Paulo int sdram_max_freq, sdram_min_freq; 1089b9450e43SRui Paulo int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p; 1090b9450e43SRui Paulo int max_voltage_core, min_voltage_core; 1091b9450e43SRui Paulo int max_voltage_sdram_c, min_voltage_sdram_c; 1092b9450e43SRui Paulo int max_voltage_sdram_i, min_voltage_sdram_i; 1093b9450e43SRui Paulo int max_voltage_sdram_p, min_voltage_sdram_p; 1094b9450e43SRui Paulo int turbo, temperature; 1095b9450e43SRui Paulo 1096b9450e43SRui Paulo VC_LOCK(sc); 1097b9450e43SRui Paulo 1098b9450e43SRui Paulo /* current clock */ 1099b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1100b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1101b9450e43SRui Paulo core_freq = bcm2835_cpufreq_get_clock_rate(sc, 1102b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1103b9450e43SRui Paulo sdram_freq = bcm2835_cpufreq_get_clock_rate(sc, 1104b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1105b9450e43SRui Paulo 1106b9450e43SRui Paulo /* max/min clock */ 1107b9450e43SRui Paulo arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1108b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1109b9450e43SRui Paulo arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1110b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1111b9450e43SRui Paulo core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1112b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1113b9450e43SRui Paulo core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1114b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1115b9450e43SRui Paulo sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1116b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1117b9450e43SRui Paulo sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1118b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1119b9450e43SRui Paulo 1120b9450e43SRui Paulo /* turbo mode */ 1121b9450e43SRui Paulo turbo = bcm2835_cpufreq_get_turbo(sc); 1122b9450e43SRui Paulo if (turbo > 0) 1123b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_ON; 1124b9450e43SRui Paulo else 1125b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_OFF; 1126b9450e43SRui Paulo 1127b9450e43SRui Paulo /* voltage */ 1128b9450e43SRui Paulo voltage_core = bcm2835_cpufreq_get_voltage(sc, 1129b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1130b9450e43SRui Paulo voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc, 1131b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1132b9450e43SRui Paulo voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc, 1133b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1134b9450e43SRui Paulo voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc, 1135b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1136b9450e43SRui Paulo 1137b9450e43SRui Paulo /* current values (offset from 1.2V) */ 1138b9450e43SRui Paulo sc->voltage_core = voltage_core; 1139b9450e43SRui Paulo sc->voltage_sdram = voltage_sdram_c; 1140b9450e43SRui Paulo sc->voltage_sdram_c = voltage_sdram_c; 1141b9450e43SRui Paulo sc->voltage_sdram_i = voltage_sdram_i; 1142b9450e43SRui Paulo sc->voltage_sdram_p = voltage_sdram_p; 1143b9450e43SRui Paulo 1144b9450e43SRui Paulo /* max/min voltage */ 1145b9450e43SRui Paulo max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc, 1146b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1147b9450e43SRui Paulo min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc, 1148b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1149b9450e43SRui Paulo max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc, 1150b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1151b9450e43SRui Paulo max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc, 1152b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1153b9450e43SRui Paulo max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc, 1154b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1155b9450e43SRui Paulo min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc, 1156b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1157b9450e43SRui Paulo min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc, 1158b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1159b9450e43SRui Paulo min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc, 1160b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1161b9450e43SRui Paulo 1162b9450e43SRui Paulo /* temperature */ 1163b9450e43SRui Paulo temperature = bcm2835_cpufreq_get_temperature(sc); 1164b9450e43SRui Paulo 1165b9450e43SRui Paulo /* show result */ 1166b9450e43SRui Paulo if (cpufreq_verbose || bootverbose) { 1167b9450e43SRui Paulo device_printf(sc->dev, "Boot settings:\n"); 1168b9450e43SRui Paulo device_printf(sc->dev, 1169b9450e43SRui Paulo "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n", 1170b9450e43SRui Paulo HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq), 1171b9450e43SRui Paulo (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF"); 1172b9450e43SRui Paulo 1173b9450e43SRui Paulo device_printf(sc->dev, 1174b9450e43SRui Paulo "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n", 1175b9450e43SRui Paulo HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq), 1176b9450e43SRui Paulo HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq), 1177b9450e43SRui Paulo HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq)); 1178b9450e43SRui Paulo 1179b9450e43SRui Paulo device_printf(sc->dev, 1180b9450e43SRui Paulo "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, " 1181b9450e43SRui Paulo "SDRAM_P %dmV\n", 1182b9450e43SRui Paulo OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c), 1183b9450e43SRui Paulo OFFSET2MVOLT(voltage_sdram_i), 1184b9450e43SRui Paulo OFFSET2MVOLT(voltage_sdram_p)); 1185b9450e43SRui Paulo 1186b9450e43SRui Paulo device_printf(sc->dev, 1187b9450e43SRui Paulo "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, " 1188b9450e43SRui Paulo "SDRAM_P %d/%dmV\n", 1189b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_core), 1190b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_core), 1191b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_c), 1192b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_c), 1193b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_i), 1194b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_i), 1195b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_p), 1196b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_p)); 1197b9450e43SRui Paulo 1198b9450e43SRui Paulo device_printf(sc->dev, 1199b9450e43SRui Paulo "Temperature %d.%dC\n", (temperature / 1000), 1200b9450e43SRui Paulo (temperature % 1000) / 100); 1201b9450e43SRui Paulo } else { /* !cpufreq_verbose && !bootverbose */ 1202b9450e43SRui Paulo device_printf(sc->dev, 1203b9450e43SRui Paulo "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n", 1204b9450e43SRui Paulo HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq), 1205b9450e43SRui Paulo (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF"); 1206b9450e43SRui Paulo } 1207b9450e43SRui Paulo 1208b9450e43SRui Paulo /* keep in softc (MHz/mV) */ 1209b9450e43SRui Paulo sc->arm_max_freq = HZ2MHZ(arm_max_freq); 1210b9450e43SRui Paulo sc->arm_min_freq = HZ2MHZ(arm_min_freq); 1211b9450e43SRui Paulo sc->core_max_freq = HZ2MHZ(core_max_freq); 1212b9450e43SRui Paulo sc->core_min_freq = HZ2MHZ(core_min_freq); 1213b9450e43SRui Paulo sc->sdram_max_freq = HZ2MHZ(sdram_max_freq); 1214b9450e43SRui Paulo sc->sdram_min_freq = HZ2MHZ(sdram_min_freq); 1215b9450e43SRui Paulo sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core); 1216b9450e43SRui Paulo sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core); 1217b9450e43SRui Paulo 1218b9450e43SRui Paulo /* if turbo is on, set to max values */ 1219b9450e43SRui Paulo if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) { 1220b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 1221b9450e43SRui Paulo arm_max_freq); 1222b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1223b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 1224b9450e43SRui Paulo core_max_freq); 1225b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1226b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1227b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq); 1228b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1229b9450e43SRui Paulo } else { 1230b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 1231b9450e43SRui Paulo arm_min_freq); 1232b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1233b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 1234b9450e43SRui Paulo core_min_freq); 1235b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1236b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1237b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq); 1238b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1239b9450e43SRui Paulo } 1240b9450e43SRui Paulo 1241b9450e43SRui Paulo VC_UNLOCK(sc); 1242b9450e43SRui Paulo 1243b9450e43SRui Paulo /* add human readable temperature to dev.cpu node */ 1244b9450e43SRui Paulo cpu = device_get_parent(sc->dev); 1245b9450e43SRui Paulo if (cpu != NULL) { 1246b9450e43SRui Paulo ctx = device_get_sysctl_ctx(cpu); 1247b9450e43SRui Paulo SYSCTL_ADD_PROC(ctx, 1248b9450e43SRui Paulo SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO, 12497029da5cSPawel Biernacki "temperature", 12507029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1251b9450e43SRui Paulo sysctl_bcm2835_devcpu_temperature, "IK", 1252b9450e43SRui Paulo "Current SoC temperature"); 1253b9450e43SRui Paulo } 1254b9450e43SRui Paulo 1255b9450e43SRui Paulo /* release this hook (continue boot) */ 1256b9450e43SRui Paulo config_intrhook_disestablish(&sc->init_hook); 1257b9450e43SRui Paulo } 1258b9450e43SRui Paulo 1259b9450e43SRui Paulo static void 1260b9450e43SRui Paulo bcm2835_cpufreq_identify(driver_t *driver, device_t parent) 1261b9450e43SRui Paulo { 1262e374c335SEmmanuel Vadot const struct ofw_compat_data *compat; 1263e374c335SEmmanuel Vadot phandle_t root; 1264e374c335SEmmanuel Vadot 1265e374c335SEmmanuel Vadot root = OF_finddevice("/"); 1266e374c335SEmmanuel Vadot for (compat = compat_data; compat->ocd_str != NULL; compat++) 126787acb7f8SAndrew Turner if (ofw_bus_node_is_compatible(root, compat->ocd_str)) 1268e374c335SEmmanuel Vadot break; 1269e374c335SEmmanuel Vadot 1270e374c335SEmmanuel Vadot if (compat->ocd_data == 0) 1271e374c335SEmmanuel Vadot return; 1272b9450e43SRui Paulo 1273b9450e43SRui Paulo DPRINTF("driver=%p, parent=%p\n", driver, parent); 1274b9450e43SRui Paulo if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL) 1275b9450e43SRui Paulo return; 1276b9450e43SRui Paulo if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL) 1277b9450e43SRui Paulo device_printf(parent, "add child failed\n"); 1278b9450e43SRui Paulo } 1279b9450e43SRui Paulo 1280b9450e43SRui Paulo static int 1281b9450e43SRui Paulo bcm2835_cpufreq_probe(device_t dev) 1282b9450e43SRui Paulo { 1283b9450e43SRui Paulo 1284962940ceSLuiz Otavio O Souza if (device_get_unit(dev) != 0) 1285962940ceSLuiz Otavio O Souza return (ENXIO); 1286b9450e43SRui Paulo device_set_desc(dev, "CPU Frequency Control"); 1287962940ceSLuiz Otavio O Souza 1288b9450e43SRui Paulo return (0); 1289b9450e43SRui Paulo } 1290b9450e43SRui Paulo 1291b9450e43SRui Paulo static int 1292b9450e43SRui Paulo bcm2835_cpufreq_attach(device_t dev) 1293b9450e43SRui Paulo { 1294b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1295b9450e43SRui Paulo struct sysctl_oid *oid; 1296b9450e43SRui Paulo 1297b9450e43SRui Paulo /* set self dev */ 1298b9450e43SRui Paulo sc = device_get_softc(dev); 1299b9450e43SRui Paulo sc->dev = dev; 1300b9450e43SRui Paulo 1301b9450e43SRui Paulo /* initial values */ 1302b9450e43SRui Paulo sc->arm_max_freq = -1; 1303b9450e43SRui Paulo sc->arm_min_freq = -1; 1304b9450e43SRui Paulo sc->core_max_freq = -1; 1305b9450e43SRui Paulo sc->core_min_freq = -1; 1306b9450e43SRui Paulo sc->sdram_max_freq = -1; 1307b9450e43SRui Paulo sc->sdram_min_freq = -1; 1308b9450e43SRui Paulo sc->max_voltage_core = 0; 1309b9450e43SRui Paulo sc->min_voltage_core = 0; 1310b9450e43SRui Paulo 1311b9450e43SRui Paulo /* setup sysctl at first device */ 1312b9450e43SRui Paulo if (device_get_unit(dev) == 0) { 1313b9450e43SRui Paulo sysctl_ctx_init(&bcm2835_sysctl_ctx); 1314b9450e43SRui Paulo /* create node for hw.cpufreq */ 1315b9450e43SRui Paulo oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx, 1316b9450e43SRui Paulo SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq", 13177029da5cSPawel Biernacki CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, ""); 1318b9450e43SRui Paulo 1319b9450e43SRui Paulo /* Frequency (Hz) */ 1320b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13217029da5cSPawel Biernacki OID_AUTO, "arm_freq", 13227029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1323b9450e43SRui Paulo sysctl_bcm2835_cpufreq_arm_freq, "IU", 1324b9450e43SRui Paulo "ARM frequency (Hz)"); 1325b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13267029da5cSPawel Biernacki OID_AUTO, "core_freq", 13277029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1328b9450e43SRui Paulo sysctl_bcm2835_cpufreq_core_freq, "IU", 1329b9450e43SRui Paulo "Core frequency (Hz)"); 1330b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13317029da5cSPawel Biernacki OID_AUTO, "sdram_freq", 13327029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1333b9450e43SRui Paulo sysctl_bcm2835_cpufreq_sdram_freq, "IU", 1334b9450e43SRui Paulo "SDRAM frequency (Hz)"); 1335b9450e43SRui Paulo 1336b9450e43SRui Paulo /* Turbo state */ 1337b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13387029da5cSPawel Biernacki OID_AUTO, "turbo", 13397029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1340b9450e43SRui Paulo sysctl_bcm2835_cpufreq_turbo, "IU", 1341b9450e43SRui Paulo "Disables dynamic clocking"); 1342b9450e43SRui Paulo 1343b9450e43SRui Paulo /* Voltage (offset from 1.2V in units of 0.025V) */ 1344b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13457029da5cSPawel Biernacki OID_AUTO, "voltage_core", 13467029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1347b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_core, "I", 1348b9450e43SRui Paulo "ARM/GPU core voltage" 1349b9450e43SRui Paulo "(offset from 1.2V in units of 0.025V)"); 1350b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13517029da5cSPawel Biernacki OID_AUTO, "voltage_sdram", 13527029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_WR | CTLFLAG_NEEDGIANT, sc, 1353b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I", 1354b9450e43SRui Paulo "SDRAM voltage (offset from 1.2V in units of 0.025V)"); 1355b9450e43SRui Paulo 1356b9450e43SRui Paulo /* Voltage individual SDRAM */ 1357b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13587029da5cSPawel Biernacki OID_AUTO, "voltage_sdram_c", 13597029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 1360b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I", 1361b9450e43SRui Paulo "SDRAM controller voltage" 1362b9450e43SRui Paulo "(offset from 1.2V in units of 0.025V)"); 1363b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13647029da5cSPawel Biernacki OID_AUTO, "voltage_sdram_i", 13657029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 1366b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I", 1367b9450e43SRui Paulo "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)"); 1368b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13697029da5cSPawel Biernacki OID_AUTO, "voltage_sdram_p", 13707029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 1371b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I", 1372b9450e43SRui Paulo "SDRAM phy voltage (offset from 1.2V in units of 0.025V)"); 1373b9450e43SRui Paulo 1374b9450e43SRui Paulo /* Temperature */ 1375b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 13767029da5cSPawel Biernacki OID_AUTO, "temperature", 13777029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1378b9450e43SRui Paulo sysctl_bcm2835_cpufreq_temperature, "I", 1379b9450e43SRui Paulo "SoC temperature (thousandths of a degree C)"); 1380b9450e43SRui Paulo } 1381b9450e43SRui Paulo 1382b9450e43SRui Paulo /* ARM->VC lock */ 1383b9450e43SRui Paulo sema_init(&vc_sema, 1, "vcsema"); 1384b9450e43SRui Paulo 1385b9450e43SRui Paulo /* register callback for using mbox when interrupts are enabled */ 1386b9450e43SRui Paulo sc->init_hook.ich_func = bcm2835_cpufreq_init; 1387b9450e43SRui Paulo sc->init_hook.ich_arg = sc; 1388b9450e43SRui Paulo 1389b9450e43SRui Paulo if (config_intrhook_establish(&sc->init_hook) != 0) { 1390b9450e43SRui Paulo device_printf(dev, "config_intrhook_establish failed\n"); 1391b9450e43SRui Paulo return (ENOMEM); 1392b9450e43SRui Paulo } 1393b9450e43SRui Paulo 1394b9450e43SRui Paulo /* this device is controlled by cpufreq(4) */ 1395b9450e43SRui Paulo cpufreq_register(dev); 1396b9450e43SRui Paulo 1397b9450e43SRui Paulo return (0); 1398b9450e43SRui Paulo } 1399b9450e43SRui Paulo 1400b9450e43SRui Paulo static int 1401b9450e43SRui Paulo bcm2835_cpufreq_detach(device_t dev) 1402b9450e43SRui Paulo { 1403b9450e43SRui Paulo 1404b9450e43SRui Paulo sema_destroy(&vc_sema); 1405b9450e43SRui Paulo 1406b9450e43SRui Paulo return (cpufreq_unregister(dev)); 1407b9450e43SRui Paulo } 1408b9450e43SRui Paulo 1409b9450e43SRui Paulo static int 1410b9450e43SRui Paulo bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf) 1411b9450e43SRui Paulo { 1412b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1413b9450e43SRui Paulo uint32_t rate_hz, rem; 1414151ba793SAlexander Kabaev int resp_freq, arm_freq, min_freq, core_freq; 1415151ba793SAlexander Kabaev #ifdef DEBUG 1416151ba793SAlexander Kabaev int cur_freq; 1417151ba793SAlexander Kabaev #endif 1418b9450e43SRui Paulo 1419b9450e43SRui Paulo if (cf == NULL || cf->freq < 0) 1420b9450e43SRui Paulo return (EINVAL); 1421b9450e43SRui Paulo 1422b9450e43SRui Paulo sc = device_get_softc(dev); 1423b9450e43SRui Paulo 1424b9450e43SRui Paulo /* setting clock (Hz) */ 1425b9450e43SRui Paulo rate_hz = (uint32_t)MHZ2HZ(cf->freq); 1426b9450e43SRui Paulo rem = rate_hz % HZSTEP; 1427b9450e43SRui Paulo rate_hz -= rem; 1428b9450e43SRui Paulo if (rate_hz == 0) 1429b9450e43SRui Paulo return (EINVAL); 1430b9450e43SRui Paulo 1431b9450e43SRui Paulo /* adjust min freq */ 1432b9450e43SRui Paulo min_freq = sc->arm_min_freq; 1433b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) 1434b9450e43SRui Paulo if (min_freq > cpufreq_lowest_freq) 1435b9450e43SRui Paulo min_freq = cpufreq_lowest_freq; 1436b9450e43SRui Paulo 1437b9450e43SRui Paulo if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq)) 1438b9450e43SRui Paulo return (EINVAL); 1439b9450e43SRui Paulo 1440b9450e43SRui Paulo /* set new value and verify it */ 1441b9450e43SRui Paulo VC_LOCK(sc); 1442151ba793SAlexander Kabaev #ifdef DEBUG 1443b9450e43SRui Paulo cur_freq = bcm2835_cpufreq_get_clock_rate(sc, 1444b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1445151ba793SAlexander Kabaev #endif 1446b9450e43SRui Paulo resp_freq = bcm2835_cpufreq_set_clock_rate(sc, 1447b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM, rate_hz); 1448b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1449b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1450b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1451b9450e43SRui Paulo 1452b9450e43SRui Paulo /* 1453b9450e43SRui Paulo * if non-turbo and lower than or equal min_freq, 1454b9450e43SRui Paulo * clock down core and sdram to default first. 1455b9450e43SRui Paulo */ 1456b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) { 1457b9450e43SRui Paulo core_freq = bcm2835_cpufreq_get_clock_rate(sc, 1458b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1459b9450e43SRui Paulo if (rate_hz > MHZ2HZ(sc->arm_min_freq)) { 1460b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1461b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1462b9450e43SRui Paulo MHZ2HZ(sc->core_max_freq)); 1463b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1464b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1465b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, 1466b9450e43SRui Paulo MHZ2HZ(sc->sdram_max_freq)); 1467b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1468b9450e43SRui Paulo } else { 1469b9450e43SRui Paulo if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY && 1470b9450e43SRui Paulo core_freq > DEFAULT_CORE_FREQUENCY) { 1471b9450e43SRui Paulo /* first, down to 250, then down to min */ 1472b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1473b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1474b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1475b9450e43SRui Paulo MHZ2HZ(DEFAULT_CORE_FREQUENCY)); 1476b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1477b9450e43SRui Paulo /* reset core voltage */ 1478b9450e43SRui Paulo bcm2835_cpufreq_set_voltage(sc, 1479b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE, 0); 1480b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1481b9450e43SRui Paulo } 1482b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1483b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1484b9450e43SRui Paulo MHZ2HZ(sc->core_min_freq)); 1485b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1486b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1487b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, 1488b9450e43SRui Paulo MHZ2HZ(sc->sdram_min_freq)); 1489b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1490b9450e43SRui Paulo } 1491b9450e43SRui Paulo } 1492b9450e43SRui Paulo 1493b9450e43SRui Paulo VC_UNLOCK(sc); 1494b9450e43SRui Paulo 1495b9450e43SRui Paulo if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) { 1496b9450e43SRui Paulo device_printf(dev, "wrong freq\n"); 1497b9450e43SRui Paulo return (EIO); 1498b9450e43SRui Paulo } 1499b9450e43SRui Paulo DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq); 1500b9450e43SRui Paulo 1501b9450e43SRui Paulo return (0); 1502b9450e43SRui Paulo } 1503b9450e43SRui Paulo 1504b9450e43SRui Paulo static int 1505b9450e43SRui Paulo bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf) 1506b9450e43SRui Paulo { 1507b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1508b9450e43SRui Paulo int arm_freq; 1509b9450e43SRui Paulo 1510b9450e43SRui Paulo if (cf == NULL) 1511b9450e43SRui Paulo return (EINVAL); 1512b9450e43SRui Paulo 1513b9450e43SRui Paulo sc = device_get_softc(dev); 1514b9450e43SRui Paulo memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf)); 1515b9450e43SRui Paulo cf->dev = NULL; 1516b9450e43SRui Paulo 1517b9450e43SRui Paulo /* get cuurent value */ 1518b9450e43SRui Paulo VC_LOCK(sc); 1519b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1520b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1521b9450e43SRui Paulo VC_UNLOCK(sc); 1522b9450e43SRui Paulo if (arm_freq < 0) { 1523b9450e43SRui Paulo device_printf(dev, "can't get clock\n"); 1524b9450e43SRui Paulo return (EINVAL); 1525b9450e43SRui Paulo } 1526b9450e43SRui Paulo 1527b9450e43SRui Paulo /* CPU clock in MHz or 100ths of a percent. */ 1528b9450e43SRui Paulo cf->freq = HZ2MHZ(arm_freq); 1529b9450e43SRui Paulo /* Voltage in mV. */ 1530b9450e43SRui Paulo cf->volts = CPUFREQ_VAL_UNKNOWN; 1531b9450e43SRui Paulo /* Power consumed in mW. */ 1532b9450e43SRui Paulo cf->power = CPUFREQ_VAL_UNKNOWN; 1533b9450e43SRui Paulo /* Transition latency in us. */ 1534b9450e43SRui Paulo cf->lat = TRANSITION_LATENCY; 1535b9450e43SRui Paulo /* Driver providing this setting. */ 1536b9450e43SRui Paulo cf->dev = dev; 1537b9450e43SRui Paulo 1538b9450e43SRui Paulo return (0); 1539b9450e43SRui Paulo } 1540b9450e43SRui Paulo 1541b9450e43SRui Paulo static int 1542b9450e43SRui Paulo bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets, 1543b9450e43SRui Paulo int *count) 1544b9450e43SRui Paulo { 1545b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1546b9450e43SRui Paulo int freq, min_freq, volts, rem; 1547b9450e43SRui Paulo int idx; 1548b9450e43SRui Paulo 1549b9450e43SRui Paulo sc = device_get_softc(dev); 1550b9450e43SRui Paulo freq = sc->arm_max_freq; 1551b9450e43SRui Paulo min_freq = sc->arm_min_freq; 1552b9450e43SRui Paulo 1553b9450e43SRui Paulo /* adjust head freq to STEP */ 1554b9450e43SRui Paulo rem = freq % MHZSTEP; 1555b9450e43SRui Paulo freq -= rem; 1556b9450e43SRui Paulo if (freq < min_freq) 1557b9450e43SRui Paulo freq = min_freq; 1558b9450e43SRui Paulo 1559b9450e43SRui Paulo /* if non-turbo, add extra low freq */ 1560b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) 1561b9450e43SRui Paulo if (min_freq > cpufreq_lowest_freq) 1562b9450e43SRui Paulo min_freq = cpufreq_lowest_freq; 1563b9450e43SRui Paulo 1564f1f425aeSOleksandr Tymoshenko #ifdef SOC_BCM2835 1565f1f425aeSOleksandr Tymoshenko /* from freq to min_freq */ 1566f1f425aeSOleksandr Tymoshenko for (idx = 0; idx < *count && freq >= min_freq; idx++) { 1567f1f425aeSOleksandr Tymoshenko if (freq > sc->arm_min_freq) 1568f1f425aeSOleksandr Tymoshenko volts = sc->max_voltage_core; 1569f1f425aeSOleksandr Tymoshenko else 1570f1f425aeSOleksandr Tymoshenko volts = sc->min_voltage_core; 1571f1f425aeSOleksandr Tymoshenko sets[idx].freq = freq; 1572f1f425aeSOleksandr Tymoshenko sets[idx].volts = volts; 1573f1f425aeSOleksandr Tymoshenko sets[idx].lat = TRANSITION_LATENCY; 1574f1f425aeSOleksandr Tymoshenko sets[idx].dev = dev; 1575f1f425aeSOleksandr Tymoshenko freq -= MHZSTEP; 1576f1f425aeSOleksandr Tymoshenko } 1577f1f425aeSOleksandr Tymoshenko #else 157811cede48SLuiz Otavio O Souza /* XXX RPi2 have only 900/600MHz */ 157911cede48SLuiz Otavio O Souza idx = 0; 158011cede48SLuiz Otavio O Souza volts = sc->min_voltage_core; 158111cede48SLuiz Otavio O Souza sets[idx].freq = freq; 158211cede48SLuiz Otavio O Souza sets[idx].volts = volts; 158311cede48SLuiz Otavio O Souza sets[idx].lat = TRANSITION_LATENCY; 158411cede48SLuiz Otavio O Souza sets[idx].dev = dev; 158511cede48SLuiz Otavio O Souza idx++; 158611cede48SLuiz Otavio O Souza if (freq != min_freq) { 158711cede48SLuiz Otavio O Souza sets[idx].freq = min_freq; 158811cede48SLuiz Otavio O Souza sets[idx].volts = volts; 158911cede48SLuiz Otavio O Souza sets[idx].lat = TRANSITION_LATENCY; 159011cede48SLuiz Otavio O Souza sets[idx].dev = dev; 159111cede48SLuiz Otavio O Souza idx++; 159211cede48SLuiz Otavio O Souza } 159311cede48SLuiz Otavio O Souza #endif 159411cede48SLuiz Otavio O Souza *count = idx; 1595b9450e43SRui Paulo 1596b9450e43SRui Paulo return (0); 1597b9450e43SRui Paulo } 1598b9450e43SRui Paulo 1599b9450e43SRui Paulo static int 1600b9450e43SRui Paulo bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count) 1601b9450e43SRui Paulo { 1602b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1603b9450e43SRui Paulo 1604b9450e43SRui Paulo if (sets == NULL || count == NULL) 1605b9450e43SRui Paulo return (EINVAL); 1606b9450e43SRui Paulo 1607b9450e43SRui Paulo sc = device_get_softc(dev); 1608b9450e43SRui Paulo if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) { 1609b9450e43SRui Paulo printf("device is not configured\n"); 1610b9450e43SRui Paulo return (EINVAL); 1611b9450e43SRui Paulo } 1612b9450e43SRui Paulo 1613b9450e43SRui Paulo /* fill data with unknown value */ 1614b9450e43SRui Paulo memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count)); 1615b9450e43SRui Paulo /* create new array up to count */ 1616b9450e43SRui Paulo bcm2835_cpufreq_make_freq_list(dev, sets, count); 1617b9450e43SRui Paulo 1618b9450e43SRui Paulo return (0); 1619b9450e43SRui Paulo } 1620b9450e43SRui Paulo 1621b9450e43SRui Paulo static int 1622b9450e43SRui Paulo bcm2835_cpufreq_type(device_t dev, int *type) 1623b9450e43SRui Paulo { 1624b9450e43SRui Paulo 1625b9450e43SRui Paulo if (type == NULL) 1626b9450e43SRui Paulo return (EINVAL); 1627b9450e43SRui Paulo *type = CPUFREQ_TYPE_ABSOLUTE; 1628b9450e43SRui Paulo 1629b9450e43SRui Paulo return (0); 1630b9450e43SRui Paulo } 1631b9450e43SRui Paulo 1632b9450e43SRui Paulo static device_method_t bcm2835_cpufreq_methods[] = { 1633b9450e43SRui Paulo /* Device interface */ 1634b9450e43SRui Paulo DEVMETHOD(device_identify, bcm2835_cpufreq_identify), 1635b9450e43SRui Paulo DEVMETHOD(device_probe, bcm2835_cpufreq_probe), 1636b9450e43SRui Paulo DEVMETHOD(device_attach, bcm2835_cpufreq_attach), 1637b9450e43SRui Paulo DEVMETHOD(device_detach, bcm2835_cpufreq_detach), 1638b9450e43SRui Paulo 1639b9450e43SRui Paulo /* cpufreq interface */ 1640b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set), 1641b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get), 1642b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings), 1643b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type), 1644b9450e43SRui Paulo 1645b9450e43SRui Paulo DEVMETHOD_END 1646b9450e43SRui Paulo }; 1647b9450e43SRui Paulo 1648b9450e43SRui Paulo static devclass_t bcm2835_cpufreq_devclass; 1649b9450e43SRui Paulo static driver_t bcm2835_cpufreq_driver = { 1650b9450e43SRui Paulo "bcm2835_cpufreq", 1651b9450e43SRui Paulo bcm2835_cpufreq_methods, 1652b9450e43SRui Paulo sizeof(struct bcm2835_cpufreq_softc), 1653b9450e43SRui Paulo }; 1654b9450e43SRui Paulo 1655b9450e43SRui Paulo DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver, 1656b9450e43SRui Paulo bcm2835_cpufreq_devclass, 0, 0); 1657