1b9450e43SRui Paulo /*- 211cede48SLuiz Otavio O Souza * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp> 3b9450e43SRui Paulo * All rights reserved. 4b9450e43SRui Paulo * 5b9450e43SRui Paulo * Redistribution and use in source and binary forms, with or without 6b9450e43SRui Paulo * modification, are permitted provided that the following conditions 7b9450e43SRui Paulo * are met: 8b9450e43SRui Paulo * 1. Redistributions of source code must retain the above copyright 9b9450e43SRui Paulo * notice, this list of conditions and the following disclaimer. 10b9450e43SRui Paulo * 2. Redistributions in binary form must reproduce the above copyright 11b9450e43SRui Paulo * notice, this list of conditions and the following disclaimer in the 12b9450e43SRui Paulo * documentation and/or other materials provided with the distribution. 13b9450e43SRui Paulo * 14b9450e43SRui Paulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15b9450e43SRui Paulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16b9450e43SRui Paulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17b9450e43SRui Paulo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18b9450e43SRui Paulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19b9450e43SRui Paulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20b9450e43SRui Paulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21b9450e43SRui Paulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22b9450e43SRui Paulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23b9450e43SRui Paulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24b9450e43SRui Paulo * SUCH DAMAGE. 25b9450e43SRui Paulo * 26b9450e43SRui Paulo */ 27b9450e43SRui Paulo 28b9450e43SRui Paulo #include <sys/cdefs.h> 29b9450e43SRui Paulo __FBSDID("$FreeBSD$"); 30b9450e43SRui Paulo 31b9450e43SRui Paulo #include <sys/param.h> 32b9450e43SRui Paulo #include <sys/systm.h> 33b9450e43SRui Paulo #include <sys/bus.h> 34b9450e43SRui Paulo #include <sys/cpu.h> 35b9450e43SRui Paulo #include <sys/kernel.h> 36b9450e43SRui Paulo #include <sys/lock.h> 37b9450e43SRui Paulo #include <sys/malloc.h> 38b9450e43SRui Paulo #include <sys/module.h> 39b9450e43SRui Paulo #include <sys/mutex.h> 40b9450e43SRui Paulo #include <sys/sema.h> 41b9450e43SRui Paulo #include <sys/sysctl.h> 42b9450e43SRui Paulo 43b9450e43SRui Paulo #include <machine/bus.h> 44b9450e43SRui Paulo #include <machine/cpu.h> 45b9450e43SRui Paulo #include <machine/intr.h> 46b9450e43SRui Paulo 47e374c335SEmmanuel Vadot #include <dev/ofw/ofw_bus.h> 48e374c335SEmmanuel Vadot #include <dev/ofw/ofw_bus_subr.h> 49e374c335SEmmanuel Vadot 50b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_mbox.h> 51b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h> 52b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_vcbus.h> 53b9450e43SRui Paulo 54b9450e43SRui Paulo #include "cpufreq_if.h" 55b9450e43SRui Paulo #include "mbox_if.h" 56b9450e43SRui Paulo 57b9450e43SRui Paulo #ifdef DEBUG 58b9450e43SRui Paulo #define DPRINTF(fmt, ...) do { \ 59b9450e43SRui Paulo printf("%s:%u: ", __func__, __LINE__); \ 60b9450e43SRui Paulo printf(fmt, ##__VA_ARGS__); \ 61b9450e43SRui Paulo } while (0) 62b9450e43SRui Paulo #else 63b9450e43SRui Paulo #define DPRINTF(fmt, ...) 64b9450e43SRui Paulo #endif 65b9450e43SRui Paulo 66b9450e43SRui Paulo #define HZ2MHZ(freq) ((freq) / (1000 * 1000)) 67b9450e43SRui Paulo #define MHZ2HZ(freq) ((freq) * (1000 * 1000)) 6811cede48SLuiz Otavio O Souza 69f1f425aeSOleksandr Tymoshenko #ifdef SOC_BCM2835 70b9450e43SRui Paulo #define OFFSET2MVOLT(val) (1200 + ((val) * 25)) 71b9450e43SRui Paulo #define MVOLT2OFFSET(val) (((val) - 1200) / 25) 72b9450e43SRui Paulo #define DEFAULT_ARM_FREQUENCY 700 7311cede48SLuiz Otavio O Souza #define DEFAULT_LOWEST_FREQ 300 74f1f425aeSOleksandr Tymoshenko #else 75f1f425aeSOleksandr Tymoshenko #define OFFSET2MVOLT(val) (((val) / 1000)) 76f1f425aeSOleksandr Tymoshenko #define MVOLT2OFFSET(val) (((val) * 1000)) 77f1f425aeSOleksandr Tymoshenko #define DEFAULT_ARM_FREQUENCY 600 78f1f425aeSOleksandr Tymoshenko #define DEFAULT_LOWEST_FREQ 600 7911cede48SLuiz Otavio O Souza #endif 80b9450e43SRui Paulo #define DEFAULT_CORE_FREQUENCY 250 81b9450e43SRui Paulo #define DEFAULT_SDRAM_FREQUENCY 400 82b9450e43SRui Paulo #define TRANSITION_LATENCY 1000 83b9450e43SRui Paulo #define MIN_OVER_VOLTAGE -16 84b9450e43SRui Paulo #define MAX_OVER_VOLTAGE 6 85b9450e43SRui Paulo #define MSG_ERROR -999999999 86b9450e43SRui Paulo #define MHZSTEP 100 87b9450e43SRui Paulo #define HZSTEP (MHZ2HZ(MHZSTEP)) 889d6672e1SLuiz Otavio O Souza #define TZ_ZEROC 2731 89b9450e43SRui Paulo 90b9450e43SRui Paulo #define VC_LOCK(sc) do { \ 91b9450e43SRui Paulo sema_wait(&vc_sema); \ 92b9450e43SRui Paulo } while (0) 93b9450e43SRui Paulo #define VC_UNLOCK(sc) do { \ 94b9450e43SRui Paulo sema_post(&vc_sema); \ 95b9450e43SRui Paulo } while (0) 96b9450e43SRui Paulo 97b9450e43SRui Paulo /* ARM->VC mailbox property semaphore */ 98b9450e43SRui Paulo static struct sema vc_sema; 99b9450e43SRui Paulo 100b9450e43SRui Paulo static struct sysctl_ctx_list bcm2835_sysctl_ctx; 101b9450e43SRui Paulo 102b9450e43SRui Paulo struct bcm2835_cpufreq_softc { 103b9450e43SRui Paulo device_t dev; 104b9450e43SRui Paulo int arm_max_freq; 105b9450e43SRui Paulo int arm_min_freq; 106b9450e43SRui Paulo int core_max_freq; 107b9450e43SRui Paulo int core_min_freq; 108b9450e43SRui Paulo int sdram_max_freq; 109b9450e43SRui Paulo int sdram_min_freq; 110b9450e43SRui Paulo int max_voltage_core; 111b9450e43SRui Paulo int min_voltage_core; 112b9450e43SRui Paulo 113b9450e43SRui Paulo /* the values written in mbox */ 114b9450e43SRui Paulo int voltage_core; 115b9450e43SRui Paulo int voltage_sdram; 116b9450e43SRui Paulo int voltage_sdram_c; 117b9450e43SRui Paulo int voltage_sdram_i; 118b9450e43SRui Paulo int voltage_sdram_p; 119b9450e43SRui Paulo int turbo_mode; 120b9450e43SRui Paulo 121b9450e43SRui Paulo /* initial hook for waiting mbox intr */ 122b9450e43SRui Paulo struct intr_config_hook init_hook; 123b9450e43SRui Paulo }; 124b9450e43SRui Paulo 125e374c335SEmmanuel Vadot static struct ofw_compat_data compat_data[] = { 126e374c335SEmmanuel Vadot { "broadcom,bcm2835-vc", 1 }, 127e374c335SEmmanuel Vadot { "broadcom,bcm2708-vc", 1 }, 128e374c335SEmmanuel Vadot { "brcm,bcm2709", 1 }, 129e446dd5dSPeter Jeremy { "brcm,bcm2835", 1 }, 130f362a398SEmmanuel Vadot { "brcm,bcm2836", 1 }, 131adcd9597SOleksandr Tymoshenko { "brcm,bcm2837", 1 }, 132e374c335SEmmanuel Vadot { NULL, 0 } 133e374c335SEmmanuel Vadot }; 134e374c335SEmmanuel Vadot 135b9450e43SRui Paulo static int cpufreq_verbose = 0; 136b9450e43SRui Paulo TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose); 137b9450e43SRui Paulo static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ; 138b9450e43SRui Paulo TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq); 139b9450e43SRui Paulo 140e9faba9dSLuiz Otavio O Souza #ifdef PROP_DEBUG 141b9450e43SRui Paulo static void 142b9450e43SRui Paulo bcm2835_dump(const void *data, int len) 143b9450e43SRui Paulo { 144b9450e43SRui Paulo const uint8_t *p = (const uint8_t*)data; 145b9450e43SRui Paulo int i; 146b9450e43SRui Paulo 147b9450e43SRui Paulo printf("dump @ %p:\n", data); 148b9450e43SRui Paulo for (i = 0; i < len; i++) { 149b9450e43SRui Paulo printf("%2.2x ", p[i]); 150b9450e43SRui Paulo if ((i % 4) == 3) 151b9450e43SRui Paulo printf(" "); 152b9450e43SRui Paulo if ((i % 16) == 15) 153b9450e43SRui Paulo printf("\n"); 154b9450e43SRui Paulo } 155b9450e43SRui Paulo printf("\n"); 156b9450e43SRui Paulo } 157b9450e43SRui Paulo #endif 158b9450e43SRui Paulo 159b9450e43SRui Paulo static int 160b9450e43SRui Paulo bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc, 161b9450e43SRui Paulo uint32_t clock_id) 162b9450e43SRui Paulo { 163cd3903c6SOleksandr Tymoshenko struct msg_get_clock_rate msg; 164b9450e43SRui Paulo int rate; 165b9450e43SRui Paulo int err; 166b9450e43SRui Paulo 167b9450e43SRui Paulo /* 168b9450e43SRui Paulo * Get clock rate 169b9450e43SRui Paulo * Tag: 0x00030002 170b9450e43SRui Paulo * Request: 171b9450e43SRui Paulo * Length: 4 172b9450e43SRui Paulo * Value: 173b9450e43SRui Paulo * u32: clock id 174b9450e43SRui Paulo * Response: 175b9450e43SRui Paulo * Length: 8 176b9450e43SRui Paulo * Value: 177b9450e43SRui Paulo * u32: clock id 178b9450e43SRui Paulo * u32: rate (in Hz) 179b9450e43SRui Paulo */ 180b9450e43SRui Paulo 181b9450e43SRui Paulo /* setup single tag buffer */ 182cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 183cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 184cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 185cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE; 186cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 187cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 188cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 189cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 190b9450e43SRui Paulo 191b9450e43SRui Paulo /* call mailbox property */ 192cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 193b9450e43SRui Paulo if (err) { 194b9450e43SRui Paulo device_printf(sc->dev, "can't get clock rate (id=%u)\n", 195b9450e43SRui Paulo clock_id); 196b9450e43SRui Paulo return (MSG_ERROR); 197b9450e43SRui Paulo } 198b9450e43SRui Paulo 199b9450e43SRui Paulo /* result (Hz) */ 200cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 201b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 202b9450e43SRui Paulo return (rate); 203b9450e43SRui Paulo } 204b9450e43SRui Paulo 205b9450e43SRui Paulo static int 206b9450e43SRui Paulo bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc, 207b9450e43SRui Paulo uint32_t clock_id) 208b9450e43SRui Paulo { 209cd3903c6SOleksandr Tymoshenko struct msg_get_max_clock_rate msg; 210b9450e43SRui Paulo int rate; 211b9450e43SRui Paulo int err; 212b9450e43SRui Paulo 213b9450e43SRui Paulo /* 214b9450e43SRui Paulo * Get max clock rate 215b9450e43SRui Paulo * Tag: 0x00030004 216b9450e43SRui Paulo * Request: 217b9450e43SRui Paulo * Length: 4 218b9450e43SRui Paulo * Value: 219b9450e43SRui Paulo * u32: clock id 220b9450e43SRui Paulo * Response: 221b9450e43SRui Paulo * Length: 8 222b9450e43SRui Paulo * Value: 223b9450e43SRui Paulo * u32: clock id 224b9450e43SRui Paulo * u32: rate (in Hz) 225b9450e43SRui Paulo */ 226b9450e43SRui Paulo 227b9450e43SRui Paulo /* setup single tag buffer */ 228cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 229cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 230cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 231cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE; 232cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 233cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 234cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 235cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 236b9450e43SRui Paulo 237b9450e43SRui Paulo /* call mailbox property */ 238cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 239b9450e43SRui Paulo if (err) { 240b9450e43SRui Paulo device_printf(sc->dev, "can't get max clock rate (id=%u)\n", 241b9450e43SRui Paulo clock_id); 242b9450e43SRui Paulo return (MSG_ERROR); 243b9450e43SRui Paulo } 244b9450e43SRui Paulo 245b9450e43SRui Paulo /* result (Hz) */ 246cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 247b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 248b9450e43SRui Paulo return (rate); 249b9450e43SRui Paulo } 250b9450e43SRui Paulo 251b9450e43SRui Paulo static int 252b9450e43SRui Paulo bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc, 253b9450e43SRui Paulo uint32_t clock_id) 254b9450e43SRui Paulo { 255cd3903c6SOleksandr Tymoshenko struct msg_get_min_clock_rate msg; 256b9450e43SRui Paulo int rate; 257b9450e43SRui Paulo int err; 258b9450e43SRui Paulo 259b9450e43SRui Paulo /* 260b9450e43SRui Paulo * Get min clock rate 261b9450e43SRui Paulo * Tag: 0x00030007 262b9450e43SRui Paulo * Request: 263b9450e43SRui Paulo * Length: 4 264b9450e43SRui Paulo * Value: 265b9450e43SRui Paulo * u32: clock id 266b9450e43SRui Paulo * Response: 267b9450e43SRui Paulo * Length: 8 268b9450e43SRui Paulo * Value: 269b9450e43SRui Paulo * u32: clock id 270b9450e43SRui Paulo * u32: rate (in Hz) 271b9450e43SRui Paulo */ 272b9450e43SRui Paulo 273b9450e43SRui Paulo /* setup single tag buffer */ 274cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 275cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 276cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 277cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE; 278cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 279cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 280cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 281cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 282b9450e43SRui Paulo 283b9450e43SRui Paulo /* call mailbox property */ 284cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 285b9450e43SRui Paulo if (err) { 286b9450e43SRui Paulo device_printf(sc->dev, "can't get min clock rate (id=%u)\n", 287b9450e43SRui Paulo clock_id); 288b9450e43SRui Paulo return (MSG_ERROR); 289b9450e43SRui Paulo } 290b9450e43SRui Paulo 291b9450e43SRui Paulo /* result (Hz) */ 292cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 293b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 294b9450e43SRui Paulo return (rate); 295b9450e43SRui Paulo } 296b9450e43SRui Paulo 297b9450e43SRui Paulo static int 298b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc, 299b9450e43SRui Paulo uint32_t clock_id, uint32_t rate_hz) 300b9450e43SRui Paulo { 301cd3903c6SOleksandr Tymoshenko struct msg_set_clock_rate msg; 302b9450e43SRui Paulo int rate; 303b9450e43SRui Paulo int err; 304b9450e43SRui Paulo 305b9450e43SRui Paulo /* 306b9450e43SRui Paulo * Set clock rate 307b9450e43SRui Paulo * Tag: 0x00038002 308b9450e43SRui Paulo * Request: 309b9450e43SRui Paulo * Length: 8 310b9450e43SRui Paulo * Value: 311b9450e43SRui Paulo * u32: clock id 312b9450e43SRui Paulo * u32: rate (in Hz) 313b9450e43SRui Paulo * Response: 314b9450e43SRui Paulo * Length: 8 315b9450e43SRui Paulo * Value: 316b9450e43SRui Paulo * u32: clock id 317b9450e43SRui Paulo * u32: rate (in Hz) 318b9450e43SRui Paulo */ 319b9450e43SRui Paulo 320b9450e43SRui Paulo /* setup single tag buffer */ 321cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 322cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 323cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 324cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE; 325cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 326cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 327cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 328cd3903c6SOleksandr Tymoshenko msg.body.req.rate_hz = rate_hz; 329cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 330b9450e43SRui Paulo 331b9450e43SRui Paulo /* call mailbox property */ 332cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 333b9450e43SRui Paulo if (err) { 334b9450e43SRui Paulo device_printf(sc->dev, "can't set clock rate (id=%u)\n", 335b9450e43SRui Paulo clock_id); 336b9450e43SRui Paulo return (MSG_ERROR); 337b9450e43SRui Paulo } 338b9450e43SRui Paulo 339b9450e43SRui Paulo /* workaround for core clock */ 340b9450e43SRui Paulo if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) { 341b9450e43SRui Paulo /* for safety (may change voltage without changing clock) */ 342b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 343b9450e43SRui Paulo 344b9450e43SRui Paulo /* 345b9450e43SRui Paulo * XXX: the core clock is unable to change at once, 346b9450e43SRui Paulo * to change certainly, write it twice now. 347b9450e43SRui Paulo */ 348b9450e43SRui Paulo 349b9450e43SRui Paulo /* setup single tag buffer */ 350cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 351cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 352cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 353cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE; 354cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 355cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 356cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 357cd3903c6SOleksandr Tymoshenko msg.body.req.rate_hz = rate_hz; 358cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 359b9450e43SRui Paulo 360b9450e43SRui Paulo /* call mailbox property */ 361cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 362b9450e43SRui Paulo if (err) { 363b9450e43SRui Paulo device_printf(sc->dev, 364b9450e43SRui Paulo "can't set clock rate (id=%u)\n", clock_id); 365b9450e43SRui Paulo return (MSG_ERROR); 366b9450e43SRui Paulo } 367b9450e43SRui Paulo } 368b9450e43SRui Paulo 369b9450e43SRui Paulo /* result (Hz) */ 370cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 371b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 372b9450e43SRui Paulo return (rate); 373b9450e43SRui Paulo } 374b9450e43SRui Paulo 375b9450e43SRui Paulo static int 376b9450e43SRui Paulo bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc) 377b9450e43SRui Paulo { 378cd3903c6SOleksandr Tymoshenko struct msg_get_turbo msg; 379b9450e43SRui Paulo int level; 380b9450e43SRui Paulo int err; 381b9450e43SRui Paulo 382b9450e43SRui Paulo /* 383b9450e43SRui Paulo * Get turbo 384b9450e43SRui Paulo * Tag: 0x00030009 385b9450e43SRui Paulo * Request: 386b9450e43SRui Paulo * Length: 4 387b9450e43SRui Paulo * Value: 388b9450e43SRui Paulo * u32: id 389b9450e43SRui Paulo * Response: 390b9450e43SRui Paulo * Length: 8 391b9450e43SRui Paulo * Value: 392b9450e43SRui Paulo * u32: id 393b9450e43SRui Paulo * u32: level 394b9450e43SRui Paulo */ 395b9450e43SRui Paulo 396b9450e43SRui Paulo /* setup single tag buffer */ 397cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 398cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 399cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 400cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO; 401cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 402cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 403cd3903c6SOleksandr Tymoshenko msg.body.req.id = 0; 404cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 405b9450e43SRui Paulo 406b9450e43SRui Paulo /* call mailbox property */ 407cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 408b9450e43SRui Paulo if (err) { 409b9450e43SRui Paulo device_printf(sc->dev, "can't get turbo\n"); 410b9450e43SRui Paulo return (MSG_ERROR); 411b9450e43SRui Paulo } 412b9450e43SRui Paulo 413b9450e43SRui Paulo /* result 0=non-turbo, 1=turbo */ 414cd3903c6SOleksandr Tymoshenko level = (int)msg.body.resp.level; 415b9450e43SRui Paulo DPRINTF("level = %d\n", level); 416b9450e43SRui Paulo return (level); 417b9450e43SRui Paulo } 418b9450e43SRui Paulo 419b9450e43SRui Paulo static int 420b9450e43SRui Paulo bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level) 421b9450e43SRui Paulo { 422cd3903c6SOleksandr Tymoshenko struct msg_set_turbo msg; 423b9450e43SRui Paulo int value; 424b9450e43SRui Paulo int err; 425b9450e43SRui Paulo 426b9450e43SRui Paulo /* 427b9450e43SRui Paulo * Set turbo 428b9450e43SRui Paulo * Tag: 0x00038009 429b9450e43SRui Paulo * Request: 430b9450e43SRui Paulo * Length: 8 431b9450e43SRui Paulo * Value: 432b9450e43SRui Paulo * u32: id 433b9450e43SRui Paulo * u32: level 434b9450e43SRui Paulo * Response: 435b9450e43SRui Paulo * Length: 8 436b9450e43SRui Paulo * Value: 437b9450e43SRui Paulo * u32: id 438b9450e43SRui Paulo * u32: level 439b9450e43SRui Paulo */ 440b9450e43SRui Paulo 441b9450e43SRui Paulo /* replace unknown value to OFF */ 442b9450e43SRui Paulo if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF) 443b9450e43SRui Paulo level = BCM2835_MBOX_TURBO_OFF; 444b9450e43SRui Paulo 445b9450e43SRui Paulo /* setup single tag buffer */ 446cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 447cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 448cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 449cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO; 450cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 451cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 452cd3903c6SOleksandr Tymoshenko msg.body.req.id = 0; 453cd3903c6SOleksandr Tymoshenko msg.body.req.level = level; 454cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 455b9450e43SRui Paulo 456b9450e43SRui Paulo /* call mailbox property */ 457cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 458b9450e43SRui Paulo if (err) { 459b9450e43SRui Paulo device_printf(sc->dev, "can't set turbo\n"); 460b9450e43SRui Paulo return (MSG_ERROR); 461b9450e43SRui Paulo } 462b9450e43SRui Paulo 463b9450e43SRui Paulo /* result 0=non-turbo, 1=turbo */ 464cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.level; 465b9450e43SRui Paulo DPRINTF("level = %d\n", value); 466b9450e43SRui Paulo return (value); 467b9450e43SRui Paulo } 468b9450e43SRui Paulo 469b9450e43SRui Paulo static int 470b9450e43SRui Paulo bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc, 471b9450e43SRui Paulo uint32_t voltage_id) 472b9450e43SRui Paulo { 473cd3903c6SOleksandr Tymoshenko struct msg_get_voltage msg; 474b9450e43SRui Paulo int value; 475b9450e43SRui Paulo int err; 476b9450e43SRui Paulo 477b9450e43SRui Paulo /* 478b9450e43SRui Paulo * Get voltage 479b9450e43SRui Paulo * Tag: 0x00030003 480b9450e43SRui Paulo * Request: 481b9450e43SRui Paulo * Length: 4 482b9450e43SRui Paulo * Value: 483b9450e43SRui Paulo * u32: voltage id 484b9450e43SRui Paulo * Response: 485b9450e43SRui Paulo * Length: 8 486b9450e43SRui Paulo * Value: 487b9450e43SRui Paulo * u32: voltage id 488b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 489b9450e43SRui Paulo */ 490b9450e43SRui Paulo 491b9450e43SRui Paulo /* setup single tag buffer */ 492cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 493cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 494cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 495cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE; 496cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 497cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 498cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 499cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 500b9450e43SRui Paulo 501b9450e43SRui Paulo /* call mailbox property */ 502cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 503b9450e43SRui Paulo if (err) { 504b9450e43SRui Paulo device_printf(sc->dev, "can't get voltage\n"); 505b9450e43SRui Paulo return (MSG_ERROR); 506b9450e43SRui Paulo } 507b9450e43SRui Paulo 508b9450e43SRui Paulo /* result (offset from 1.2V) */ 509cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 510b9450e43SRui Paulo DPRINTF("value = %d\n", value); 511b9450e43SRui Paulo return (value); 512b9450e43SRui Paulo } 513b9450e43SRui Paulo 514b9450e43SRui Paulo static int 515b9450e43SRui Paulo bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc, 516b9450e43SRui Paulo uint32_t voltage_id) 517b9450e43SRui Paulo { 518cd3903c6SOleksandr Tymoshenko struct msg_get_max_voltage msg; 519b9450e43SRui Paulo int value; 520b9450e43SRui Paulo int err; 521b9450e43SRui Paulo 522b9450e43SRui Paulo /* 523b9450e43SRui Paulo * Get voltage 524b9450e43SRui Paulo * Tag: 0x00030005 525b9450e43SRui Paulo * Request: 526b9450e43SRui Paulo * Length: 4 527b9450e43SRui Paulo * Value: 528b9450e43SRui Paulo * u32: voltage id 529b9450e43SRui Paulo * Response: 530b9450e43SRui Paulo * Length: 8 531b9450e43SRui Paulo * Value: 532b9450e43SRui Paulo * u32: voltage id 533b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 534b9450e43SRui Paulo */ 535b9450e43SRui Paulo 536b9450e43SRui Paulo /* setup single tag buffer */ 537cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 538cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 539cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 540cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE; 541cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 542cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 543cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 544cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 545b9450e43SRui Paulo 546b9450e43SRui Paulo /* call mailbox property */ 547cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 548b9450e43SRui Paulo if (err) { 549b9450e43SRui Paulo device_printf(sc->dev, "can't get max voltage\n"); 550b9450e43SRui Paulo return (MSG_ERROR); 551b9450e43SRui Paulo } 552b9450e43SRui Paulo 553b9450e43SRui Paulo /* result (offset from 1.2V) */ 554cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 555b9450e43SRui Paulo DPRINTF("value = %d\n", value); 556b9450e43SRui Paulo return (value); 557b9450e43SRui Paulo } 558b9450e43SRui Paulo static int 559b9450e43SRui Paulo bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc, 560b9450e43SRui Paulo uint32_t voltage_id) 561b9450e43SRui Paulo { 562cd3903c6SOleksandr Tymoshenko struct msg_get_min_voltage msg; 563b9450e43SRui Paulo int value; 564b9450e43SRui Paulo int err; 565b9450e43SRui Paulo 566b9450e43SRui Paulo /* 567b9450e43SRui Paulo * Get voltage 568b9450e43SRui Paulo * Tag: 0x00030008 569b9450e43SRui Paulo * Request: 570b9450e43SRui Paulo * Length: 4 571b9450e43SRui Paulo * Value: 572b9450e43SRui Paulo * u32: voltage id 573b9450e43SRui Paulo * Response: 574b9450e43SRui Paulo * Length: 8 575b9450e43SRui Paulo * Value: 576b9450e43SRui Paulo * u32: voltage id 577b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 578b9450e43SRui Paulo */ 579b9450e43SRui Paulo 580b9450e43SRui Paulo /* setup single tag buffer */ 581cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 582cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 583cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 584cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE; 585cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 586cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 587cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 588cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 589b9450e43SRui Paulo 590b9450e43SRui Paulo /* call mailbox property */ 591cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 592b9450e43SRui Paulo if (err) { 593b9450e43SRui Paulo device_printf(sc->dev, "can't get min voltage\n"); 594b9450e43SRui Paulo return (MSG_ERROR); 595b9450e43SRui Paulo } 596b9450e43SRui Paulo 597b9450e43SRui Paulo /* result (offset from 1.2V) */ 598cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 599b9450e43SRui Paulo DPRINTF("value = %d\n", value); 600b9450e43SRui Paulo return (value); 601b9450e43SRui Paulo } 602b9450e43SRui Paulo 603b9450e43SRui Paulo static int 604b9450e43SRui Paulo bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc, 605b9450e43SRui Paulo uint32_t voltage_id, int32_t value) 606b9450e43SRui Paulo { 607cd3903c6SOleksandr Tymoshenko struct msg_set_voltage msg; 608b9450e43SRui Paulo int err; 609b9450e43SRui Paulo 610b9450e43SRui Paulo /* 611b9450e43SRui Paulo * Set voltage 612b9450e43SRui Paulo * Tag: 0x00038003 613b9450e43SRui Paulo * Request: 614b9450e43SRui Paulo * Length: 4 615b9450e43SRui Paulo * Value: 616b9450e43SRui Paulo * u32: voltage id 617b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 618b9450e43SRui Paulo * Response: 619b9450e43SRui Paulo * Length: 8 620b9450e43SRui Paulo * Value: 621b9450e43SRui Paulo * u32: voltage id 622b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 623b9450e43SRui Paulo */ 624b9450e43SRui Paulo 625b9450e43SRui Paulo /* 626b9450e43SRui Paulo * over_voltage: 627b9450e43SRui Paulo * 0 (1.2 V). Values above 6 are only allowed when force_turbo or 628b9450e43SRui Paulo * current_limit_override are specified (which set the warranty bit). 629b9450e43SRui Paulo */ 630b9450e43SRui Paulo if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) { 631b9450e43SRui Paulo /* currently not supported */ 632b9450e43SRui Paulo device_printf(sc->dev, "not supported voltage: %d\n", value); 633b9450e43SRui Paulo return (MSG_ERROR); 634b9450e43SRui Paulo } 635b9450e43SRui Paulo 636b9450e43SRui Paulo /* setup single tag buffer */ 637cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 638cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 639cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 640cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE; 641cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 642cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 643cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 644cd3903c6SOleksandr Tymoshenko msg.body.req.value = (uint32_t)value; 645cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 646b9450e43SRui Paulo 647b9450e43SRui Paulo /* call mailbox property */ 648cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 649b9450e43SRui Paulo if (err) { 650b9450e43SRui Paulo device_printf(sc->dev, "can't set voltage\n"); 651b9450e43SRui Paulo return (MSG_ERROR); 652b9450e43SRui Paulo } 653b9450e43SRui Paulo 654b9450e43SRui Paulo /* result (offset from 1.2V) */ 655cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 656b9450e43SRui Paulo DPRINTF("value = %d\n", value); 657b9450e43SRui Paulo return (value); 658b9450e43SRui Paulo } 659b9450e43SRui Paulo 660b9450e43SRui Paulo static int 661b9450e43SRui Paulo bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc) 662b9450e43SRui Paulo { 663cd3903c6SOleksandr Tymoshenko struct msg_get_temperature msg; 664b9450e43SRui Paulo int value; 665b9450e43SRui Paulo int err; 666b9450e43SRui Paulo 667b9450e43SRui Paulo /* 668b9450e43SRui Paulo * Get temperature 669b9450e43SRui Paulo * Tag: 0x00030006 670b9450e43SRui Paulo * Request: 671b9450e43SRui Paulo * Length: 4 672b9450e43SRui Paulo * Value: 673b9450e43SRui Paulo * u32: temperature id 674b9450e43SRui Paulo * Response: 675b9450e43SRui Paulo * Length: 8 676b9450e43SRui Paulo * Value: 677b9450e43SRui Paulo * u32: temperature id 678b9450e43SRui Paulo * u32: value 679b9450e43SRui Paulo */ 680b9450e43SRui Paulo 681b9450e43SRui Paulo /* setup single tag buffer */ 682cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 683cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 684cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 685cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE; 686cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 687cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 688cd3903c6SOleksandr Tymoshenko msg.body.req.temperature_id = 0; 689cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 690b9450e43SRui Paulo 691b9450e43SRui Paulo /* call mailbox property */ 692cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 693b9450e43SRui Paulo if (err) { 694b9450e43SRui Paulo device_printf(sc->dev, "can't get temperature\n"); 695b9450e43SRui Paulo return (MSG_ERROR); 696b9450e43SRui Paulo } 697b9450e43SRui Paulo 698b9450e43SRui Paulo /* result (temperature of degree C) */ 699cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 700b9450e43SRui Paulo DPRINTF("value = %d\n", value); 701b9450e43SRui Paulo return (value); 702b9450e43SRui Paulo } 703b9450e43SRui Paulo 704b9450e43SRui Paulo 705b9450e43SRui Paulo 706b9450e43SRui Paulo static int 707b9450e43SRui Paulo sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS) 708b9450e43SRui Paulo { 709b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 710b9450e43SRui Paulo int val; 711b9450e43SRui Paulo int err; 712b9450e43SRui Paulo 713b9450e43SRui Paulo /* get realtime value */ 714b9450e43SRui Paulo VC_LOCK(sc); 715b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM); 716b9450e43SRui Paulo VC_UNLOCK(sc); 717b9450e43SRui Paulo if (val == MSG_ERROR) 718b9450e43SRui Paulo return (EIO); 719b9450e43SRui Paulo 720b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 721b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 722b9450e43SRui Paulo return (err); 723b9450e43SRui Paulo 724b9450e43SRui Paulo /* write request */ 725b9450e43SRui Paulo VC_LOCK(sc); 726b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 727b9450e43SRui Paulo val); 728b9450e43SRui Paulo VC_UNLOCK(sc); 729b9450e43SRui Paulo if (err == MSG_ERROR) { 730b9450e43SRui Paulo device_printf(sc->dev, "set clock arm_freq error\n"); 731b9450e43SRui Paulo return (EIO); 732b9450e43SRui Paulo } 733b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 734b9450e43SRui Paulo 735b9450e43SRui Paulo return (0); 736b9450e43SRui Paulo } 737b9450e43SRui Paulo 738b9450e43SRui Paulo static int 739b9450e43SRui Paulo sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS) 740b9450e43SRui Paulo { 741b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 742b9450e43SRui Paulo int val; 743b9450e43SRui Paulo int err; 744b9450e43SRui Paulo 745b9450e43SRui Paulo /* get realtime value */ 746b9450e43SRui Paulo VC_LOCK(sc); 747b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE); 748b9450e43SRui Paulo VC_UNLOCK(sc); 749b9450e43SRui Paulo if (val == MSG_ERROR) 750b9450e43SRui Paulo return (EIO); 751b9450e43SRui Paulo 752b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 753b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 754b9450e43SRui Paulo return (err); 755b9450e43SRui Paulo 756b9450e43SRui Paulo /* write request */ 757b9450e43SRui Paulo VC_LOCK(sc); 758b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 759b9450e43SRui Paulo val); 760b9450e43SRui Paulo if (err == MSG_ERROR) { 761b9450e43SRui Paulo VC_UNLOCK(sc); 762b9450e43SRui Paulo device_printf(sc->dev, "set clock core_freq error\n"); 763b9450e43SRui Paulo return (EIO); 764b9450e43SRui Paulo } 765b9450e43SRui Paulo VC_UNLOCK(sc); 766b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 767b9450e43SRui Paulo 768b9450e43SRui Paulo return (0); 769b9450e43SRui Paulo } 770b9450e43SRui Paulo 771b9450e43SRui Paulo static int 772b9450e43SRui Paulo sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS) 773b9450e43SRui Paulo { 774b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 775b9450e43SRui Paulo int val; 776b9450e43SRui Paulo int err; 777b9450e43SRui Paulo 778b9450e43SRui Paulo /* get realtime value */ 779b9450e43SRui Paulo VC_LOCK(sc); 780b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM); 781b9450e43SRui Paulo VC_UNLOCK(sc); 782b9450e43SRui Paulo if (val == MSG_ERROR) 783b9450e43SRui Paulo return (EIO); 784b9450e43SRui Paulo 785b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 786b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 787b9450e43SRui Paulo return (err); 788b9450e43SRui Paulo 789b9450e43SRui Paulo /* write request */ 790b9450e43SRui Paulo VC_LOCK(sc); 791b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM, 792b9450e43SRui Paulo val); 793b9450e43SRui Paulo VC_UNLOCK(sc); 794b9450e43SRui Paulo if (err == MSG_ERROR) { 795b9450e43SRui Paulo device_printf(sc->dev, "set clock sdram_freq error\n"); 796b9450e43SRui Paulo return (EIO); 797b9450e43SRui Paulo } 798b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 799b9450e43SRui Paulo 800b9450e43SRui Paulo return (0); 801b9450e43SRui Paulo } 802b9450e43SRui Paulo 803b9450e43SRui Paulo static int 804b9450e43SRui Paulo sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS) 805b9450e43SRui Paulo { 806b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 807b9450e43SRui Paulo int val; 808b9450e43SRui Paulo int err; 809b9450e43SRui Paulo 810b9450e43SRui Paulo /* get realtime value */ 811b9450e43SRui Paulo VC_LOCK(sc); 812b9450e43SRui Paulo val = bcm2835_cpufreq_get_turbo(sc); 813b9450e43SRui Paulo VC_UNLOCK(sc); 814b9450e43SRui Paulo if (val == MSG_ERROR) 815b9450e43SRui Paulo return (EIO); 816b9450e43SRui Paulo 817b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 818b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 819b9450e43SRui Paulo return (err); 820b9450e43SRui Paulo 821b9450e43SRui Paulo /* write request */ 822b9450e43SRui Paulo if (val > 0) 823b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_ON; 824b9450e43SRui Paulo else 825b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_OFF; 826b9450e43SRui Paulo 827b9450e43SRui Paulo VC_LOCK(sc); 828b9450e43SRui Paulo err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode); 829b9450e43SRui Paulo VC_UNLOCK(sc); 830b9450e43SRui Paulo if (err == MSG_ERROR) { 831b9450e43SRui Paulo device_printf(sc->dev, "set turbo error\n"); 832b9450e43SRui Paulo return (EIO); 833b9450e43SRui Paulo } 834b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 835b9450e43SRui Paulo 836b9450e43SRui Paulo return (0); 837b9450e43SRui Paulo } 838b9450e43SRui Paulo 839b9450e43SRui Paulo static int 840b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS) 841b9450e43SRui Paulo { 842b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 843b9450e43SRui Paulo int val; 844b9450e43SRui Paulo int err; 845b9450e43SRui Paulo 846b9450e43SRui Paulo /* get realtime value */ 847b9450e43SRui Paulo VC_LOCK(sc); 848b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE); 849b9450e43SRui Paulo VC_UNLOCK(sc); 850b9450e43SRui Paulo if (val == MSG_ERROR) 851b9450e43SRui Paulo return (EIO); 852b9450e43SRui Paulo 853b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 854b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 855b9450e43SRui Paulo return (err); 856b9450e43SRui Paulo 857b9450e43SRui Paulo /* write request */ 858b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 859b9450e43SRui Paulo return (EINVAL); 860b9450e43SRui Paulo sc->voltage_core = val; 861b9450e43SRui Paulo 862b9450e43SRui Paulo VC_LOCK(sc); 863b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE, 864b9450e43SRui Paulo sc->voltage_core); 865b9450e43SRui Paulo VC_UNLOCK(sc); 866b9450e43SRui Paulo if (err == MSG_ERROR) { 867b9450e43SRui Paulo device_printf(sc->dev, "set voltage core error\n"); 868b9450e43SRui Paulo return (EIO); 869b9450e43SRui Paulo } 870b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 871b9450e43SRui Paulo 872b9450e43SRui Paulo return (0); 873b9450e43SRui Paulo } 874b9450e43SRui Paulo 875b9450e43SRui Paulo static int 876b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS) 877b9450e43SRui Paulo { 878b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 879b9450e43SRui Paulo int val; 880b9450e43SRui Paulo int err; 881b9450e43SRui Paulo 882b9450e43SRui Paulo /* get realtime value */ 883b9450e43SRui Paulo VC_LOCK(sc); 884b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 885b9450e43SRui Paulo VC_UNLOCK(sc); 886b9450e43SRui Paulo if (val == MSG_ERROR) 887b9450e43SRui Paulo return (EIO); 888b9450e43SRui Paulo 889b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 890b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 891b9450e43SRui Paulo return (err); 892b9450e43SRui Paulo 893b9450e43SRui Paulo /* write request */ 894b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 895b9450e43SRui Paulo return (EINVAL); 896b9450e43SRui Paulo sc->voltage_sdram_c = val; 897b9450e43SRui Paulo 898b9450e43SRui Paulo VC_LOCK(sc); 899b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C, 900b9450e43SRui Paulo sc->voltage_sdram_c); 901b9450e43SRui Paulo VC_UNLOCK(sc); 902b9450e43SRui Paulo if (err == MSG_ERROR) { 903b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_c error\n"); 904b9450e43SRui Paulo return (EIO); 905b9450e43SRui Paulo } 906b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 907b9450e43SRui Paulo 908b9450e43SRui Paulo return (0); 909b9450e43SRui Paulo } 910b9450e43SRui Paulo 911b9450e43SRui Paulo static int 912b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS) 913b9450e43SRui Paulo { 914b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 915b9450e43SRui Paulo int val; 916b9450e43SRui Paulo int err; 917b9450e43SRui Paulo 918b9450e43SRui Paulo /* get realtime value */ 919b9450e43SRui Paulo VC_LOCK(sc); 920b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 921b9450e43SRui Paulo VC_UNLOCK(sc); 922b9450e43SRui Paulo if (val == MSG_ERROR) 923b9450e43SRui Paulo return (EIO); 924b9450e43SRui Paulo 925b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 926b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 927b9450e43SRui Paulo return (err); 928b9450e43SRui Paulo 929b9450e43SRui Paulo /* write request */ 930b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 931b9450e43SRui Paulo return (EINVAL); 932b9450e43SRui Paulo sc->voltage_sdram_i = val; 933b9450e43SRui Paulo 934b9450e43SRui Paulo VC_LOCK(sc); 935b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I, 936b9450e43SRui Paulo sc->voltage_sdram_i); 937b9450e43SRui Paulo VC_UNLOCK(sc); 938b9450e43SRui Paulo if (err == MSG_ERROR) { 939b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_i error\n"); 940b9450e43SRui Paulo return (EIO); 941b9450e43SRui Paulo } 942b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 943b9450e43SRui Paulo 944b9450e43SRui Paulo return (0); 945b9450e43SRui Paulo } 946b9450e43SRui Paulo 947b9450e43SRui Paulo static int 948b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS) 949b9450e43SRui Paulo { 950b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 951b9450e43SRui Paulo int val; 952b9450e43SRui Paulo int err; 953b9450e43SRui Paulo 954b9450e43SRui Paulo /* get realtime value */ 955b9450e43SRui Paulo VC_LOCK(sc); 956b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 957b9450e43SRui Paulo VC_UNLOCK(sc); 958b9450e43SRui Paulo if (val == MSG_ERROR) 959b9450e43SRui Paulo return (EIO); 960b9450e43SRui Paulo 961b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 962b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 963b9450e43SRui Paulo return (err); 964b9450e43SRui Paulo 965b9450e43SRui Paulo /* write request */ 966b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 967b9450e43SRui Paulo return (EINVAL); 968b9450e43SRui Paulo sc->voltage_sdram_p = val; 969b9450e43SRui Paulo 970b9450e43SRui Paulo VC_LOCK(sc); 971b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P, 972b9450e43SRui Paulo sc->voltage_sdram_p); 973b9450e43SRui Paulo VC_UNLOCK(sc); 974b9450e43SRui Paulo if (err == MSG_ERROR) { 975b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_p error\n"); 976b9450e43SRui Paulo return (EIO); 977b9450e43SRui Paulo } 978b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 979b9450e43SRui Paulo 980b9450e43SRui Paulo return (0); 981b9450e43SRui Paulo } 982b9450e43SRui Paulo 983b9450e43SRui Paulo static int 984b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS) 985b9450e43SRui Paulo { 986b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 987b9450e43SRui Paulo int val; 988b9450e43SRui Paulo int err; 989b9450e43SRui Paulo 990b9450e43SRui Paulo /* multiple write only */ 991b9450e43SRui Paulo if (!req->newptr) 992b9450e43SRui Paulo return (EINVAL); 993b9450e43SRui Paulo val = 0; 994b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 995b9450e43SRui Paulo if (err) 996b9450e43SRui Paulo return (err); 997b9450e43SRui Paulo 998b9450e43SRui Paulo /* write request */ 999b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 1000b9450e43SRui Paulo return (EINVAL); 1001b9450e43SRui Paulo sc->voltage_sdram = val; 1002b9450e43SRui Paulo 1003b9450e43SRui Paulo VC_LOCK(sc); 1004b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C, 1005b9450e43SRui Paulo val); 1006b9450e43SRui Paulo if (err == MSG_ERROR) { 1007b9450e43SRui Paulo VC_UNLOCK(sc); 1008b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_c error\n"); 1009b9450e43SRui Paulo return (EIO); 1010b9450e43SRui Paulo } 1011b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I, 1012b9450e43SRui Paulo val); 1013b9450e43SRui Paulo if (err == MSG_ERROR) { 1014b9450e43SRui Paulo VC_UNLOCK(sc); 1015b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_i error\n"); 1016b9450e43SRui Paulo return (EIO); 1017b9450e43SRui Paulo } 1018b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P, 1019b9450e43SRui Paulo val); 1020b9450e43SRui Paulo if (err == MSG_ERROR) { 1021b9450e43SRui Paulo VC_UNLOCK(sc); 1022b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_p error\n"); 1023b9450e43SRui Paulo return (EIO); 1024b9450e43SRui Paulo } 1025b9450e43SRui Paulo VC_UNLOCK(sc); 1026b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1027b9450e43SRui Paulo 1028b9450e43SRui Paulo return (0); 1029b9450e43SRui Paulo } 1030b9450e43SRui Paulo 1031b9450e43SRui Paulo static int 1032b9450e43SRui Paulo sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS) 1033b9450e43SRui Paulo { 1034b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 1035b9450e43SRui Paulo int val; 1036b9450e43SRui Paulo int err; 1037b9450e43SRui Paulo 1038b9450e43SRui Paulo /* get realtime value */ 1039b9450e43SRui Paulo VC_LOCK(sc); 1040b9450e43SRui Paulo val = bcm2835_cpufreq_get_temperature(sc); 1041b9450e43SRui Paulo VC_UNLOCK(sc); 1042b9450e43SRui Paulo if (val == MSG_ERROR) 1043b9450e43SRui Paulo return (EIO); 1044b9450e43SRui Paulo 1045b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 1046b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 1047b9450e43SRui Paulo return (err); 1048b9450e43SRui Paulo 1049b9450e43SRui Paulo /* write request */ 1050b9450e43SRui Paulo return (EINVAL); 1051b9450e43SRui Paulo } 1052b9450e43SRui Paulo 1053b9450e43SRui Paulo static int 1054b9450e43SRui Paulo sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS) 1055b9450e43SRui Paulo { 1056b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 1057b9450e43SRui Paulo int val; 1058b9450e43SRui Paulo int err; 1059b9450e43SRui Paulo 1060b9450e43SRui Paulo /* get realtime value */ 1061b9450e43SRui Paulo VC_LOCK(sc); 1062b9450e43SRui Paulo val = bcm2835_cpufreq_get_temperature(sc); 1063b9450e43SRui Paulo VC_UNLOCK(sc); 1064b9450e43SRui Paulo if (val == MSG_ERROR) 1065b9450e43SRui Paulo return (EIO); 1066b9450e43SRui Paulo 1067b9450e43SRui Paulo /* 1/1000 celsius (raw) to 1/10 kelvin */ 1068e4b6eaf7SLuiz Otavio O Souza val = val / 100 + TZ_ZEROC; 1069b9450e43SRui Paulo 1070b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 1071b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 1072b9450e43SRui Paulo return (err); 1073b9450e43SRui Paulo 1074b9450e43SRui Paulo /* write request */ 1075b9450e43SRui Paulo return (EINVAL); 1076b9450e43SRui Paulo } 1077b9450e43SRui Paulo 1078b9450e43SRui Paulo 1079b9450e43SRui Paulo static void 1080b9450e43SRui Paulo bcm2835_cpufreq_init(void *arg) 1081b9450e43SRui Paulo { 1082b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg; 1083b9450e43SRui Paulo struct sysctl_ctx_list *ctx; 1084b9450e43SRui Paulo device_t cpu; 1085b9450e43SRui Paulo int arm_freq, core_freq, sdram_freq; 1086b9450e43SRui Paulo int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq; 1087b9450e43SRui Paulo int sdram_max_freq, sdram_min_freq; 1088b9450e43SRui Paulo int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p; 1089b9450e43SRui Paulo int max_voltage_core, min_voltage_core; 1090b9450e43SRui Paulo int max_voltage_sdram_c, min_voltage_sdram_c; 1091b9450e43SRui Paulo int max_voltage_sdram_i, min_voltage_sdram_i; 1092b9450e43SRui Paulo int max_voltage_sdram_p, min_voltage_sdram_p; 1093b9450e43SRui Paulo int turbo, temperature; 1094b9450e43SRui Paulo 1095b9450e43SRui Paulo VC_LOCK(sc); 1096b9450e43SRui Paulo 1097b9450e43SRui Paulo /* current clock */ 1098b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1099b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1100b9450e43SRui Paulo core_freq = bcm2835_cpufreq_get_clock_rate(sc, 1101b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1102b9450e43SRui Paulo sdram_freq = bcm2835_cpufreq_get_clock_rate(sc, 1103b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1104b9450e43SRui Paulo 1105b9450e43SRui Paulo /* max/min clock */ 1106b9450e43SRui Paulo arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1107b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1108b9450e43SRui Paulo arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1109b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1110b9450e43SRui Paulo core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1111b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1112b9450e43SRui Paulo core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1113b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1114b9450e43SRui Paulo sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1115b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1116b9450e43SRui Paulo sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1117b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1118b9450e43SRui Paulo 1119b9450e43SRui Paulo /* turbo mode */ 1120b9450e43SRui Paulo turbo = bcm2835_cpufreq_get_turbo(sc); 1121b9450e43SRui Paulo if (turbo > 0) 1122b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_ON; 1123b9450e43SRui Paulo else 1124b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_OFF; 1125b9450e43SRui Paulo 1126b9450e43SRui Paulo /* voltage */ 1127b9450e43SRui Paulo voltage_core = bcm2835_cpufreq_get_voltage(sc, 1128b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1129b9450e43SRui Paulo voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc, 1130b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1131b9450e43SRui Paulo voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc, 1132b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1133b9450e43SRui Paulo voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc, 1134b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1135b9450e43SRui Paulo 1136b9450e43SRui Paulo /* current values (offset from 1.2V) */ 1137b9450e43SRui Paulo sc->voltage_core = voltage_core; 1138b9450e43SRui Paulo sc->voltage_sdram = voltage_sdram_c; 1139b9450e43SRui Paulo sc->voltage_sdram_c = voltage_sdram_c; 1140b9450e43SRui Paulo sc->voltage_sdram_i = voltage_sdram_i; 1141b9450e43SRui Paulo sc->voltage_sdram_p = voltage_sdram_p; 1142b9450e43SRui Paulo 1143b9450e43SRui Paulo /* max/min voltage */ 1144b9450e43SRui Paulo max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc, 1145b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1146b9450e43SRui Paulo min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc, 1147b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1148b9450e43SRui Paulo max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc, 1149b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1150b9450e43SRui Paulo max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc, 1151b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1152b9450e43SRui Paulo max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc, 1153b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1154b9450e43SRui Paulo min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc, 1155b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1156b9450e43SRui Paulo min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc, 1157b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1158b9450e43SRui Paulo min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc, 1159b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1160b9450e43SRui Paulo 1161b9450e43SRui Paulo /* temperature */ 1162b9450e43SRui Paulo temperature = bcm2835_cpufreq_get_temperature(sc); 1163b9450e43SRui Paulo 1164b9450e43SRui Paulo /* show result */ 1165b9450e43SRui Paulo if (cpufreq_verbose || bootverbose) { 1166b9450e43SRui Paulo device_printf(sc->dev, "Boot settings:\n"); 1167b9450e43SRui Paulo device_printf(sc->dev, 1168b9450e43SRui Paulo "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n", 1169b9450e43SRui Paulo HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq), 1170b9450e43SRui Paulo (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF"); 1171b9450e43SRui Paulo 1172b9450e43SRui Paulo device_printf(sc->dev, 1173b9450e43SRui Paulo "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n", 1174b9450e43SRui Paulo HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq), 1175b9450e43SRui Paulo HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq), 1176b9450e43SRui Paulo HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq)); 1177b9450e43SRui Paulo 1178b9450e43SRui Paulo device_printf(sc->dev, 1179b9450e43SRui Paulo "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, " 1180b9450e43SRui Paulo "SDRAM_P %dmV\n", 1181b9450e43SRui Paulo OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c), 1182b9450e43SRui Paulo OFFSET2MVOLT(voltage_sdram_i), 1183b9450e43SRui Paulo OFFSET2MVOLT(voltage_sdram_p)); 1184b9450e43SRui Paulo 1185b9450e43SRui Paulo device_printf(sc->dev, 1186b9450e43SRui Paulo "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, " 1187b9450e43SRui Paulo "SDRAM_P %d/%dmV\n", 1188b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_core), 1189b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_core), 1190b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_c), 1191b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_c), 1192b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_i), 1193b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_i), 1194b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_p), 1195b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_p)); 1196b9450e43SRui Paulo 1197b9450e43SRui Paulo device_printf(sc->dev, 1198b9450e43SRui Paulo "Temperature %d.%dC\n", (temperature / 1000), 1199b9450e43SRui Paulo (temperature % 1000) / 100); 1200b9450e43SRui Paulo } else { /* !cpufreq_verbose && !bootverbose */ 1201b9450e43SRui Paulo device_printf(sc->dev, 1202b9450e43SRui Paulo "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n", 1203b9450e43SRui Paulo HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq), 1204b9450e43SRui Paulo (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF"); 1205b9450e43SRui Paulo } 1206b9450e43SRui Paulo 1207b9450e43SRui Paulo /* keep in softc (MHz/mV) */ 1208b9450e43SRui Paulo sc->arm_max_freq = HZ2MHZ(arm_max_freq); 1209b9450e43SRui Paulo sc->arm_min_freq = HZ2MHZ(arm_min_freq); 1210b9450e43SRui Paulo sc->core_max_freq = HZ2MHZ(core_max_freq); 1211b9450e43SRui Paulo sc->core_min_freq = HZ2MHZ(core_min_freq); 1212b9450e43SRui Paulo sc->sdram_max_freq = HZ2MHZ(sdram_max_freq); 1213b9450e43SRui Paulo sc->sdram_min_freq = HZ2MHZ(sdram_min_freq); 1214b9450e43SRui Paulo sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core); 1215b9450e43SRui Paulo sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core); 1216b9450e43SRui Paulo 1217b9450e43SRui Paulo /* if turbo is on, set to max values */ 1218b9450e43SRui Paulo if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) { 1219b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 1220b9450e43SRui Paulo arm_max_freq); 1221b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1222b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 1223b9450e43SRui Paulo core_max_freq); 1224b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1225b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1226b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq); 1227b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1228b9450e43SRui Paulo } else { 1229b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 1230b9450e43SRui Paulo arm_min_freq); 1231b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1232b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 1233b9450e43SRui Paulo core_min_freq); 1234b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1235b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1236b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq); 1237b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1238b9450e43SRui Paulo } 1239b9450e43SRui Paulo 1240b9450e43SRui Paulo VC_UNLOCK(sc); 1241b9450e43SRui Paulo 1242b9450e43SRui Paulo /* add human readable temperature to dev.cpu node */ 1243b9450e43SRui Paulo cpu = device_get_parent(sc->dev); 1244b9450e43SRui Paulo if (cpu != NULL) { 1245b9450e43SRui Paulo ctx = device_get_sysctl_ctx(cpu); 1246b9450e43SRui Paulo SYSCTL_ADD_PROC(ctx, 1247b9450e43SRui Paulo SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO, 1248*7029da5cSPawel Biernacki "temperature", 1249*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1250b9450e43SRui Paulo sysctl_bcm2835_devcpu_temperature, "IK", 1251b9450e43SRui Paulo "Current SoC temperature"); 1252b9450e43SRui Paulo } 1253b9450e43SRui Paulo 1254b9450e43SRui Paulo /* release this hook (continue boot) */ 1255b9450e43SRui Paulo config_intrhook_disestablish(&sc->init_hook); 1256b9450e43SRui Paulo } 1257b9450e43SRui Paulo 1258b9450e43SRui Paulo static void 1259b9450e43SRui Paulo bcm2835_cpufreq_identify(driver_t *driver, device_t parent) 1260b9450e43SRui Paulo { 1261e374c335SEmmanuel Vadot const struct ofw_compat_data *compat; 1262e374c335SEmmanuel Vadot phandle_t root; 1263e374c335SEmmanuel Vadot 1264e374c335SEmmanuel Vadot root = OF_finddevice("/"); 1265e374c335SEmmanuel Vadot for (compat = compat_data; compat->ocd_str != NULL; compat++) 126687acb7f8SAndrew Turner if (ofw_bus_node_is_compatible(root, compat->ocd_str)) 1267e374c335SEmmanuel Vadot break; 1268e374c335SEmmanuel Vadot 1269e374c335SEmmanuel Vadot if (compat->ocd_data == 0) 1270e374c335SEmmanuel Vadot return; 1271b9450e43SRui Paulo 1272b9450e43SRui Paulo DPRINTF("driver=%p, parent=%p\n", driver, parent); 1273b9450e43SRui Paulo if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL) 1274b9450e43SRui Paulo return; 1275b9450e43SRui Paulo if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL) 1276b9450e43SRui Paulo device_printf(parent, "add child failed\n"); 1277b9450e43SRui Paulo } 1278b9450e43SRui Paulo 1279b9450e43SRui Paulo static int 1280b9450e43SRui Paulo bcm2835_cpufreq_probe(device_t dev) 1281b9450e43SRui Paulo { 1282b9450e43SRui Paulo 1283962940ceSLuiz Otavio O Souza if (device_get_unit(dev) != 0) 1284962940ceSLuiz Otavio O Souza return (ENXIO); 1285b9450e43SRui Paulo device_set_desc(dev, "CPU Frequency Control"); 1286962940ceSLuiz Otavio O Souza 1287b9450e43SRui Paulo return (0); 1288b9450e43SRui Paulo } 1289b9450e43SRui Paulo 1290b9450e43SRui Paulo static int 1291b9450e43SRui Paulo bcm2835_cpufreq_attach(device_t dev) 1292b9450e43SRui Paulo { 1293b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1294b9450e43SRui Paulo struct sysctl_oid *oid; 1295b9450e43SRui Paulo 1296b9450e43SRui Paulo /* set self dev */ 1297b9450e43SRui Paulo sc = device_get_softc(dev); 1298b9450e43SRui Paulo sc->dev = dev; 1299b9450e43SRui Paulo 1300b9450e43SRui Paulo /* initial values */ 1301b9450e43SRui Paulo sc->arm_max_freq = -1; 1302b9450e43SRui Paulo sc->arm_min_freq = -1; 1303b9450e43SRui Paulo sc->core_max_freq = -1; 1304b9450e43SRui Paulo sc->core_min_freq = -1; 1305b9450e43SRui Paulo sc->sdram_max_freq = -1; 1306b9450e43SRui Paulo sc->sdram_min_freq = -1; 1307b9450e43SRui Paulo sc->max_voltage_core = 0; 1308b9450e43SRui Paulo sc->min_voltage_core = 0; 1309b9450e43SRui Paulo 1310b9450e43SRui Paulo /* setup sysctl at first device */ 1311b9450e43SRui Paulo if (device_get_unit(dev) == 0) { 1312b9450e43SRui Paulo sysctl_ctx_init(&bcm2835_sysctl_ctx); 1313b9450e43SRui Paulo /* create node for hw.cpufreq */ 1314b9450e43SRui Paulo oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx, 1315b9450e43SRui Paulo SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq", 1316*7029da5cSPawel Biernacki CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, ""); 1317b9450e43SRui Paulo 1318b9450e43SRui Paulo /* Frequency (Hz) */ 1319b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1320*7029da5cSPawel Biernacki OID_AUTO, "arm_freq", 1321*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1322b9450e43SRui Paulo sysctl_bcm2835_cpufreq_arm_freq, "IU", 1323b9450e43SRui Paulo "ARM frequency (Hz)"); 1324b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1325*7029da5cSPawel Biernacki OID_AUTO, "core_freq", 1326*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1327b9450e43SRui Paulo sysctl_bcm2835_cpufreq_core_freq, "IU", 1328b9450e43SRui Paulo "Core frequency (Hz)"); 1329b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1330*7029da5cSPawel Biernacki OID_AUTO, "sdram_freq", 1331*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1332b9450e43SRui Paulo sysctl_bcm2835_cpufreq_sdram_freq, "IU", 1333b9450e43SRui Paulo "SDRAM frequency (Hz)"); 1334b9450e43SRui Paulo 1335b9450e43SRui Paulo /* Turbo state */ 1336b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1337*7029da5cSPawel Biernacki OID_AUTO, "turbo", 1338*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1339b9450e43SRui Paulo sysctl_bcm2835_cpufreq_turbo, "IU", 1340b9450e43SRui Paulo "Disables dynamic clocking"); 1341b9450e43SRui Paulo 1342b9450e43SRui Paulo /* Voltage (offset from 1.2V in units of 0.025V) */ 1343b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1344*7029da5cSPawel Biernacki OID_AUTO, "voltage_core", 1345*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, 1346b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_core, "I", 1347b9450e43SRui Paulo "ARM/GPU core voltage" 1348b9450e43SRui Paulo "(offset from 1.2V in units of 0.025V)"); 1349b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1350*7029da5cSPawel Biernacki OID_AUTO, "voltage_sdram", 1351*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_WR | CTLFLAG_NEEDGIANT, sc, 1352b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I", 1353b9450e43SRui Paulo "SDRAM voltage (offset from 1.2V in units of 0.025V)"); 1354b9450e43SRui Paulo 1355b9450e43SRui Paulo /* Voltage individual SDRAM */ 1356b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1357*7029da5cSPawel Biernacki OID_AUTO, "voltage_sdram_c", 1358*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 1359b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I", 1360b9450e43SRui Paulo "SDRAM controller voltage" 1361b9450e43SRui Paulo "(offset from 1.2V in units of 0.025V)"); 1362b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1363*7029da5cSPawel Biernacki OID_AUTO, "voltage_sdram_i", 1364*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 1365b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I", 1366b9450e43SRui Paulo "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)"); 1367b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1368*7029da5cSPawel Biernacki OID_AUTO, "voltage_sdram_p", 1369*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 1370b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I", 1371b9450e43SRui Paulo "SDRAM phy voltage (offset from 1.2V in units of 0.025V)"); 1372b9450e43SRui Paulo 1373b9450e43SRui Paulo /* Temperature */ 1374b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1375*7029da5cSPawel Biernacki OID_AUTO, "temperature", 1376*7029da5cSPawel Biernacki CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0, 1377b9450e43SRui Paulo sysctl_bcm2835_cpufreq_temperature, "I", 1378b9450e43SRui Paulo "SoC temperature (thousandths of a degree C)"); 1379b9450e43SRui Paulo } 1380b9450e43SRui Paulo 1381b9450e43SRui Paulo /* ARM->VC lock */ 1382b9450e43SRui Paulo sema_init(&vc_sema, 1, "vcsema"); 1383b9450e43SRui Paulo 1384b9450e43SRui Paulo /* register callback for using mbox when interrupts are enabled */ 1385b9450e43SRui Paulo sc->init_hook.ich_func = bcm2835_cpufreq_init; 1386b9450e43SRui Paulo sc->init_hook.ich_arg = sc; 1387b9450e43SRui Paulo 1388b9450e43SRui Paulo if (config_intrhook_establish(&sc->init_hook) != 0) { 1389b9450e43SRui Paulo device_printf(dev, "config_intrhook_establish failed\n"); 1390b9450e43SRui Paulo return (ENOMEM); 1391b9450e43SRui Paulo } 1392b9450e43SRui Paulo 1393b9450e43SRui Paulo /* this device is controlled by cpufreq(4) */ 1394b9450e43SRui Paulo cpufreq_register(dev); 1395b9450e43SRui Paulo 1396b9450e43SRui Paulo return (0); 1397b9450e43SRui Paulo } 1398b9450e43SRui Paulo 1399b9450e43SRui Paulo static int 1400b9450e43SRui Paulo bcm2835_cpufreq_detach(device_t dev) 1401b9450e43SRui Paulo { 1402b9450e43SRui Paulo 1403b9450e43SRui Paulo sema_destroy(&vc_sema); 1404b9450e43SRui Paulo 1405b9450e43SRui Paulo return (cpufreq_unregister(dev)); 1406b9450e43SRui Paulo } 1407b9450e43SRui Paulo 1408b9450e43SRui Paulo static int 1409b9450e43SRui Paulo bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf) 1410b9450e43SRui Paulo { 1411b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1412b9450e43SRui Paulo uint32_t rate_hz, rem; 1413151ba793SAlexander Kabaev int resp_freq, arm_freq, min_freq, core_freq; 1414151ba793SAlexander Kabaev #ifdef DEBUG 1415151ba793SAlexander Kabaev int cur_freq; 1416151ba793SAlexander Kabaev #endif 1417b9450e43SRui Paulo 1418b9450e43SRui Paulo if (cf == NULL || cf->freq < 0) 1419b9450e43SRui Paulo return (EINVAL); 1420b9450e43SRui Paulo 1421b9450e43SRui Paulo sc = device_get_softc(dev); 1422b9450e43SRui Paulo 1423b9450e43SRui Paulo /* setting clock (Hz) */ 1424b9450e43SRui Paulo rate_hz = (uint32_t)MHZ2HZ(cf->freq); 1425b9450e43SRui Paulo rem = rate_hz % HZSTEP; 1426b9450e43SRui Paulo rate_hz -= rem; 1427b9450e43SRui Paulo if (rate_hz == 0) 1428b9450e43SRui Paulo return (EINVAL); 1429b9450e43SRui Paulo 1430b9450e43SRui Paulo /* adjust min freq */ 1431b9450e43SRui Paulo min_freq = sc->arm_min_freq; 1432b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) 1433b9450e43SRui Paulo if (min_freq > cpufreq_lowest_freq) 1434b9450e43SRui Paulo min_freq = cpufreq_lowest_freq; 1435b9450e43SRui Paulo 1436b9450e43SRui Paulo if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq)) 1437b9450e43SRui Paulo return (EINVAL); 1438b9450e43SRui Paulo 1439b9450e43SRui Paulo /* set new value and verify it */ 1440b9450e43SRui Paulo VC_LOCK(sc); 1441151ba793SAlexander Kabaev #ifdef DEBUG 1442b9450e43SRui Paulo cur_freq = bcm2835_cpufreq_get_clock_rate(sc, 1443b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1444151ba793SAlexander Kabaev #endif 1445b9450e43SRui Paulo resp_freq = bcm2835_cpufreq_set_clock_rate(sc, 1446b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM, rate_hz); 1447b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1448b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1449b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1450b9450e43SRui Paulo 1451b9450e43SRui Paulo /* 1452b9450e43SRui Paulo * if non-turbo and lower than or equal min_freq, 1453b9450e43SRui Paulo * clock down core and sdram to default first. 1454b9450e43SRui Paulo */ 1455b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) { 1456b9450e43SRui Paulo core_freq = bcm2835_cpufreq_get_clock_rate(sc, 1457b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1458b9450e43SRui Paulo if (rate_hz > MHZ2HZ(sc->arm_min_freq)) { 1459b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1460b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1461b9450e43SRui Paulo MHZ2HZ(sc->core_max_freq)); 1462b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1463b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1464b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, 1465b9450e43SRui Paulo MHZ2HZ(sc->sdram_max_freq)); 1466b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1467b9450e43SRui Paulo } else { 1468b9450e43SRui Paulo if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY && 1469b9450e43SRui Paulo core_freq > DEFAULT_CORE_FREQUENCY) { 1470b9450e43SRui Paulo /* first, down to 250, then down to min */ 1471b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1472b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1473b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1474b9450e43SRui Paulo MHZ2HZ(DEFAULT_CORE_FREQUENCY)); 1475b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1476b9450e43SRui Paulo /* reset core voltage */ 1477b9450e43SRui Paulo bcm2835_cpufreq_set_voltage(sc, 1478b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE, 0); 1479b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1480b9450e43SRui Paulo } 1481b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1482b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1483b9450e43SRui Paulo MHZ2HZ(sc->core_min_freq)); 1484b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1485b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1486b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, 1487b9450e43SRui Paulo MHZ2HZ(sc->sdram_min_freq)); 1488b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1489b9450e43SRui Paulo } 1490b9450e43SRui Paulo } 1491b9450e43SRui Paulo 1492b9450e43SRui Paulo VC_UNLOCK(sc); 1493b9450e43SRui Paulo 1494b9450e43SRui Paulo if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) { 1495b9450e43SRui Paulo device_printf(dev, "wrong freq\n"); 1496b9450e43SRui Paulo return (EIO); 1497b9450e43SRui Paulo } 1498b9450e43SRui Paulo DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq); 1499b9450e43SRui Paulo 1500b9450e43SRui Paulo return (0); 1501b9450e43SRui Paulo } 1502b9450e43SRui Paulo 1503b9450e43SRui Paulo static int 1504b9450e43SRui Paulo bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf) 1505b9450e43SRui Paulo { 1506b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1507b9450e43SRui Paulo int arm_freq; 1508b9450e43SRui Paulo 1509b9450e43SRui Paulo if (cf == NULL) 1510b9450e43SRui Paulo return (EINVAL); 1511b9450e43SRui Paulo 1512b9450e43SRui Paulo sc = device_get_softc(dev); 1513b9450e43SRui Paulo memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf)); 1514b9450e43SRui Paulo cf->dev = NULL; 1515b9450e43SRui Paulo 1516b9450e43SRui Paulo /* get cuurent value */ 1517b9450e43SRui Paulo VC_LOCK(sc); 1518b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1519b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1520b9450e43SRui Paulo VC_UNLOCK(sc); 1521b9450e43SRui Paulo if (arm_freq < 0) { 1522b9450e43SRui Paulo device_printf(dev, "can't get clock\n"); 1523b9450e43SRui Paulo return (EINVAL); 1524b9450e43SRui Paulo } 1525b9450e43SRui Paulo 1526b9450e43SRui Paulo /* CPU clock in MHz or 100ths of a percent. */ 1527b9450e43SRui Paulo cf->freq = HZ2MHZ(arm_freq); 1528b9450e43SRui Paulo /* Voltage in mV. */ 1529b9450e43SRui Paulo cf->volts = CPUFREQ_VAL_UNKNOWN; 1530b9450e43SRui Paulo /* Power consumed in mW. */ 1531b9450e43SRui Paulo cf->power = CPUFREQ_VAL_UNKNOWN; 1532b9450e43SRui Paulo /* Transition latency in us. */ 1533b9450e43SRui Paulo cf->lat = TRANSITION_LATENCY; 1534b9450e43SRui Paulo /* Driver providing this setting. */ 1535b9450e43SRui Paulo cf->dev = dev; 1536b9450e43SRui Paulo 1537b9450e43SRui Paulo return (0); 1538b9450e43SRui Paulo } 1539b9450e43SRui Paulo 1540b9450e43SRui Paulo static int 1541b9450e43SRui Paulo bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets, 1542b9450e43SRui Paulo int *count) 1543b9450e43SRui Paulo { 1544b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1545b9450e43SRui Paulo int freq, min_freq, volts, rem; 1546b9450e43SRui Paulo int idx; 1547b9450e43SRui Paulo 1548b9450e43SRui Paulo sc = device_get_softc(dev); 1549b9450e43SRui Paulo freq = sc->arm_max_freq; 1550b9450e43SRui Paulo min_freq = sc->arm_min_freq; 1551b9450e43SRui Paulo 1552b9450e43SRui Paulo /* adjust head freq to STEP */ 1553b9450e43SRui Paulo rem = freq % MHZSTEP; 1554b9450e43SRui Paulo freq -= rem; 1555b9450e43SRui Paulo if (freq < min_freq) 1556b9450e43SRui Paulo freq = min_freq; 1557b9450e43SRui Paulo 1558b9450e43SRui Paulo /* if non-turbo, add extra low freq */ 1559b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) 1560b9450e43SRui Paulo if (min_freq > cpufreq_lowest_freq) 1561b9450e43SRui Paulo min_freq = cpufreq_lowest_freq; 1562b9450e43SRui Paulo 1563f1f425aeSOleksandr Tymoshenko #ifdef SOC_BCM2835 1564f1f425aeSOleksandr Tymoshenko /* from freq to min_freq */ 1565f1f425aeSOleksandr Tymoshenko for (idx = 0; idx < *count && freq >= min_freq; idx++) { 1566f1f425aeSOleksandr Tymoshenko if (freq > sc->arm_min_freq) 1567f1f425aeSOleksandr Tymoshenko volts = sc->max_voltage_core; 1568f1f425aeSOleksandr Tymoshenko else 1569f1f425aeSOleksandr Tymoshenko volts = sc->min_voltage_core; 1570f1f425aeSOleksandr Tymoshenko sets[idx].freq = freq; 1571f1f425aeSOleksandr Tymoshenko sets[idx].volts = volts; 1572f1f425aeSOleksandr Tymoshenko sets[idx].lat = TRANSITION_LATENCY; 1573f1f425aeSOleksandr Tymoshenko sets[idx].dev = dev; 1574f1f425aeSOleksandr Tymoshenko freq -= MHZSTEP; 1575f1f425aeSOleksandr Tymoshenko } 1576f1f425aeSOleksandr Tymoshenko #else 157711cede48SLuiz Otavio O Souza /* XXX RPi2 have only 900/600MHz */ 157811cede48SLuiz Otavio O Souza idx = 0; 157911cede48SLuiz Otavio O Souza volts = sc->min_voltage_core; 158011cede48SLuiz Otavio O Souza sets[idx].freq = freq; 158111cede48SLuiz Otavio O Souza sets[idx].volts = volts; 158211cede48SLuiz Otavio O Souza sets[idx].lat = TRANSITION_LATENCY; 158311cede48SLuiz Otavio O Souza sets[idx].dev = dev; 158411cede48SLuiz Otavio O Souza idx++; 158511cede48SLuiz Otavio O Souza if (freq != min_freq) { 158611cede48SLuiz Otavio O Souza sets[idx].freq = min_freq; 158711cede48SLuiz Otavio O Souza sets[idx].volts = volts; 158811cede48SLuiz Otavio O Souza sets[idx].lat = TRANSITION_LATENCY; 158911cede48SLuiz Otavio O Souza sets[idx].dev = dev; 159011cede48SLuiz Otavio O Souza idx++; 159111cede48SLuiz Otavio O Souza } 159211cede48SLuiz Otavio O Souza #endif 159311cede48SLuiz Otavio O Souza *count = idx; 1594b9450e43SRui Paulo 1595b9450e43SRui Paulo return (0); 1596b9450e43SRui Paulo } 1597b9450e43SRui Paulo 1598b9450e43SRui Paulo static int 1599b9450e43SRui Paulo bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count) 1600b9450e43SRui Paulo { 1601b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1602b9450e43SRui Paulo 1603b9450e43SRui Paulo if (sets == NULL || count == NULL) 1604b9450e43SRui Paulo return (EINVAL); 1605b9450e43SRui Paulo 1606b9450e43SRui Paulo sc = device_get_softc(dev); 1607b9450e43SRui Paulo if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) { 1608b9450e43SRui Paulo printf("device is not configured\n"); 1609b9450e43SRui Paulo return (EINVAL); 1610b9450e43SRui Paulo } 1611b9450e43SRui Paulo 1612b9450e43SRui Paulo /* fill data with unknown value */ 1613b9450e43SRui Paulo memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count)); 1614b9450e43SRui Paulo /* create new array up to count */ 1615b9450e43SRui Paulo bcm2835_cpufreq_make_freq_list(dev, sets, count); 1616b9450e43SRui Paulo 1617b9450e43SRui Paulo return (0); 1618b9450e43SRui Paulo } 1619b9450e43SRui Paulo 1620b9450e43SRui Paulo static int 1621b9450e43SRui Paulo bcm2835_cpufreq_type(device_t dev, int *type) 1622b9450e43SRui Paulo { 1623b9450e43SRui Paulo 1624b9450e43SRui Paulo if (type == NULL) 1625b9450e43SRui Paulo return (EINVAL); 1626b9450e43SRui Paulo *type = CPUFREQ_TYPE_ABSOLUTE; 1627b9450e43SRui Paulo 1628b9450e43SRui Paulo return (0); 1629b9450e43SRui Paulo } 1630b9450e43SRui Paulo 1631b9450e43SRui Paulo static device_method_t bcm2835_cpufreq_methods[] = { 1632b9450e43SRui Paulo /* Device interface */ 1633b9450e43SRui Paulo DEVMETHOD(device_identify, bcm2835_cpufreq_identify), 1634b9450e43SRui Paulo DEVMETHOD(device_probe, bcm2835_cpufreq_probe), 1635b9450e43SRui Paulo DEVMETHOD(device_attach, bcm2835_cpufreq_attach), 1636b9450e43SRui Paulo DEVMETHOD(device_detach, bcm2835_cpufreq_detach), 1637b9450e43SRui Paulo 1638b9450e43SRui Paulo /* cpufreq interface */ 1639b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set), 1640b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get), 1641b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings), 1642b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type), 1643b9450e43SRui Paulo 1644b9450e43SRui Paulo DEVMETHOD_END 1645b9450e43SRui Paulo }; 1646b9450e43SRui Paulo 1647b9450e43SRui Paulo static devclass_t bcm2835_cpufreq_devclass; 1648b9450e43SRui Paulo static driver_t bcm2835_cpufreq_driver = { 1649b9450e43SRui Paulo "bcm2835_cpufreq", 1650b9450e43SRui Paulo bcm2835_cpufreq_methods, 1651b9450e43SRui Paulo sizeof(struct bcm2835_cpufreq_softc), 1652b9450e43SRui Paulo }; 1653b9450e43SRui Paulo 1654b9450e43SRui Paulo DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver, 1655b9450e43SRui Paulo bcm2835_cpufreq_devclass, 0, 0); 1656