1b9450e43SRui Paulo /*- 211cede48SLuiz Otavio O Souza * Copyright (C) 2013-2015 Daisuke Aoyama <aoyama@peach.ne.jp> 3b9450e43SRui Paulo * All rights reserved. 4b9450e43SRui Paulo * 5b9450e43SRui Paulo * Redistribution and use in source and binary forms, with or without 6b9450e43SRui Paulo * modification, are permitted provided that the following conditions 7b9450e43SRui Paulo * are met: 8b9450e43SRui Paulo * 1. Redistributions of source code must retain the above copyright 9b9450e43SRui Paulo * notice, this list of conditions and the following disclaimer. 10b9450e43SRui Paulo * 2. Redistributions in binary form must reproduce the above copyright 11b9450e43SRui Paulo * notice, this list of conditions and the following disclaimer in the 12b9450e43SRui Paulo * documentation and/or other materials provided with the distribution. 13b9450e43SRui Paulo * 14b9450e43SRui Paulo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15b9450e43SRui Paulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16b9450e43SRui Paulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17b9450e43SRui Paulo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18b9450e43SRui Paulo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19b9450e43SRui Paulo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20b9450e43SRui Paulo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21b9450e43SRui Paulo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22b9450e43SRui Paulo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23b9450e43SRui Paulo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24b9450e43SRui Paulo * SUCH DAMAGE. 25b9450e43SRui Paulo * 26b9450e43SRui Paulo */ 27b9450e43SRui Paulo 28b9450e43SRui Paulo #include <sys/cdefs.h> 29b9450e43SRui Paulo __FBSDID("$FreeBSD$"); 30b9450e43SRui Paulo 31b9450e43SRui Paulo #include <sys/param.h> 32b9450e43SRui Paulo #include <sys/systm.h> 33b9450e43SRui Paulo #include <sys/bus.h> 34b9450e43SRui Paulo #include <sys/cpu.h> 35b9450e43SRui Paulo #include <sys/kernel.h> 36b9450e43SRui Paulo #include <sys/lock.h> 37b9450e43SRui Paulo #include <sys/malloc.h> 38b9450e43SRui Paulo #include <sys/module.h> 39b9450e43SRui Paulo #include <sys/mutex.h> 40b9450e43SRui Paulo #include <sys/sema.h> 41b9450e43SRui Paulo #include <sys/sysctl.h> 42b9450e43SRui Paulo 43b9450e43SRui Paulo #include <machine/bus.h> 44b9450e43SRui Paulo #include <machine/cpu.h> 45b9450e43SRui Paulo #include <machine/intr.h> 46b9450e43SRui Paulo 47e374c335SEmmanuel Vadot #include <dev/ofw/ofw_bus.h> 48e374c335SEmmanuel Vadot #include <dev/ofw/ofw_bus_subr.h> 49e374c335SEmmanuel Vadot 50b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_mbox.h> 51b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h> 52b9450e43SRui Paulo #include <arm/broadcom/bcm2835/bcm2835_vcbus.h> 53b9450e43SRui Paulo 54b9450e43SRui Paulo #include "cpufreq_if.h" 55b9450e43SRui Paulo #include "mbox_if.h" 56b9450e43SRui Paulo 57b9450e43SRui Paulo #ifdef DEBUG 58b9450e43SRui Paulo #define DPRINTF(fmt, ...) do { \ 59b9450e43SRui Paulo printf("%s:%u: ", __func__, __LINE__); \ 60b9450e43SRui Paulo printf(fmt, ##__VA_ARGS__); \ 61b9450e43SRui Paulo } while (0) 62b9450e43SRui Paulo #else 63b9450e43SRui Paulo #define DPRINTF(fmt, ...) 64b9450e43SRui Paulo #endif 65b9450e43SRui Paulo 66b9450e43SRui Paulo #define HZ2MHZ(freq) ((freq) / (1000 * 1000)) 67b9450e43SRui Paulo #define MHZ2HZ(freq) ((freq) * (1000 * 1000)) 6811cede48SLuiz Otavio O Souza 69f1f425aeSOleksandr Tymoshenko #ifdef SOC_BCM2835 70b9450e43SRui Paulo #define OFFSET2MVOLT(val) (1200 + ((val) * 25)) 71b9450e43SRui Paulo #define MVOLT2OFFSET(val) (((val) - 1200) / 25) 72b9450e43SRui Paulo #define DEFAULT_ARM_FREQUENCY 700 7311cede48SLuiz Otavio O Souza #define DEFAULT_LOWEST_FREQ 300 74f1f425aeSOleksandr Tymoshenko #else 75f1f425aeSOleksandr Tymoshenko #define OFFSET2MVOLT(val) (((val) / 1000)) 76f1f425aeSOleksandr Tymoshenko #define MVOLT2OFFSET(val) (((val) * 1000)) 77f1f425aeSOleksandr Tymoshenko #define DEFAULT_ARM_FREQUENCY 600 78f1f425aeSOleksandr Tymoshenko #define DEFAULT_LOWEST_FREQ 600 7911cede48SLuiz Otavio O Souza #endif 80b9450e43SRui Paulo #define DEFAULT_CORE_FREQUENCY 250 81b9450e43SRui Paulo #define DEFAULT_SDRAM_FREQUENCY 400 82b9450e43SRui Paulo #define TRANSITION_LATENCY 1000 83b9450e43SRui Paulo #define MIN_OVER_VOLTAGE -16 84b9450e43SRui Paulo #define MAX_OVER_VOLTAGE 6 85b9450e43SRui Paulo #define MSG_ERROR -999999999 86b9450e43SRui Paulo #define MHZSTEP 100 87b9450e43SRui Paulo #define HZSTEP (MHZ2HZ(MHZSTEP)) 889d6672e1SLuiz Otavio O Souza #define TZ_ZEROC 2731 89b9450e43SRui Paulo 90b9450e43SRui Paulo #define VC_LOCK(sc) do { \ 91b9450e43SRui Paulo sema_wait(&vc_sema); \ 92b9450e43SRui Paulo } while (0) 93b9450e43SRui Paulo #define VC_UNLOCK(sc) do { \ 94b9450e43SRui Paulo sema_post(&vc_sema); \ 95b9450e43SRui Paulo } while (0) 96b9450e43SRui Paulo 97b9450e43SRui Paulo /* ARM->VC mailbox property semaphore */ 98b9450e43SRui Paulo static struct sema vc_sema; 99b9450e43SRui Paulo 100b9450e43SRui Paulo static struct sysctl_ctx_list bcm2835_sysctl_ctx; 101b9450e43SRui Paulo 102b9450e43SRui Paulo struct bcm2835_cpufreq_softc { 103b9450e43SRui Paulo device_t dev; 104b9450e43SRui Paulo int arm_max_freq; 105b9450e43SRui Paulo int arm_min_freq; 106b9450e43SRui Paulo int core_max_freq; 107b9450e43SRui Paulo int core_min_freq; 108b9450e43SRui Paulo int sdram_max_freq; 109b9450e43SRui Paulo int sdram_min_freq; 110b9450e43SRui Paulo int max_voltage_core; 111b9450e43SRui Paulo int min_voltage_core; 112b9450e43SRui Paulo 113b9450e43SRui Paulo /* the values written in mbox */ 114b9450e43SRui Paulo int voltage_core; 115b9450e43SRui Paulo int voltage_sdram; 116b9450e43SRui Paulo int voltage_sdram_c; 117b9450e43SRui Paulo int voltage_sdram_i; 118b9450e43SRui Paulo int voltage_sdram_p; 119b9450e43SRui Paulo int turbo_mode; 120b9450e43SRui Paulo 121b9450e43SRui Paulo /* initial hook for waiting mbox intr */ 122b9450e43SRui Paulo struct intr_config_hook init_hook; 123b9450e43SRui Paulo }; 124b9450e43SRui Paulo 125e374c335SEmmanuel Vadot static struct ofw_compat_data compat_data[] = { 126e374c335SEmmanuel Vadot { "broadcom,bcm2835-vc", 1 }, 127e374c335SEmmanuel Vadot { "broadcom,bcm2708-vc", 1 }, 128e374c335SEmmanuel Vadot { "brcm,bcm2709", 1 }, 129f362a398SEmmanuel Vadot { "brcm,bcm2836", 1 }, 130e374c335SEmmanuel Vadot { NULL, 0 } 131e374c335SEmmanuel Vadot }; 132e374c335SEmmanuel Vadot 133b9450e43SRui Paulo static int cpufreq_verbose = 0; 134b9450e43SRui Paulo TUNABLE_INT("hw.bcm2835.cpufreq.verbose", &cpufreq_verbose); 135b9450e43SRui Paulo static int cpufreq_lowest_freq = DEFAULT_LOWEST_FREQ; 136b9450e43SRui Paulo TUNABLE_INT("hw.bcm2835.cpufreq.lowest_freq", &cpufreq_lowest_freq); 137b9450e43SRui Paulo 138e9faba9dSLuiz Otavio O Souza #ifdef PROP_DEBUG 139b9450e43SRui Paulo static void 140b9450e43SRui Paulo bcm2835_dump(const void *data, int len) 141b9450e43SRui Paulo { 142b9450e43SRui Paulo const uint8_t *p = (const uint8_t*)data; 143b9450e43SRui Paulo int i; 144b9450e43SRui Paulo 145b9450e43SRui Paulo printf("dump @ %p:\n", data); 146b9450e43SRui Paulo for (i = 0; i < len; i++) { 147b9450e43SRui Paulo printf("%2.2x ", p[i]); 148b9450e43SRui Paulo if ((i % 4) == 3) 149b9450e43SRui Paulo printf(" "); 150b9450e43SRui Paulo if ((i % 16) == 15) 151b9450e43SRui Paulo printf("\n"); 152b9450e43SRui Paulo } 153b9450e43SRui Paulo printf("\n"); 154b9450e43SRui Paulo } 155b9450e43SRui Paulo #endif 156b9450e43SRui Paulo 157b9450e43SRui Paulo static int 158b9450e43SRui Paulo bcm2835_cpufreq_get_clock_rate(struct bcm2835_cpufreq_softc *sc, 159b9450e43SRui Paulo uint32_t clock_id) 160b9450e43SRui Paulo { 161cd3903c6SOleksandr Tymoshenko struct msg_get_clock_rate msg; 162b9450e43SRui Paulo int rate; 163b9450e43SRui Paulo int err; 164b9450e43SRui Paulo 165b9450e43SRui Paulo /* 166b9450e43SRui Paulo * Get clock rate 167b9450e43SRui Paulo * Tag: 0x00030002 168b9450e43SRui Paulo * Request: 169b9450e43SRui Paulo * Length: 4 170b9450e43SRui Paulo * Value: 171b9450e43SRui Paulo * u32: clock id 172b9450e43SRui Paulo * Response: 173b9450e43SRui Paulo * Length: 8 174b9450e43SRui Paulo * Value: 175b9450e43SRui Paulo * u32: clock id 176b9450e43SRui Paulo * u32: rate (in Hz) 177b9450e43SRui Paulo */ 178b9450e43SRui Paulo 179b9450e43SRui Paulo /* setup single tag buffer */ 180cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 181cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 182cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 183cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_CLOCK_RATE; 184cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 185cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 186cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 187cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 188b9450e43SRui Paulo 189b9450e43SRui Paulo /* call mailbox property */ 190cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 191b9450e43SRui Paulo if (err) { 192b9450e43SRui Paulo device_printf(sc->dev, "can't get clock rate (id=%u)\n", 193b9450e43SRui Paulo clock_id); 194b9450e43SRui Paulo return (MSG_ERROR); 195b9450e43SRui Paulo } 196b9450e43SRui Paulo 197b9450e43SRui Paulo /* result (Hz) */ 198cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 199b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 200b9450e43SRui Paulo return (rate); 201b9450e43SRui Paulo } 202b9450e43SRui Paulo 203b9450e43SRui Paulo static int 204b9450e43SRui Paulo bcm2835_cpufreq_get_max_clock_rate(struct bcm2835_cpufreq_softc *sc, 205b9450e43SRui Paulo uint32_t clock_id) 206b9450e43SRui Paulo { 207cd3903c6SOleksandr Tymoshenko struct msg_get_max_clock_rate msg; 208b9450e43SRui Paulo int rate; 209b9450e43SRui Paulo int err; 210b9450e43SRui Paulo 211b9450e43SRui Paulo /* 212b9450e43SRui Paulo * Get max clock rate 213b9450e43SRui Paulo * Tag: 0x00030004 214b9450e43SRui Paulo * Request: 215b9450e43SRui Paulo * Length: 4 216b9450e43SRui Paulo * Value: 217b9450e43SRui Paulo * u32: clock id 218b9450e43SRui Paulo * Response: 219b9450e43SRui Paulo * Length: 8 220b9450e43SRui Paulo * Value: 221b9450e43SRui Paulo * u32: clock id 222b9450e43SRui Paulo * u32: rate (in Hz) 223b9450e43SRui Paulo */ 224b9450e43SRui Paulo 225b9450e43SRui Paulo /* setup single tag buffer */ 226cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 227cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 228cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 229cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_CLOCK_RATE; 230cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 231cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 232cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 233cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 234b9450e43SRui Paulo 235b9450e43SRui Paulo /* call mailbox property */ 236cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 237b9450e43SRui Paulo if (err) { 238b9450e43SRui Paulo device_printf(sc->dev, "can't get max clock rate (id=%u)\n", 239b9450e43SRui Paulo clock_id); 240b9450e43SRui Paulo return (MSG_ERROR); 241b9450e43SRui Paulo } 242b9450e43SRui Paulo 243b9450e43SRui Paulo /* result (Hz) */ 244cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 245b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 246b9450e43SRui Paulo return (rate); 247b9450e43SRui Paulo } 248b9450e43SRui Paulo 249b9450e43SRui Paulo static int 250b9450e43SRui Paulo bcm2835_cpufreq_get_min_clock_rate(struct bcm2835_cpufreq_softc *sc, 251b9450e43SRui Paulo uint32_t clock_id) 252b9450e43SRui Paulo { 253cd3903c6SOleksandr Tymoshenko struct msg_get_min_clock_rate msg; 254b9450e43SRui Paulo int rate; 255b9450e43SRui Paulo int err; 256b9450e43SRui Paulo 257b9450e43SRui Paulo /* 258b9450e43SRui Paulo * Get min clock rate 259b9450e43SRui Paulo * Tag: 0x00030007 260b9450e43SRui Paulo * Request: 261b9450e43SRui Paulo * Length: 4 262b9450e43SRui Paulo * Value: 263b9450e43SRui Paulo * u32: clock id 264b9450e43SRui Paulo * Response: 265b9450e43SRui Paulo * Length: 8 266b9450e43SRui Paulo * Value: 267b9450e43SRui Paulo * u32: clock id 268b9450e43SRui Paulo * u32: rate (in Hz) 269b9450e43SRui Paulo */ 270b9450e43SRui Paulo 271b9450e43SRui Paulo /* setup single tag buffer */ 272cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 273cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 274cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 275cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_CLOCK_RATE; 276cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 277cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 278cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 279cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 280b9450e43SRui Paulo 281b9450e43SRui Paulo /* call mailbox property */ 282cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 283b9450e43SRui Paulo if (err) { 284b9450e43SRui Paulo device_printf(sc->dev, "can't get min clock rate (id=%u)\n", 285b9450e43SRui Paulo clock_id); 286b9450e43SRui Paulo return (MSG_ERROR); 287b9450e43SRui Paulo } 288b9450e43SRui Paulo 289b9450e43SRui Paulo /* result (Hz) */ 290cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 291b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 292b9450e43SRui Paulo return (rate); 293b9450e43SRui Paulo } 294b9450e43SRui Paulo 295b9450e43SRui Paulo static int 296b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(struct bcm2835_cpufreq_softc *sc, 297b9450e43SRui Paulo uint32_t clock_id, uint32_t rate_hz) 298b9450e43SRui Paulo { 299cd3903c6SOleksandr Tymoshenko struct msg_set_clock_rate msg; 300b9450e43SRui Paulo int rate; 301b9450e43SRui Paulo int err; 302b9450e43SRui Paulo 303b9450e43SRui Paulo /* 304b9450e43SRui Paulo * Set clock rate 305b9450e43SRui Paulo * Tag: 0x00038002 306b9450e43SRui Paulo * Request: 307b9450e43SRui Paulo * Length: 8 308b9450e43SRui Paulo * Value: 309b9450e43SRui Paulo * u32: clock id 310b9450e43SRui Paulo * u32: rate (in Hz) 311b9450e43SRui Paulo * Response: 312b9450e43SRui Paulo * Length: 8 313b9450e43SRui Paulo * Value: 314b9450e43SRui Paulo * u32: clock id 315b9450e43SRui Paulo * u32: rate (in Hz) 316b9450e43SRui Paulo */ 317b9450e43SRui Paulo 318b9450e43SRui Paulo /* setup single tag buffer */ 319cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 320cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 321cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 322cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE; 323cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 324cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 325cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 326cd3903c6SOleksandr Tymoshenko msg.body.req.rate_hz = rate_hz; 327cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 328b9450e43SRui Paulo 329b9450e43SRui Paulo /* call mailbox property */ 330cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 331b9450e43SRui Paulo if (err) { 332b9450e43SRui Paulo device_printf(sc->dev, "can't set clock rate (id=%u)\n", 333b9450e43SRui Paulo clock_id); 334b9450e43SRui Paulo return (MSG_ERROR); 335b9450e43SRui Paulo } 336b9450e43SRui Paulo 337b9450e43SRui Paulo /* workaround for core clock */ 338b9450e43SRui Paulo if (clock_id == BCM2835_MBOX_CLOCK_ID_CORE) { 339b9450e43SRui Paulo /* for safety (may change voltage without changing clock) */ 340b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 341b9450e43SRui Paulo 342b9450e43SRui Paulo /* 343b9450e43SRui Paulo * XXX: the core clock is unable to change at once, 344b9450e43SRui Paulo * to change certainly, write it twice now. 345b9450e43SRui Paulo */ 346b9450e43SRui Paulo 347b9450e43SRui Paulo /* setup single tag buffer */ 348cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 349cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 350cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 351cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_CLOCK_RATE; 352cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 353cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 354cd3903c6SOleksandr Tymoshenko msg.body.req.clock_id = clock_id; 355cd3903c6SOleksandr Tymoshenko msg.body.req.rate_hz = rate_hz; 356cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 357b9450e43SRui Paulo 358b9450e43SRui Paulo /* call mailbox property */ 359cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 360b9450e43SRui Paulo if (err) { 361b9450e43SRui Paulo device_printf(sc->dev, 362b9450e43SRui Paulo "can't set clock rate (id=%u)\n", clock_id); 363b9450e43SRui Paulo return (MSG_ERROR); 364b9450e43SRui Paulo } 365b9450e43SRui Paulo } 366b9450e43SRui Paulo 367b9450e43SRui Paulo /* result (Hz) */ 368cd3903c6SOleksandr Tymoshenko rate = (int)msg.body.resp.rate_hz; 369b9450e43SRui Paulo DPRINTF("clock = %d(Hz)\n", rate); 370b9450e43SRui Paulo return (rate); 371b9450e43SRui Paulo } 372b9450e43SRui Paulo 373b9450e43SRui Paulo static int 374b9450e43SRui Paulo bcm2835_cpufreq_get_turbo(struct bcm2835_cpufreq_softc *sc) 375b9450e43SRui Paulo { 376cd3903c6SOleksandr Tymoshenko struct msg_get_turbo msg; 377b9450e43SRui Paulo int level; 378b9450e43SRui Paulo int err; 379b9450e43SRui Paulo 380b9450e43SRui Paulo /* 381b9450e43SRui Paulo * Get turbo 382b9450e43SRui Paulo * Tag: 0x00030009 383b9450e43SRui Paulo * Request: 384b9450e43SRui Paulo * Length: 4 385b9450e43SRui Paulo * Value: 386b9450e43SRui Paulo * u32: id 387b9450e43SRui Paulo * Response: 388b9450e43SRui Paulo * Length: 8 389b9450e43SRui Paulo * Value: 390b9450e43SRui Paulo * u32: id 391b9450e43SRui Paulo * u32: level 392b9450e43SRui Paulo */ 393b9450e43SRui Paulo 394b9450e43SRui Paulo /* setup single tag buffer */ 395cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 396cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 397cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 398cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TURBO; 399cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 400cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 401cd3903c6SOleksandr Tymoshenko msg.body.req.id = 0; 402cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 403b9450e43SRui Paulo 404b9450e43SRui Paulo /* call mailbox property */ 405cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 406b9450e43SRui Paulo if (err) { 407b9450e43SRui Paulo device_printf(sc->dev, "can't get turbo\n"); 408b9450e43SRui Paulo return (MSG_ERROR); 409b9450e43SRui Paulo } 410b9450e43SRui Paulo 411b9450e43SRui Paulo /* result 0=non-turbo, 1=turbo */ 412cd3903c6SOleksandr Tymoshenko level = (int)msg.body.resp.level; 413b9450e43SRui Paulo DPRINTF("level = %d\n", level); 414b9450e43SRui Paulo return (level); 415b9450e43SRui Paulo } 416b9450e43SRui Paulo 417b9450e43SRui Paulo static int 418b9450e43SRui Paulo bcm2835_cpufreq_set_turbo(struct bcm2835_cpufreq_softc *sc, uint32_t level) 419b9450e43SRui Paulo { 420cd3903c6SOleksandr Tymoshenko struct msg_set_turbo msg; 421b9450e43SRui Paulo int value; 422b9450e43SRui Paulo int err; 423b9450e43SRui Paulo 424b9450e43SRui Paulo /* 425b9450e43SRui Paulo * Set turbo 426b9450e43SRui Paulo * Tag: 0x00038009 427b9450e43SRui Paulo * Request: 428b9450e43SRui Paulo * Length: 8 429b9450e43SRui Paulo * Value: 430b9450e43SRui Paulo * u32: id 431b9450e43SRui Paulo * u32: level 432b9450e43SRui Paulo * Response: 433b9450e43SRui Paulo * Length: 8 434b9450e43SRui Paulo * Value: 435b9450e43SRui Paulo * u32: id 436b9450e43SRui Paulo * u32: level 437b9450e43SRui Paulo */ 438b9450e43SRui Paulo 439b9450e43SRui Paulo /* replace unknown value to OFF */ 440b9450e43SRui Paulo if (level != BCM2835_MBOX_TURBO_ON && level != BCM2835_MBOX_TURBO_OFF) 441b9450e43SRui Paulo level = BCM2835_MBOX_TURBO_OFF; 442b9450e43SRui Paulo 443b9450e43SRui Paulo /* setup single tag buffer */ 444cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 445cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 446cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 447cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_TURBO; 448cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 449cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 450cd3903c6SOleksandr Tymoshenko msg.body.req.id = 0; 451cd3903c6SOleksandr Tymoshenko msg.body.req.level = level; 452cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 453b9450e43SRui Paulo 454b9450e43SRui Paulo /* call mailbox property */ 455cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 456b9450e43SRui Paulo if (err) { 457b9450e43SRui Paulo device_printf(sc->dev, "can't set turbo\n"); 458b9450e43SRui Paulo return (MSG_ERROR); 459b9450e43SRui Paulo } 460b9450e43SRui Paulo 461b9450e43SRui Paulo /* result 0=non-turbo, 1=turbo */ 462cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.level; 463b9450e43SRui Paulo DPRINTF("level = %d\n", value); 464b9450e43SRui Paulo return (value); 465b9450e43SRui Paulo } 466b9450e43SRui Paulo 467b9450e43SRui Paulo static int 468b9450e43SRui Paulo bcm2835_cpufreq_get_voltage(struct bcm2835_cpufreq_softc *sc, 469b9450e43SRui Paulo uint32_t voltage_id) 470b9450e43SRui Paulo { 471cd3903c6SOleksandr Tymoshenko struct msg_get_voltage msg; 472b9450e43SRui Paulo int value; 473b9450e43SRui Paulo int err; 474b9450e43SRui Paulo 475b9450e43SRui Paulo /* 476b9450e43SRui Paulo * Get voltage 477b9450e43SRui Paulo * Tag: 0x00030003 478b9450e43SRui Paulo * Request: 479b9450e43SRui Paulo * Length: 4 480b9450e43SRui Paulo * Value: 481b9450e43SRui Paulo * u32: voltage id 482b9450e43SRui Paulo * Response: 483b9450e43SRui Paulo * Length: 8 484b9450e43SRui Paulo * Value: 485b9450e43SRui Paulo * u32: voltage id 486b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 487b9450e43SRui Paulo */ 488b9450e43SRui Paulo 489b9450e43SRui Paulo /* setup single tag buffer */ 490cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 491cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 492cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 493cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_VOLTAGE; 494cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 495cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 496cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 497cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 498b9450e43SRui Paulo 499b9450e43SRui Paulo /* call mailbox property */ 500cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 501b9450e43SRui Paulo if (err) { 502b9450e43SRui Paulo device_printf(sc->dev, "can't get voltage\n"); 503b9450e43SRui Paulo return (MSG_ERROR); 504b9450e43SRui Paulo } 505b9450e43SRui Paulo 506b9450e43SRui Paulo /* result (offset from 1.2V) */ 507cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 508b9450e43SRui Paulo DPRINTF("value = %d\n", value); 509b9450e43SRui Paulo return (value); 510b9450e43SRui Paulo } 511b9450e43SRui Paulo 512b9450e43SRui Paulo static int 513b9450e43SRui Paulo bcm2835_cpufreq_get_max_voltage(struct bcm2835_cpufreq_softc *sc, 514b9450e43SRui Paulo uint32_t voltage_id) 515b9450e43SRui Paulo { 516cd3903c6SOleksandr Tymoshenko struct msg_get_max_voltage msg; 517b9450e43SRui Paulo int value; 518b9450e43SRui Paulo int err; 519b9450e43SRui Paulo 520b9450e43SRui Paulo /* 521b9450e43SRui Paulo * Get voltage 522b9450e43SRui Paulo * Tag: 0x00030005 523b9450e43SRui Paulo * Request: 524b9450e43SRui Paulo * Length: 4 525b9450e43SRui Paulo * Value: 526b9450e43SRui Paulo * u32: voltage id 527b9450e43SRui Paulo * Response: 528b9450e43SRui Paulo * Length: 8 529b9450e43SRui Paulo * Value: 530b9450e43SRui Paulo * u32: voltage id 531b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 532b9450e43SRui Paulo */ 533b9450e43SRui Paulo 534b9450e43SRui Paulo /* setup single tag buffer */ 535cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 536cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 537cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 538cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MAX_VOLTAGE; 539cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 540cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 541cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 542cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 543b9450e43SRui Paulo 544b9450e43SRui Paulo /* call mailbox property */ 545cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 546b9450e43SRui Paulo if (err) { 547b9450e43SRui Paulo device_printf(sc->dev, "can't get max voltage\n"); 548b9450e43SRui Paulo return (MSG_ERROR); 549b9450e43SRui Paulo } 550b9450e43SRui Paulo 551b9450e43SRui Paulo /* result (offset from 1.2V) */ 552cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 553b9450e43SRui Paulo DPRINTF("value = %d\n", value); 554b9450e43SRui Paulo return (value); 555b9450e43SRui Paulo } 556b9450e43SRui Paulo static int 557b9450e43SRui Paulo bcm2835_cpufreq_get_min_voltage(struct bcm2835_cpufreq_softc *sc, 558b9450e43SRui Paulo uint32_t voltage_id) 559b9450e43SRui Paulo { 560cd3903c6SOleksandr Tymoshenko struct msg_get_min_voltage msg; 561b9450e43SRui Paulo int value; 562b9450e43SRui Paulo int err; 563b9450e43SRui Paulo 564b9450e43SRui Paulo /* 565b9450e43SRui Paulo * Get voltage 566b9450e43SRui Paulo * Tag: 0x00030008 567b9450e43SRui Paulo * Request: 568b9450e43SRui Paulo * Length: 4 569b9450e43SRui Paulo * Value: 570b9450e43SRui Paulo * u32: voltage id 571b9450e43SRui Paulo * Response: 572b9450e43SRui Paulo * Length: 8 573b9450e43SRui Paulo * Value: 574b9450e43SRui Paulo * u32: voltage id 575b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 576b9450e43SRui Paulo */ 577b9450e43SRui Paulo 578b9450e43SRui Paulo /* setup single tag buffer */ 579cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 580cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 581cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 582cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_MIN_VOLTAGE; 583cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 584cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 585cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 586cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 587b9450e43SRui Paulo 588b9450e43SRui Paulo /* call mailbox property */ 589cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 590b9450e43SRui Paulo if (err) { 591b9450e43SRui Paulo device_printf(sc->dev, "can't get min voltage\n"); 592b9450e43SRui Paulo return (MSG_ERROR); 593b9450e43SRui Paulo } 594b9450e43SRui Paulo 595b9450e43SRui Paulo /* result (offset from 1.2V) */ 596cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 597b9450e43SRui Paulo DPRINTF("value = %d\n", value); 598b9450e43SRui Paulo return (value); 599b9450e43SRui Paulo } 600b9450e43SRui Paulo 601b9450e43SRui Paulo static int 602b9450e43SRui Paulo bcm2835_cpufreq_set_voltage(struct bcm2835_cpufreq_softc *sc, 603b9450e43SRui Paulo uint32_t voltage_id, int32_t value) 604b9450e43SRui Paulo { 605cd3903c6SOleksandr Tymoshenko struct msg_set_voltage msg; 606b9450e43SRui Paulo int err; 607b9450e43SRui Paulo 608b9450e43SRui Paulo /* 609b9450e43SRui Paulo * Set voltage 610b9450e43SRui Paulo * Tag: 0x00038003 611b9450e43SRui Paulo * Request: 612b9450e43SRui Paulo * Length: 4 613b9450e43SRui Paulo * Value: 614b9450e43SRui Paulo * u32: voltage id 615b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 616b9450e43SRui Paulo * Response: 617b9450e43SRui Paulo * Length: 8 618b9450e43SRui Paulo * Value: 619b9450e43SRui Paulo * u32: voltage id 620b9450e43SRui Paulo * u32: value (offset from 1.2V in units of 0.025V) 621b9450e43SRui Paulo */ 622b9450e43SRui Paulo 623b9450e43SRui Paulo /* 624b9450e43SRui Paulo * over_voltage: 625b9450e43SRui Paulo * 0 (1.2 V). Values above 6 are only allowed when force_turbo or 626b9450e43SRui Paulo * current_limit_override are specified (which set the warranty bit). 627b9450e43SRui Paulo */ 628b9450e43SRui Paulo if (value > MAX_OVER_VOLTAGE || value < MIN_OVER_VOLTAGE) { 629b9450e43SRui Paulo /* currently not supported */ 630b9450e43SRui Paulo device_printf(sc->dev, "not supported voltage: %d\n", value); 631b9450e43SRui Paulo return (MSG_ERROR); 632b9450e43SRui Paulo } 633b9450e43SRui Paulo 634b9450e43SRui Paulo /* setup single tag buffer */ 635cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 636cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 637cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 638cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_SET_VOLTAGE; 639cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 640cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 641cd3903c6SOleksandr Tymoshenko msg.body.req.voltage_id = voltage_id; 642cd3903c6SOleksandr Tymoshenko msg.body.req.value = (uint32_t)value; 643cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 644b9450e43SRui Paulo 645b9450e43SRui Paulo /* call mailbox property */ 646cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 647b9450e43SRui Paulo if (err) { 648b9450e43SRui Paulo device_printf(sc->dev, "can't set voltage\n"); 649b9450e43SRui Paulo return (MSG_ERROR); 650b9450e43SRui Paulo } 651b9450e43SRui Paulo 652b9450e43SRui Paulo /* result (offset from 1.2V) */ 653cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 654b9450e43SRui Paulo DPRINTF("value = %d\n", value); 655b9450e43SRui Paulo return (value); 656b9450e43SRui Paulo } 657b9450e43SRui Paulo 658b9450e43SRui Paulo static int 659b9450e43SRui Paulo bcm2835_cpufreq_get_temperature(struct bcm2835_cpufreq_softc *sc) 660b9450e43SRui Paulo { 661cd3903c6SOleksandr Tymoshenko struct msg_get_temperature msg; 662b9450e43SRui Paulo int value; 663b9450e43SRui Paulo int err; 664b9450e43SRui Paulo 665b9450e43SRui Paulo /* 666b9450e43SRui Paulo * Get temperature 667b9450e43SRui Paulo * Tag: 0x00030006 668b9450e43SRui Paulo * Request: 669b9450e43SRui Paulo * Length: 4 670b9450e43SRui Paulo * Value: 671b9450e43SRui Paulo * u32: temperature id 672b9450e43SRui Paulo * Response: 673b9450e43SRui Paulo * Length: 8 674b9450e43SRui Paulo * Value: 675b9450e43SRui Paulo * u32: temperature id 676b9450e43SRui Paulo * u32: value 677b9450e43SRui Paulo */ 678b9450e43SRui Paulo 679b9450e43SRui Paulo /* setup single tag buffer */ 680cd3903c6SOleksandr Tymoshenko memset(&msg, 0, sizeof(msg)); 681cd3903c6SOleksandr Tymoshenko msg.hdr.buf_size = sizeof(msg); 682cd3903c6SOleksandr Tymoshenko msg.hdr.code = BCM2835_MBOX_CODE_REQ; 683cd3903c6SOleksandr Tymoshenko msg.tag_hdr.tag = BCM2835_MBOX_TAG_GET_TEMPERATURE; 684cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_buf_size = sizeof(msg.body); 685cd3903c6SOleksandr Tymoshenko msg.tag_hdr.val_len = sizeof(msg.body.req); 686cd3903c6SOleksandr Tymoshenko msg.body.req.temperature_id = 0; 687cd3903c6SOleksandr Tymoshenko msg.end_tag = 0; 688b9450e43SRui Paulo 689b9450e43SRui Paulo /* call mailbox property */ 690cd3903c6SOleksandr Tymoshenko err = bcm2835_mbox_property(&msg, sizeof(msg)); 691b9450e43SRui Paulo if (err) { 692b9450e43SRui Paulo device_printf(sc->dev, "can't get temperature\n"); 693b9450e43SRui Paulo return (MSG_ERROR); 694b9450e43SRui Paulo } 695b9450e43SRui Paulo 696b9450e43SRui Paulo /* result (temperature of degree C) */ 697cd3903c6SOleksandr Tymoshenko value = (int)msg.body.resp.value; 698b9450e43SRui Paulo DPRINTF("value = %d\n", value); 699b9450e43SRui Paulo return (value); 700b9450e43SRui Paulo } 701b9450e43SRui Paulo 702b9450e43SRui Paulo 703b9450e43SRui Paulo 704b9450e43SRui Paulo static int 705b9450e43SRui Paulo sysctl_bcm2835_cpufreq_arm_freq(SYSCTL_HANDLER_ARGS) 706b9450e43SRui Paulo { 707b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 708b9450e43SRui Paulo int val; 709b9450e43SRui Paulo int err; 710b9450e43SRui Paulo 711b9450e43SRui Paulo /* get realtime value */ 712b9450e43SRui Paulo VC_LOCK(sc); 713b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM); 714b9450e43SRui Paulo VC_UNLOCK(sc); 715b9450e43SRui Paulo if (val == MSG_ERROR) 716b9450e43SRui Paulo return (EIO); 717b9450e43SRui Paulo 718b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 719b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 720b9450e43SRui Paulo return (err); 721b9450e43SRui Paulo 722b9450e43SRui Paulo /* write request */ 723b9450e43SRui Paulo VC_LOCK(sc); 724b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 725b9450e43SRui Paulo val); 726b9450e43SRui Paulo VC_UNLOCK(sc); 727b9450e43SRui Paulo if (err == MSG_ERROR) { 728b9450e43SRui Paulo device_printf(sc->dev, "set clock arm_freq error\n"); 729b9450e43SRui Paulo return (EIO); 730b9450e43SRui Paulo } 731b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 732b9450e43SRui Paulo 733b9450e43SRui Paulo return (0); 734b9450e43SRui Paulo } 735b9450e43SRui Paulo 736b9450e43SRui Paulo static int 737b9450e43SRui Paulo sysctl_bcm2835_cpufreq_core_freq(SYSCTL_HANDLER_ARGS) 738b9450e43SRui Paulo { 739b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 740b9450e43SRui Paulo int val; 741b9450e43SRui Paulo int err; 742b9450e43SRui Paulo 743b9450e43SRui Paulo /* get realtime value */ 744b9450e43SRui Paulo VC_LOCK(sc); 745b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE); 746b9450e43SRui Paulo VC_UNLOCK(sc); 747b9450e43SRui Paulo if (val == MSG_ERROR) 748b9450e43SRui Paulo return (EIO); 749b9450e43SRui Paulo 750b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 751b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 752b9450e43SRui Paulo return (err); 753b9450e43SRui Paulo 754b9450e43SRui Paulo /* write request */ 755b9450e43SRui Paulo VC_LOCK(sc); 756b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 757b9450e43SRui Paulo val); 758b9450e43SRui Paulo if (err == MSG_ERROR) { 759b9450e43SRui Paulo VC_UNLOCK(sc); 760b9450e43SRui Paulo device_printf(sc->dev, "set clock core_freq error\n"); 761b9450e43SRui Paulo return (EIO); 762b9450e43SRui Paulo } 763b9450e43SRui Paulo VC_UNLOCK(sc); 764b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 765b9450e43SRui Paulo 766b9450e43SRui Paulo return (0); 767b9450e43SRui Paulo } 768b9450e43SRui Paulo 769b9450e43SRui Paulo static int 770b9450e43SRui Paulo sysctl_bcm2835_cpufreq_sdram_freq(SYSCTL_HANDLER_ARGS) 771b9450e43SRui Paulo { 772b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 773b9450e43SRui Paulo int val; 774b9450e43SRui Paulo int err; 775b9450e43SRui Paulo 776b9450e43SRui Paulo /* get realtime value */ 777b9450e43SRui Paulo VC_LOCK(sc); 778b9450e43SRui Paulo val = bcm2835_cpufreq_get_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM); 779b9450e43SRui Paulo VC_UNLOCK(sc); 780b9450e43SRui Paulo if (val == MSG_ERROR) 781b9450e43SRui Paulo return (EIO); 782b9450e43SRui Paulo 783b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 784b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 785b9450e43SRui Paulo return (err); 786b9450e43SRui Paulo 787b9450e43SRui Paulo /* write request */ 788b9450e43SRui Paulo VC_LOCK(sc); 789b9450e43SRui Paulo err = bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_SDRAM, 790b9450e43SRui Paulo val); 791b9450e43SRui Paulo VC_UNLOCK(sc); 792b9450e43SRui Paulo if (err == MSG_ERROR) { 793b9450e43SRui Paulo device_printf(sc->dev, "set clock sdram_freq error\n"); 794b9450e43SRui Paulo return (EIO); 795b9450e43SRui Paulo } 796b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 797b9450e43SRui Paulo 798b9450e43SRui Paulo return (0); 799b9450e43SRui Paulo } 800b9450e43SRui Paulo 801b9450e43SRui Paulo static int 802b9450e43SRui Paulo sysctl_bcm2835_cpufreq_turbo(SYSCTL_HANDLER_ARGS) 803b9450e43SRui Paulo { 804b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 805b9450e43SRui Paulo int val; 806b9450e43SRui Paulo int err; 807b9450e43SRui Paulo 808b9450e43SRui Paulo /* get realtime value */ 809b9450e43SRui Paulo VC_LOCK(sc); 810b9450e43SRui Paulo val = bcm2835_cpufreq_get_turbo(sc); 811b9450e43SRui Paulo VC_UNLOCK(sc); 812b9450e43SRui Paulo if (val == MSG_ERROR) 813b9450e43SRui Paulo return (EIO); 814b9450e43SRui Paulo 815b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 816b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 817b9450e43SRui Paulo return (err); 818b9450e43SRui Paulo 819b9450e43SRui Paulo /* write request */ 820b9450e43SRui Paulo if (val > 0) 821b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_ON; 822b9450e43SRui Paulo else 823b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_OFF; 824b9450e43SRui Paulo 825b9450e43SRui Paulo VC_LOCK(sc); 826b9450e43SRui Paulo err = bcm2835_cpufreq_set_turbo(sc, sc->turbo_mode); 827b9450e43SRui Paulo VC_UNLOCK(sc); 828b9450e43SRui Paulo if (err == MSG_ERROR) { 829b9450e43SRui Paulo device_printf(sc->dev, "set turbo error\n"); 830b9450e43SRui Paulo return (EIO); 831b9450e43SRui Paulo } 832b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 833b9450e43SRui Paulo 834b9450e43SRui Paulo return (0); 835b9450e43SRui Paulo } 836b9450e43SRui Paulo 837b9450e43SRui Paulo static int 838b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_core(SYSCTL_HANDLER_ARGS) 839b9450e43SRui Paulo { 840b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 841b9450e43SRui Paulo int val; 842b9450e43SRui Paulo int err; 843b9450e43SRui Paulo 844b9450e43SRui Paulo /* get realtime value */ 845b9450e43SRui Paulo VC_LOCK(sc); 846b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE); 847b9450e43SRui Paulo VC_UNLOCK(sc); 848b9450e43SRui Paulo if (val == MSG_ERROR) 849b9450e43SRui Paulo return (EIO); 850b9450e43SRui Paulo 851b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 852b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 853b9450e43SRui Paulo return (err); 854b9450e43SRui Paulo 855b9450e43SRui Paulo /* write request */ 856b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 857b9450e43SRui Paulo return (EINVAL); 858b9450e43SRui Paulo sc->voltage_core = val; 859b9450e43SRui Paulo 860b9450e43SRui Paulo VC_LOCK(sc); 861b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_CORE, 862b9450e43SRui Paulo sc->voltage_core); 863b9450e43SRui Paulo VC_UNLOCK(sc); 864b9450e43SRui Paulo if (err == MSG_ERROR) { 865b9450e43SRui Paulo device_printf(sc->dev, "set voltage core error\n"); 866b9450e43SRui Paulo return (EIO); 867b9450e43SRui Paulo } 868b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 869b9450e43SRui Paulo 870b9450e43SRui Paulo return (0); 871b9450e43SRui Paulo } 872b9450e43SRui Paulo 873b9450e43SRui Paulo static int 874b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_c(SYSCTL_HANDLER_ARGS) 875b9450e43SRui Paulo { 876b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 877b9450e43SRui Paulo int val; 878b9450e43SRui Paulo int err; 879b9450e43SRui Paulo 880b9450e43SRui Paulo /* get realtime value */ 881b9450e43SRui Paulo VC_LOCK(sc); 882b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 883b9450e43SRui Paulo VC_UNLOCK(sc); 884b9450e43SRui Paulo if (val == MSG_ERROR) 885b9450e43SRui Paulo return (EIO); 886b9450e43SRui Paulo 887b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 888b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 889b9450e43SRui Paulo return (err); 890b9450e43SRui Paulo 891b9450e43SRui Paulo /* write request */ 892b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 893b9450e43SRui Paulo return (EINVAL); 894b9450e43SRui Paulo sc->voltage_sdram_c = val; 895b9450e43SRui Paulo 896b9450e43SRui Paulo VC_LOCK(sc); 897b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C, 898b9450e43SRui Paulo sc->voltage_sdram_c); 899b9450e43SRui Paulo VC_UNLOCK(sc); 900b9450e43SRui Paulo if (err == MSG_ERROR) { 901b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_c error\n"); 902b9450e43SRui Paulo return (EIO); 903b9450e43SRui Paulo } 904b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 905b9450e43SRui Paulo 906b9450e43SRui Paulo return (0); 907b9450e43SRui Paulo } 908b9450e43SRui Paulo 909b9450e43SRui Paulo static int 910b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_i(SYSCTL_HANDLER_ARGS) 911b9450e43SRui Paulo { 912b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 913b9450e43SRui Paulo int val; 914b9450e43SRui Paulo int err; 915b9450e43SRui Paulo 916b9450e43SRui Paulo /* get realtime value */ 917b9450e43SRui Paulo VC_LOCK(sc); 918b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 919b9450e43SRui Paulo VC_UNLOCK(sc); 920b9450e43SRui Paulo if (val == MSG_ERROR) 921b9450e43SRui Paulo return (EIO); 922b9450e43SRui Paulo 923b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 924b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 925b9450e43SRui Paulo return (err); 926b9450e43SRui Paulo 927b9450e43SRui Paulo /* write request */ 928b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 929b9450e43SRui Paulo return (EINVAL); 930b9450e43SRui Paulo sc->voltage_sdram_i = val; 931b9450e43SRui Paulo 932b9450e43SRui Paulo VC_LOCK(sc); 933b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I, 934b9450e43SRui Paulo sc->voltage_sdram_i); 935b9450e43SRui Paulo VC_UNLOCK(sc); 936b9450e43SRui Paulo if (err == MSG_ERROR) { 937b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_i error\n"); 938b9450e43SRui Paulo return (EIO); 939b9450e43SRui Paulo } 940b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 941b9450e43SRui Paulo 942b9450e43SRui Paulo return (0); 943b9450e43SRui Paulo } 944b9450e43SRui Paulo 945b9450e43SRui Paulo static int 946b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram_p(SYSCTL_HANDLER_ARGS) 947b9450e43SRui Paulo { 948b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 949b9450e43SRui Paulo int val; 950b9450e43SRui Paulo int err; 951b9450e43SRui Paulo 952b9450e43SRui Paulo /* get realtime value */ 953b9450e43SRui Paulo VC_LOCK(sc); 954b9450e43SRui Paulo val = bcm2835_cpufreq_get_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 955b9450e43SRui Paulo VC_UNLOCK(sc); 956b9450e43SRui Paulo if (val == MSG_ERROR) 957b9450e43SRui Paulo return (EIO); 958b9450e43SRui Paulo 959b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 960b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 961b9450e43SRui Paulo return (err); 962b9450e43SRui Paulo 963b9450e43SRui Paulo /* write request */ 964b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 965b9450e43SRui Paulo return (EINVAL); 966b9450e43SRui Paulo sc->voltage_sdram_p = val; 967b9450e43SRui Paulo 968b9450e43SRui Paulo VC_LOCK(sc); 969b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P, 970b9450e43SRui Paulo sc->voltage_sdram_p); 971b9450e43SRui Paulo VC_UNLOCK(sc); 972b9450e43SRui Paulo if (err == MSG_ERROR) { 973b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_p error\n"); 974b9450e43SRui Paulo return (EIO); 975b9450e43SRui Paulo } 976b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 977b9450e43SRui Paulo 978b9450e43SRui Paulo return (0); 979b9450e43SRui Paulo } 980b9450e43SRui Paulo 981b9450e43SRui Paulo static int 982b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_sdram(SYSCTL_HANDLER_ARGS) 983b9450e43SRui Paulo { 984b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 985b9450e43SRui Paulo int val; 986b9450e43SRui Paulo int err; 987b9450e43SRui Paulo 988b9450e43SRui Paulo /* multiple write only */ 989b9450e43SRui Paulo if (!req->newptr) 990b9450e43SRui Paulo return (EINVAL); 991b9450e43SRui Paulo val = 0; 992b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 993b9450e43SRui Paulo if (err) 994b9450e43SRui Paulo return (err); 995b9450e43SRui Paulo 996b9450e43SRui Paulo /* write request */ 997b9450e43SRui Paulo if (val > MAX_OVER_VOLTAGE || val < MIN_OVER_VOLTAGE) 998b9450e43SRui Paulo return (EINVAL); 999b9450e43SRui Paulo sc->voltage_sdram = val; 1000b9450e43SRui Paulo 1001b9450e43SRui Paulo VC_LOCK(sc); 1002b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_C, 1003b9450e43SRui Paulo val); 1004b9450e43SRui Paulo if (err == MSG_ERROR) { 1005b9450e43SRui Paulo VC_UNLOCK(sc); 1006b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_c error\n"); 1007b9450e43SRui Paulo return (EIO); 1008b9450e43SRui Paulo } 1009b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_I, 1010b9450e43SRui Paulo val); 1011b9450e43SRui Paulo if (err == MSG_ERROR) { 1012b9450e43SRui Paulo VC_UNLOCK(sc); 1013b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_i error\n"); 1014b9450e43SRui Paulo return (EIO); 1015b9450e43SRui Paulo } 1016b9450e43SRui Paulo err = bcm2835_cpufreq_set_voltage(sc, BCM2835_MBOX_VOLTAGE_ID_SDRAM_P, 1017b9450e43SRui Paulo val); 1018b9450e43SRui Paulo if (err == MSG_ERROR) { 1019b9450e43SRui Paulo VC_UNLOCK(sc); 1020b9450e43SRui Paulo device_printf(sc->dev, "set voltage sdram_p error\n"); 1021b9450e43SRui Paulo return (EIO); 1022b9450e43SRui Paulo } 1023b9450e43SRui Paulo VC_UNLOCK(sc); 1024b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1025b9450e43SRui Paulo 1026b9450e43SRui Paulo return (0); 1027b9450e43SRui Paulo } 1028b9450e43SRui Paulo 1029b9450e43SRui Paulo static int 1030b9450e43SRui Paulo sysctl_bcm2835_cpufreq_temperature(SYSCTL_HANDLER_ARGS) 1031b9450e43SRui Paulo { 1032b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 1033b9450e43SRui Paulo int val; 1034b9450e43SRui Paulo int err; 1035b9450e43SRui Paulo 1036b9450e43SRui Paulo /* get realtime value */ 1037b9450e43SRui Paulo VC_LOCK(sc); 1038b9450e43SRui Paulo val = bcm2835_cpufreq_get_temperature(sc); 1039b9450e43SRui Paulo VC_UNLOCK(sc); 1040b9450e43SRui Paulo if (val == MSG_ERROR) 1041b9450e43SRui Paulo return (EIO); 1042b9450e43SRui Paulo 1043b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 1044b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 1045b9450e43SRui Paulo return (err); 1046b9450e43SRui Paulo 1047b9450e43SRui Paulo /* write request */ 1048b9450e43SRui Paulo return (EINVAL); 1049b9450e43SRui Paulo } 1050b9450e43SRui Paulo 1051b9450e43SRui Paulo static int 1052b9450e43SRui Paulo sysctl_bcm2835_devcpu_temperature(SYSCTL_HANDLER_ARGS) 1053b9450e43SRui Paulo { 1054b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg1; 1055b9450e43SRui Paulo int val; 1056b9450e43SRui Paulo int err; 1057b9450e43SRui Paulo 1058b9450e43SRui Paulo /* get realtime value */ 1059b9450e43SRui Paulo VC_LOCK(sc); 1060b9450e43SRui Paulo val = bcm2835_cpufreq_get_temperature(sc); 1061b9450e43SRui Paulo VC_UNLOCK(sc); 1062b9450e43SRui Paulo if (val == MSG_ERROR) 1063b9450e43SRui Paulo return (EIO); 1064b9450e43SRui Paulo 1065b9450e43SRui Paulo /* 1/1000 celsius (raw) to 1/10 kelvin */ 1066e4b6eaf7SLuiz Otavio O Souza val = val / 100 + TZ_ZEROC; 1067b9450e43SRui Paulo 1068b9450e43SRui Paulo err = sysctl_handle_int(oidp, &val, 0, req); 1069b9450e43SRui Paulo if (err || !req->newptr) /* error || read request */ 1070b9450e43SRui Paulo return (err); 1071b9450e43SRui Paulo 1072b9450e43SRui Paulo /* write request */ 1073b9450e43SRui Paulo return (EINVAL); 1074b9450e43SRui Paulo } 1075b9450e43SRui Paulo 1076b9450e43SRui Paulo 1077b9450e43SRui Paulo static void 1078b9450e43SRui Paulo bcm2835_cpufreq_init(void *arg) 1079b9450e43SRui Paulo { 1080b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc = arg; 1081b9450e43SRui Paulo struct sysctl_ctx_list *ctx; 1082b9450e43SRui Paulo device_t cpu; 1083b9450e43SRui Paulo int arm_freq, core_freq, sdram_freq; 1084b9450e43SRui Paulo int arm_max_freq, arm_min_freq, core_max_freq, core_min_freq; 1085b9450e43SRui Paulo int sdram_max_freq, sdram_min_freq; 1086b9450e43SRui Paulo int voltage_core, voltage_sdram_c, voltage_sdram_i, voltage_sdram_p; 1087b9450e43SRui Paulo int max_voltage_core, min_voltage_core; 1088b9450e43SRui Paulo int max_voltage_sdram_c, min_voltage_sdram_c; 1089b9450e43SRui Paulo int max_voltage_sdram_i, min_voltage_sdram_i; 1090b9450e43SRui Paulo int max_voltage_sdram_p, min_voltage_sdram_p; 1091b9450e43SRui Paulo int turbo, temperature; 1092b9450e43SRui Paulo 1093b9450e43SRui Paulo VC_LOCK(sc); 1094b9450e43SRui Paulo 1095b9450e43SRui Paulo /* current clock */ 1096b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1097b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1098b9450e43SRui Paulo core_freq = bcm2835_cpufreq_get_clock_rate(sc, 1099b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1100b9450e43SRui Paulo sdram_freq = bcm2835_cpufreq_get_clock_rate(sc, 1101b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1102b9450e43SRui Paulo 1103b9450e43SRui Paulo /* max/min clock */ 1104b9450e43SRui Paulo arm_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1105b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1106b9450e43SRui Paulo arm_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1107b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1108b9450e43SRui Paulo core_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1109b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1110b9450e43SRui Paulo core_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1111b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1112b9450e43SRui Paulo sdram_max_freq = bcm2835_cpufreq_get_max_clock_rate(sc, 1113b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1114b9450e43SRui Paulo sdram_min_freq = bcm2835_cpufreq_get_min_clock_rate(sc, 1115b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM); 1116b9450e43SRui Paulo 1117b9450e43SRui Paulo /* turbo mode */ 1118b9450e43SRui Paulo turbo = bcm2835_cpufreq_get_turbo(sc); 1119b9450e43SRui Paulo if (turbo > 0) 1120b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_ON; 1121b9450e43SRui Paulo else 1122b9450e43SRui Paulo sc->turbo_mode = BCM2835_MBOX_TURBO_OFF; 1123b9450e43SRui Paulo 1124b9450e43SRui Paulo /* voltage */ 1125b9450e43SRui Paulo voltage_core = bcm2835_cpufreq_get_voltage(sc, 1126b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1127b9450e43SRui Paulo voltage_sdram_c = bcm2835_cpufreq_get_voltage(sc, 1128b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1129b9450e43SRui Paulo voltage_sdram_i = bcm2835_cpufreq_get_voltage(sc, 1130b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1131b9450e43SRui Paulo voltage_sdram_p = bcm2835_cpufreq_get_voltage(sc, 1132b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1133b9450e43SRui Paulo 1134b9450e43SRui Paulo /* current values (offset from 1.2V) */ 1135b9450e43SRui Paulo sc->voltage_core = voltage_core; 1136b9450e43SRui Paulo sc->voltage_sdram = voltage_sdram_c; 1137b9450e43SRui Paulo sc->voltage_sdram_c = voltage_sdram_c; 1138b9450e43SRui Paulo sc->voltage_sdram_i = voltage_sdram_i; 1139b9450e43SRui Paulo sc->voltage_sdram_p = voltage_sdram_p; 1140b9450e43SRui Paulo 1141b9450e43SRui Paulo /* max/min voltage */ 1142b9450e43SRui Paulo max_voltage_core = bcm2835_cpufreq_get_max_voltage(sc, 1143b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1144b9450e43SRui Paulo min_voltage_core = bcm2835_cpufreq_get_min_voltage(sc, 1145b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE); 1146b9450e43SRui Paulo max_voltage_sdram_c = bcm2835_cpufreq_get_max_voltage(sc, 1147b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1148b9450e43SRui Paulo max_voltage_sdram_i = bcm2835_cpufreq_get_max_voltage(sc, 1149b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1150b9450e43SRui Paulo max_voltage_sdram_p = bcm2835_cpufreq_get_max_voltage(sc, 1151b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1152b9450e43SRui Paulo min_voltage_sdram_c = bcm2835_cpufreq_get_min_voltage(sc, 1153b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_C); 1154b9450e43SRui Paulo min_voltage_sdram_i = bcm2835_cpufreq_get_min_voltage(sc, 1155b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_I); 1156b9450e43SRui Paulo min_voltage_sdram_p = bcm2835_cpufreq_get_min_voltage(sc, 1157b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_SDRAM_P); 1158b9450e43SRui Paulo 1159b9450e43SRui Paulo /* temperature */ 1160b9450e43SRui Paulo temperature = bcm2835_cpufreq_get_temperature(sc); 1161b9450e43SRui Paulo 1162b9450e43SRui Paulo /* show result */ 1163b9450e43SRui Paulo if (cpufreq_verbose || bootverbose) { 1164b9450e43SRui Paulo device_printf(sc->dev, "Boot settings:\n"); 1165b9450e43SRui Paulo device_printf(sc->dev, 1166b9450e43SRui Paulo "current ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n", 1167b9450e43SRui Paulo HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq), 1168b9450e43SRui Paulo (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF"); 1169b9450e43SRui Paulo 1170b9450e43SRui Paulo device_printf(sc->dev, 1171b9450e43SRui Paulo "max/min ARM %d/%dMHz, Core %d/%dMHz, SDRAM %d/%dMHz\n", 1172b9450e43SRui Paulo HZ2MHZ(arm_max_freq), HZ2MHZ(arm_min_freq), 1173b9450e43SRui Paulo HZ2MHZ(core_max_freq), HZ2MHZ(core_min_freq), 1174b9450e43SRui Paulo HZ2MHZ(sdram_max_freq), HZ2MHZ(sdram_min_freq)); 1175b9450e43SRui Paulo 1176b9450e43SRui Paulo device_printf(sc->dev, 1177b9450e43SRui Paulo "current Core %dmV, SDRAM_C %dmV, SDRAM_I %dmV, " 1178b9450e43SRui Paulo "SDRAM_P %dmV\n", 1179b9450e43SRui Paulo OFFSET2MVOLT(voltage_core), OFFSET2MVOLT(voltage_sdram_c), 1180b9450e43SRui Paulo OFFSET2MVOLT(voltage_sdram_i), 1181b9450e43SRui Paulo OFFSET2MVOLT(voltage_sdram_p)); 1182b9450e43SRui Paulo 1183b9450e43SRui Paulo device_printf(sc->dev, 1184b9450e43SRui Paulo "max/min Core %d/%dmV, SDRAM_C %d/%dmV, SDRAM_I %d/%dmV, " 1185b9450e43SRui Paulo "SDRAM_P %d/%dmV\n", 1186b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_core), 1187b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_core), 1188b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_c), 1189b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_c), 1190b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_i), 1191b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_i), 1192b9450e43SRui Paulo OFFSET2MVOLT(max_voltage_sdram_p), 1193b9450e43SRui Paulo OFFSET2MVOLT(min_voltage_sdram_p)); 1194b9450e43SRui Paulo 1195b9450e43SRui Paulo device_printf(sc->dev, 1196b9450e43SRui Paulo "Temperature %d.%dC\n", (temperature / 1000), 1197b9450e43SRui Paulo (temperature % 1000) / 100); 1198b9450e43SRui Paulo } else { /* !cpufreq_verbose && !bootverbose */ 1199b9450e43SRui Paulo device_printf(sc->dev, 1200b9450e43SRui Paulo "ARM %dMHz, Core %dMHz, SDRAM %dMHz, Turbo %s\n", 1201b9450e43SRui Paulo HZ2MHZ(arm_freq), HZ2MHZ(core_freq), HZ2MHZ(sdram_freq), 1202b9450e43SRui Paulo (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) ? "ON" : "OFF"); 1203b9450e43SRui Paulo } 1204b9450e43SRui Paulo 1205b9450e43SRui Paulo /* keep in softc (MHz/mV) */ 1206b9450e43SRui Paulo sc->arm_max_freq = HZ2MHZ(arm_max_freq); 1207b9450e43SRui Paulo sc->arm_min_freq = HZ2MHZ(arm_min_freq); 1208b9450e43SRui Paulo sc->core_max_freq = HZ2MHZ(core_max_freq); 1209b9450e43SRui Paulo sc->core_min_freq = HZ2MHZ(core_min_freq); 1210b9450e43SRui Paulo sc->sdram_max_freq = HZ2MHZ(sdram_max_freq); 1211b9450e43SRui Paulo sc->sdram_min_freq = HZ2MHZ(sdram_min_freq); 1212b9450e43SRui Paulo sc->max_voltage_core = OFFSET2MVOLT(max_voltage_core); 1213b9450e43SRui Paulo sc->min_voltage_core = OFFSET2MVOLT(min_voltage_core); 1214b9450e43SRui Paulo 1215b9450e43SRui Paulo /* if turbo is on, set to max values */ 1216b9450e43SRui Paulo if (sc->turbo_mode == BCM2835_MBOX_TURBO_ON) { 1217b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 1218b9450e43SRui Paulo arm_max_freq); 1219b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1220b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 1221b9450e43SRui Paulo core_max_freq); 1222b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1223b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1224b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_max_freq); 1225b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1226b9450e43SRui Paulo } else { 1227b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_ARM, 1228b9450e43SRui Paulo arm_min_freq); 1229b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1230b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, BCM2835_MBOX_CLOCK_ID_CORE, 1231b9450e43SRui Paulo core_min_freq); 1232b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1233b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1234b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, sdram_min_freq); 1235b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1236b9450e43SRui Paulo } 1237b9450e43SRui Paulo 1238b9450e43SRui Paulo VC_UNLOCK(sc); 1239b9450e43SRui Paulo 1240b9450e43SRui Paulo /* add human readable temperature to dev.cpu node */ 1241b9450e43SRui Paulo cpu = device_get_parent(sc->dev); 1242b9450e43SRui Paulo if (cpu != NULL) { 1243b9450e43SRui Paulo ctx = device_get_sysctl_ctx(cpu); 1244b9450e43SRui Paulo SYSCTL_ADD_PROC(ctx, 1245b9450e43SRui Paulo SYSCTL_CHILDREN(device_get_sysctl_tree(cpu)), OID_AUTO, 1246b9450e43SRui Paulo "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0, 1247b9450e43SRui Paulo sysctl_bcm2835_devcpu_temperature, "IK", 1248b9450e43SRui Paulo "Current SoC temperature"); 1249b9450e43SRui Paulo } 1250b9450e43SRui Paulo 1251b9450e43SRui Paulo /* release this hook (continue boot) */ 1252b9450e43SRui Paulo config_intrhook_disestablish(&sc->init_hook); 1253b9450e43SRui Paulo } 1254b9450e43SRui Paulo 1255b9450e43SRui Paulo static void 1256b9450e43SRui Paulo bcm2835_cpufreq_identify(driver_t *driver, device_t parent) 1257b9450e43SRui Paulo { 1258e374c335SEmmanuel Vadot const struct ofw_compat_data *compat; 1259e374c335SEmmanuel Vadot phandle_t root; 1260e374c335SEmmanuel Vadot 1261e374c335SEmmanuel Vadot root = OF_finddevice("/"); 1262e374c335SEmmanuel Vadot for (compat = compat_data; compat->ocd_str != NULL; compat++) 126387acb7f8SAndrew Turner if (ofw_bus_node_is_compatible(root, compat->ocd_str)) 1264e374c335SEmmanuel Vadot break; 1265e374c335SEmmanuel Vadot 1266e374c335SEmmanuel Vadot if (compat->ocd_data == 0) 1267e374c335SEmmanuel Vadot return; 1268b9450e43SRui Paulo 1269b9450e43SRui Paulo DPRINTF("driver=%p, parent=%p\n", driver, parent); 1270b9450e43SRui Paulo if (device_find_child(parent, "bcm2835_cpufreq", -1) != NULL) 1271b9450e43SRui Paulo return; 1272b9450e43SRui Paulo if (BUS_ADD_CHILD(parent, 0, "bcm2835_cpufreq", -1) == NULL) 1273b9450e43SRui Paulo device_printf(parent, "add child failed\n"); 1274b9450e43SRui Paulo } 1275b9450e43SRui Paulo 1276b9450e43SRui Paulo static int 1277b9450e43SRui Paulo bcm2835_cpufreq_probe(device_t dev) 1278b9450e43SRui Paulo { 1279b9450e43SRui Paulo 1280962940ceSLuiz Otavio O Souza if (device_get_unit(dev) != 0) 1281962940ceSLuiz Otavio O Souza return (ENXIO); 1282b9450e43SRui Paulo device_set_desc(dev, "CPU Frequency Control"); 1283962940ceSLuiz Otavio O Souza 1284b9450e43SRui Paulo return (0); 1285b9450e43SRui Paulo } 1286b9450e43SRui Paulo 1287b9450e43SRui Paulo static int 1288b9450e43SRui Paulo bcm2835_cpufreq_attach(device_t dev) 1289b9450e43SRui Paulo { 1290b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1291b9450e43SRui Paulo struct sysctl_oid *oid; 1292b9450e43SRui Paulo 1293b9450e43SRui Paulo /* set self dev */ 1294b9450e43SRui Paulo sc = device_get_softc(dev); 1295b9450e43SRui Paulo sc->dev = dev; 1296b9450e43SRui Paulo 1297b9450e43SRui Paulo /* initial values */ 1298b9450e43SRui Paulo sc->arm_max_freq = -1; 1299b9450e43SRui Paulo sc->arm_min_freq = -1; 1300b9450e43SRui Paulo sc->core_max_freq = -1; 1301b9450e43SRui Paulo sc->core_min_freq = -1; 1302b9450e43SRui Paulo sc->sdram_max_freq = -1; 1303b9450e43SRui Paulo sc->sdram_min_freq = -1; 1304b9450e43SRui Paulo sc->max_voltage_core = 0; 1305b9450e43SRui Paulo sc->min_voltage_core = 0; 1306b9450e43SRui Paulo 1307b9450e43SRui Paulo /* setup sysctl at first device */ 1308b9450e43SRui Paulo if (device_get_unit(dev) == 0) { 1309b9450e43SRui Paulo sysctl_ctx_init(&bcm2835_sysctl_ctx); 1310b9450e43SRui Paulo /* create node for hw.cpufreq */ 1311b9450e43SRui Paulo oid = SYSCTL_ADD_NODE(&bcm2835_sysctl_ctx, 1312b9450e43SRui Paulo SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, "cpufreq", 1313b9450e43SRui Paulo CTLFLAG_RD, NULL, ""); 1314b9450e43SRui Paulo 1315b9450e43SRui Paulo /* Frequency (Hz) */ 1316b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1317b9450e43SRui Paulo OID_AUTO, "arm_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1318b9450e43SRui Paulo sysctl_bcm2835_cpufreq_arm_freq, "IU", 1319b9450e43SRui Paulo "ARM frequency (Hz)"); 1320b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1321b9450e43SRui Paulo OID_AUTO, "core_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1322b9450e43SRui Paulo sysctl_bcm2835_cpufreq_core_freq, "IU", 1323b9450e43SRui Paulo "Core frequency (Hz)"); 1324b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1325b9450e43SRui Paulo OID_AUTO, "sdram_freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1326b9450e43SRui Paulo sysctl_bcm2835_cpufreq_sdram_freq, "IU", 1327b9450e43SRui Paulo "SDRAM frequency (Hz)"); 1328b9450e43SRui Paulo 1329b9450e43SRui Paulo /* Turbo state */ 1330b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1331b9450e43SRui Paulo OID_AUTO, "turbo", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1332b9450e43SRui Paulo sysctl_bcm2835_cpufreq_turbo, "IU", 1333b9450e43SRui Paulo "Disables dynamic clocking"); 1334b9450e43SRui Paulo 1335b9450e43SRui Paulo /* Voltage (offset from 1.2V in units of 0.025V) */ 1336b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1337b9450e43SRui Paulo OID_AUTO, "voltage_core", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1338b9450e43SRui Paulo sysctl_bcm2835_cpufreq_voltage_core, "I", 1339b9450e43SRui Paulo "ARM/GPU core voltage" 1340b9450e43SRui Paulo "(offset from 1.2V in units of 0.025V)"); 1341b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1342b9450e43SRui Paulo OID_AUTO, "voltage_sdram", CTLTYPE_INT | CTLFLAG_WR, sc, 1343b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram, "I", 1344b9450e43SRui Paulo "SDRAM voltage (offset from 1.2V in units of 0.025V)"); 1345b9450e43SRui Paulo 1346b9450e43SRui Paulo /* Voltage individual SDRAM */ 1347b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1348b9450e43SRui Paulo OID_AUTO, "voltage_sdram_c", CTLTYPE_INT | CTLFLAG_RW, sc, 1349b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_c, "I", 1350b9450e43SRui Paulo "SDRAM controller voltage" 1351b9450e43SRui Paulo "(offset from 1.2V in units of 0.025V)"); 1352b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1353b9450e43SRui Paulo OID_AUTO, "voltage_sdram_i", CTLTYPE_INT | CTLFLAG_RW, sc, 1354b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_i, "I", 1355b9450e43SRui Paulo "SDRAM I/O voltage (offset from 1.2V in units of 0.025V)"); 1356b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1357b9450e43SRui Paulo OID_AUTO, "voltage_sdram_p", CTLTYPE_INT | CTLFLAG_RW, sc, 1358b9450e43SRui Paulo 0, sysctl_bcm2835_cpufreq_voltage_sdram_p, "I", 1359b9450e43SRui Paulo "SDRAM phy voltage (offset from 1.2V in units of 0.025V)"); 1360b9450e43SRui Paulo 1361b9450e43SRui Paulo /* Temperature */ 1362b9450e43SRui Paulo SYSCTL_ADD_PROC(&bcm2835_sysctl_ctx, SYSCTL_CHILDREN(oid), 1363b9450e43SRui Paulo OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0, 1364b9450e43SRui Paulo sysctl_bcm2835_cpufreq_temperature, "I", 1365b9450e43SRui Paulo "SoC temperature (thousandths of a degree C)"); 1366b9450e43SRui Paulo } 1367b9450e43SRui Paulo 1368b9450e43SRui Paulo /* ARM->VC lock */ 1369b9450e43SRui Paulo sema_init(&vc_sema, 1, "vcsema"); 1370b9450e43SRui Paulo 1371b9450e43SRui Paulo /* register callback for using mbox when interrupts are enabled */ 1372b9450e43SRui Paulo sc->init_hook.ich_func = bcm2835_cpufreq_init; 1373b9450e43SRui Paulo sc->init_hook.ich_arg = sc; 1374b9450e43SRui Paulo 1375b9450e43SRui Paulo if (config_intrhook_establish(&sc->init_hook) != 0) { 1376b9450e43SRui Paulo device_printf(dev, "config_intrhook_establish failed\n"); 1377b9450e43SRui Paulo return (ENOMEM); 1378b9450e43SRui Paulo } 1379b9450e43SRui Paulo 1380b9450e43SRui Paulo /* this device is controlled by cpufreq(4) */ 1381b9450e43SRui Paulo cpufreq_register(dev); 1382b9450e43SRui Paulo 1383b9450e43SRui Paulo return (0); 1384b9450e43SRui Paulo } 1385b9450e43SRui Paulo 1386b9450e43SRui Paulo static int 1387b9450e43SRui Paulo bcm2835_cpufreq_detach(device_t dev) 1388b9450e43SRui Paulo { 1389b9450e43SRui Paulo 1390b9450e43SRui Paulo sema_destroy(&vc_sema); 1391b9450e43SRui Paulo 1392b9450e43SRui Paulo return (cpufreq_unregister(dev)); 1393b9450e43SRui Paulo } 1394b9450e43SRui Paulo 1395b9450e43SRui Paulo static int 1396b9450e43SRui Paulo bcm2835_cpufreq_set(device_t dev, const struct cf_setting *cf) 1397b9450e43SRui Paulo { 1398b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1399b9450e43SRui Paulo uint32_t rate_hz, rem; 1400*151ba793SAlexander Kabaev int resp_freq, arm_freq, min_freq, core_freq; 1401*151ba793SAlexander Kabaev #ifdef DEBUG 1402*151ba793SAlexander Kabaev int cur_freq; 1403*151ba793SAlexander Kabaev #endif 1404b9450e43SRui Paulo 1405b9450e43SRui Paulo if (cf == NULL || cf->freq < 0) 1406b9450e43SRui Paulo return (EINVAL); 1407b9450e43SRui Paulo 1408b9450e43SRui Paulo sc = device_get_softc(dev); 1409b9450e43SRui Paulo 1410b9450e43SRui Paulo /* setting clock (Hz) */ 1411b9450e43SRui Paulo rate_hz = (uint32_t)MHZ2HZ(cf->freq); 1412b9450e43SRui Paulo rem = rate_hz % HZSTEP; 1413b9450e43SRui Paulo rate_hz -= rem; 1414b9450e43SRui Paulo if (rate_hz == 0) 1415b9450e43SRui Paulo return (EINVAL); 1416b9450e43SRui Paulo 1417b9450e43SRui Paulo /* adjust min freq */ 1418b9450e43SRui Paulo min_freq = sc->arm_min_freq; 1419b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) 1420b9450e43SRui Paulo if (min_freq > cpufreq_lowest_freq) 1421b9450e43SRui Paulo min_freq = cpufreq_lowest_freq; 1422b9450e43SRui Paulo 1423b9450e43SRui Paulo if (rate_hz < MHZ2HZ(min_freq) || rate_hz > MHZ2HZ(sc->arm_max_freq)) 1424b9450e43SRui Paulo return (EINVAL); 1425b9450e43SRui Paulo 1426b9450e43SRui Paulo /* set new value and verify it */ 1427b9450e43SRui Paulo VC_LOCK(sc); 1428*151ba793SAlexander Kabaev #ifdef DEBUG 1429b9450e43SRui Paulo cur_freq = bcm2835_cpufreq_get_clock_rate(sc, 1430b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1431*151ba793SAlexander Kabaev #endif 1432b9450e43SRui Paulo resp_freq = bcm2835_cpufreq_set_clock_rate(sc, 1433b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM, rate_hz); 1434b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1435b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1436b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1437b9450e43SRui Paulo 1438b9450e43SRui Paulo /* 1439b9450e43SRui Paulo * if non-turbo and lower than or equal min_freq, 1440b9450e43SRui Paulo * clock down core and sdram to default first. 1441b9450e43SRui Paulo */ 1442b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) { 1443b9450e43SRui Paulo core_freq = bcm2835_cpufreq_get_clock_rate(sc, 1444b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE); 1445b9450e43SRui Paulo if (rate_hz > MHZ2HZ(sc->arm_min_freq)) { 1446b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1447b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1448b9450e43SRui Paulo MHZ2HZ(sc->core_max_freq)); 1449b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1450b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1451b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, 1452b9450e43SRui Paulo MHZ2HZ(sc->sdram_max_freq)); 1453b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1454b9450e43SRui Paulo } else { 1455b9450e43SRui Paulo if (sc->core_min_freq < DEFAULT_CORE_FREQUENCY && 1456b9450e43SRui Paulo core_freq > DEFAULT_CORE_FREQUENCY) { 1457b9450e43SRui Paulo /* first, down to 250, then down to min */ 1458b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1459b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1460b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1461b9450e43SRui Paulo MHZ2HZ(DEFAULT_CORE_FREQUENCY)); 1462b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1463b9450e43SRui Paulo /* reset core voltage */ 1464b9450e43SRui Paulo bcm2835_cpufreq_set_voltage(sc, 1465b9450e43SRui Paulo BCM2835_MBOX_VOLTAGE_ID_CORE, 0); 1466b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1467b9450e43SRui Paulo } 1468b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1469b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_CORE, 1470b9450e43SRui Paulo MHZ2HZ(sc->core_min_freq)); 1471b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1472b9450e43SRui Paulo bcm2835_cpufreq_set_clock_rate(sc, 1473b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_SDRAM, 1474b9450e43SRui Paulo MHZ2HZ(sc->sdram_min_freq)); 1475b9450e43SRui Paulo DELAY(TRANSITION_LATENCY); 1476b9450e43SRui Paulo } 1477b9450e43SRui Paulo } 1478b9450e43SRui Paulo 1479b9450e43SRui Paulo VC_UNLOCK(sc); 1480b9450e43SRui Paulo 1481b9450e43SRui Paulo if (resp_freq < 0 || arm_freq < 0 || resp_freq != arm_freq) { 1482b9450e43SRui Paulo device_printf(dev, "wrong freq\n"); 1483b9450e43SRui Paulo return (EIO); 1484b9450e43SRui Paulo } 1485b9450e43SRui Paulo DPRINTF("cpufreq: %d -> %d\n", cur_freq, arm_freq); 1486b9450e43SRui Paulo 1487b9450e43SRui Paulo return (0); 1488b9450e43SRui Paulo } 1489b9450e43SRui Paulo 1490b9450e43SRui Paulo static int 1491b9450e43SRui Paulo bcm2835_cpufreq_get(device_t dev, struct cf_setting *cf) 1492b9450e43SRui Paulo { 1493b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1494b9450e43SRui Paulo int arm_freq; 1495b9450e43SRui Paulo 1496b9450e43SRui Paulo if (cf == NULL) 1497b9450e43SRui Paulo return (EINVAL); 1498b9450e43SRui Paulo 1499b9450e43SRui Paulo sc = device_get_softc(dev); 1500b9450e43SRui Paulo memset(cf, CPUFREQ_VAL_UNKNOWN, sizeof(*cf)); 1501b9450e43SRui Paulo cf->dev = NULL; 1502b9450e43SRui Paulo 1503b9450e43SRui Paulo /* get cuurent value */ 1504b9450e43SRui Paulo VC_LOCK(sc); 1505b9450e43SRui Paulo arm_freq = bcm2835_cpufreq_get_clock_rate(sc, 1506b9450e43SRui Paulo BCM2835_MBOX_CLOCK_ID_ARM); 1507b9450e43SRui Paulo VC_UNLOCK(sc); 1508b9450e43SRui Paulo if (arm_freq < 0) { 1509b9450e43SRui Paulo device_printf(dev, "can't get clock\n"); 1510b9450e43SRui Paulo return (EINVAL); 1511b9450e43SRui Paulo } 1512b9450e43SRui Paulo 1513b9450e43SRui Paulo /* CPU clock in MHz or 100ths of a percent. */ 1514b9450e43SRui Paulo cf->freq = HZ2MHZ(arm_freq); 1515b9450e43SRui Paulo /* Voltage in mV. */ 1516b9450e43SRui Paulo cf->volts = CPUFREQ_VAL_UNKNOWN; 1517b9450e43SRui Paulo /* Power consumed in mW. */ 1518b9450e43SRui Paulo cf->power = CPUFREQ_VAL_UNKNOWN; 1519b9450e43SRui Paulo /* Transition latency in us. */ 1520b9450e43SRui Paulo cf->lat = TRANSITION_LATENCY; 1521b9450e43SRui Paulo /* Driver providing this setting. */ 1522b9450e43SRui Paulo cf->dev = dev; 1523b9450e43SRui Paulo 1524b9450e43SRui Paulo return (0); 1525b9450e43SRui Paulo } 1526b9450e43SRui Paulo 1527b9450e43SRui Paulo static int 1528b9450e43SRui Paulo bcm2835_cpufreq_make_freq_list(device_t dev, struct cf_setting *sets, 1529b9450e43SRui Paulo int *count) 1530b9450e43SRui Paulo { 1531b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1532b9450e43SRui Paulo int freq, min_freq, volts, rem; 1533b9450e43SRui Paulo int idx; 1534b9450e43SRui Paulo 1535b9450e43SRui Paulo sc = device_get_softc(dev); 1536b9450e43SRui Paulo freq = sc->arm_max_freq; 1537b9450e43SRui Paulo min_freq = sc->arm_min_freq; 1538b9450e43SRui Paulo 1539b9450e43SRui Paulo /* adjust head freq to STEP */ 1540b9450e43SRui Paulo rem = freq % MHZSTEP; 1541b9450e43SRui Paulo freq -= rem; 1542b9450e43SRui Paulo if (freq < min_freq) 1543b9450e43SRui Paulo freq = min_freq; 1544b9450e43SRui Paulo 1545b9450e43SRui Paulo /* if non-turbo, add extra low freq */ 1546b9450e43SRui Paulo if (sc->turbo_mode != BCM2835_MBOX_TURBO_ON) 1547b9450e43SRui Paulo if (min_freq > cpufreq_lowest_freq) 1548b9450e43SRui Paulo min_freq = cpufreq_lowest_freq; 1549b9450e43SRui Paulo 1550f1f425aeSOleksandr Tymoshenko #ifdef SOC_BCM2835 1551f1f425aeSOleksandr Tymoshenko /* from freq to min_freq */ 1552f1f425aeSOleksandr Tymoshenko for (idx = 0; idx < *count && freq >= min_freq; idx++) { 1553f1f425aeSOleksandr Tymoshenko if (freq > sc->arm_min_freq) 1554f1f425aeSOleksandr Tymoshenko volts = sc->max_voltage_core; 1555f1f425aeSOleksandr Tymoshenko else 1556f1f425aeSOleksandr Tymoshenko volts = sc->min_voltage_core; 1557f1f425aeSOleksandr Tymoshenko sets[idx].freq = freq; 1558f1f425aeSOleksandr Tymoshenko sets[idx].volts = volts; 1559f1f425aeSOleksandr Tymoshenko sets[idx].lat = TRANSITION_LATENCY; 1560f1f425aeSOleksandr Tymoshenko sets[idx].dev = dev; 1561f1f425aeSOleksandr Tymoshenko freq -= MHZSTEP; 1562f1f425aeSOleksandr Tymoshenko } 1563f1f425aeSOleksandr Tymoshenko #else 156411cede48SLuiz Otavio O Souza /* XXX RPi2 have only 900/600MHz */ 156511cede48SLuiz Otavio O Souza idx = 0; 156611cede48SLuiz Otavio O Souza volts = sc->min_voltage_core; 156711cede48SLuiz Otavio O Souza sets[idx].freq = freq; 156811cede48SLuiz Otavio O Souza sets[idx].volts = volts; 156911cede48SLuiz Otavio O Souza sets[idx].lat = TRANSITION_LATENCY; 157011cede48SLuiz Otavio O Souza sets[idx].dev = dev; 157111cede48SLuiz Otavio O Souza idx++; 157211cede48SLuiz Otavio O Souza if (freq != min_freq) { 157311cede48SLuiz Otavio O Souza sets[idx].freq = min_freq; 157411cede48SLuiz Otavio O Souza sets[idx].volts = volts; 157511cede48SLuiz Otavio O Souza sets[idx].lat = TRANSITION_LATENCY; 157611cede48SLuiz Otavio O Souza sets[idx].dev = dev; 157711cede48SLuiz Otavio O Souza idx++; 157811cede48SLuiz Otavio O Souza } 157911cede48SLuiz Otavio O Souza #endif 158011cede48SLuiz Otavio O Souza *count = idx; 1581b9450e43SRui Paulo 1582b9450e43SRui Paulo return (0); 1583b9450e43SRui Paulo } 1584b9450e43SRui Paulo 1585b9450e43SRui Paulo static int 1586b9450e43SRui Paulo bcm2835_cpufreq_settings(device_t dev, struct cf_setting *sets, int *count) 1587b9450e43SRui Paulo { 1588b9450e43SRui Paulo struct bcm2835_cpufreq_softc *sc; 1589b9450e43SRui Paulo 1590b9450e43SRui Paulo if (sets == NULL || count == NULL) 1591b9450e43SRui Paulo return (EINVAL); 1592b9450e43SRui Paulo 1593b9450e43SRui Paulo sc = device_get_softc(dev); 1594b9450e43SRui Paulo if (sc->arm_min_freq < 0 || sc->arm_max_freq < 0) { 1595b9450e43SRui Paulo printf("device is not configured\n"); 1596b9450e43SRui Paulo return (EINVAL); 1597b9450e43SRui Paulo } 1598b9450e43SRui Paulo 1599b9450e43SRui Paulo /* fill data with unknown value */ 1600b9450e43SRui Paulo memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * (*count)); 1601b9450e43SRui Paulo /* create new array up to count */ 1602b9450e43SRui Paulo bcm2835_cpufreq_make_freq_list(dev, sets, count); 1603b9450e43SRui Paulo 1604b9450e43SRui Paulo return (0); 1605b9450e43SRui Paulo } 1606b9450e43SRui Paulo 1607b9450e43SRui Paulo static int 1608b9450e43SRui Paulo bcm2835_cpufreq_type(device_t dev, int *type) 1609b9450e43SRui Paulo { 1610b9450e43SRui Paulo 1611b9450e43SRui Paulo if (type == NULL) 1612b9450e43SRui Paulo return (EINVAL); 1613b9450e43SRui Paulo *type = CPUFREQ_TYPE_ABSOLUTE; 1614b9450e43SRui Paulo 1615b9450e43SRui Paulo return (0); 1616b9450e43SRui Paulo } 1617b9450e43SRui Paulo 1618b9450e43SRui Paulo static device_method_t bcm2835_cpufreq_methods[] = { 1619b9450e43SRui Paulo /* Device interface */ 1620b9450e43SRui Paulo DEVMETHOD(device_identify, bcm2835_cpufreq_identify), 1621b9450e43SRui Paulo DEVMETHOD(device_probe, bcm2835_cpufreq_probe), 1622b9450e43SRui Paulo DEVMETHOD(device_attach, bcm2835_cpufreq_attach), 1623b9450e43SRui Paulo DEVMETHOD(device_detach, bcm2835_cpufreq_detach), 1624b9450e43SRui Paulo 1625b9450e43SRui Paulo /* cpufreq interface */ 1626b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_set, bcm2835_cpufreq_set), 1627b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_get, bcm2835_cpufreq_get), 1628b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_settings, bcm2835_cpufreq_settings), 1629b9450e43SRui Paulo DEVMETHOD(cpufreq_drv_type, bcm2835_cpufreq_type), 1630b9450e43SRui Paulo 1631b9450e43SRui Paulo DEVMETHOD_END 1632b9450e43SRui Paulo }; 1633b9450e43SRui Paulo 1634b9450e43SRui Paulo static devclass_t bcm2835_cpufreq_devclass; 1635b9450e43SRui Paulo static driver_t bcm2835_cpufreq_driver = { 1636b9450e43SRui Paulo "bcm2835_cpufreq", 1637b9450e43SRui Paulo bcm2835_cpufreq_methods, 1638b9450e43SRui Paulo sizeof(struct bcm2835_cpufreq_softc), 1639b9450e43SRui Paulo }; 1640b9450e43SRui Paulo 1641b9450e43SRui Paulo DRIVER_MODULE(bcm2835_cpufreq, cpu, bcm2835_cpufreq_driver, 1642b9450e43SRui Paulo bcm2835_cpufreq_devclass, 0, 0); 1643