1*246d07a7SWojciech Macek /*- 2*246d07a7SWojciech Macek * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates 3*246d07a7SWojciech Macek * All rights reserved. 4*246d07a7SWojciech Macek * 5*246d07a7SWojciech Macek * Developed by Semihalf. 6*246d07a7SWojciech Macek * 7*246d07a7SWojciech Macek * Redistribution and use in source and binary forms, with or without 8*246d07a7SWojciech Macek * modification, are permitted provided that the following conditions 9*246d07a7SWojciech Macek * are met: 10*246d07a7SWojciech Macek * 1. Redistributions of source code must retain the above copyright 11*246d07a7SWojciech Macek * notice, this list of conditions and the following disclaimer. 12*246d07a7SWojciech Macek * 2. Redistributions in binary form must reproduce the above copyright 13*246d07a7SWojciech Macek * notice, this list of conditions and the following disclaimer in the 14*246d07a7SWojciech Macek * documentation and/or other materials provided with the distribution. 15*246d07a7SWojciech Macek * 16*246d07a7SWojciech Macek * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17*246d07a7SWojciech Macek * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18*246d07a7SWojciech Macek * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19*246d07a7SWojciech Macek * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20*246d07a7SWojciech Macek * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21*246d07a7SWojciech Macek * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22*246d07a7SWojciech Macek * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23*246d07a7SWojciech Macek * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24*246d07a7SWojciech Macek * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25*246d07a7SWojciech Macek * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26*246d07a7SWojciech Macek * SUCH DAMAGE. 27*246d07a7SWojciech Macek */ 28*246d07a7SWojciech Macek 29*246d07a7SWojciech Macek #ifndef __ALPINE_SERDES_H__ 30*246d07a7SWojciech Macek #define __ALPINE_SERDES_H__ 31*246d07a7SWojciech Macek 32*246d07a7SWojciech Macek /* SerDes ETH mode */ 33*246d07a7SWojciech Macek enum alpine_serdes_eth_mode { 34*246d07a7SWojciech Macek ALPINE_SERDES_ETH_MODE_SGMII, 35*246d07a7SWojciech Macek ALPINE_SERDES_ETH_MODE_KR, 36*246d07a7SWojciech Macek }; 37*246d07a7SWojciech Macek 38*246d07a7SWojciech Macek /* 39*246d07a7SWojciech Macek * Get SerDes group regs base, to be used in relevant Alpine drivers. 40*246d07a7SWojciech Macek * Valid group is 0..3. 41*246d07a7SWojciech Macek * Returns virtual base address of the group regs base. 42*246d07a7SWojciech Macek */ 43*246d07a7SWojciech Macek void *alpine_serdes_resource_get(uint32_t group); 44*246d07a7SWojciech Macek 45*246d07a7SWojciech Macek /* 46*246d07a7SWojciech Macek * Set SerDes ETH mode for an entire group, unless already set 47*246d07a7SWojciech Macek * Valid group is 0..3. 48*246d07a7SWojciech Macek * Returns 0 upon success. 49*246d07a7SWojciech Macek */ 50*246d07a7SWojciech Macek int alpine_serdes_eth_mode_set(uint32_t group, 51*246d07a7SWojciech Macek enum alpine_serdes_eth_mode mode); 52*246d07a7SWojciech Macek 53*246d07a7SWojciech Macek /* Lock the all serdes group for using common registers */ 54*246d07a7SWojciech Macek void alpine_serdes_eth_group_lock(uint32_t group); 55*246d07a7SWojciech Macek 56*246d07a7SWojciech Macek /* Unlock the all serdes group for using common registers */ 57*246d07a7SWojciech Macek void alpine_serdes_eth_group_unlock(uint32_t group); 58*246d07a7SWojciech Macek 59*246d07a7SWojciech Macek #endif /* __ALPINE_SERDES_H__ */ 60