1 /*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * Copyright (c) 2015 Semihalf 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bus.h> 34 #include <sys/lock.h> 35 #include <sys/mutex.h> 36 #include <sys/smp.h> 37 #include <sys/cpuset.h> 38 39 #include <vm/vm.h> 40 #include <vm/pmap.h> 41 42 #include <machine/smp.h> 43 #include <machine/fdt.h> 44 #include <machine/intr.h> 45 #include <machine/cpu-v6.h> 46 47 #include <dev/fdt/fdt_common.h> 48 #include <dev/ofw/ofw_cpu.h> 49 #include <dev/ofw/ofw_bus_subr.h> 50 51 #define AL_CPU_RESUME_WATERMARK_REG 0x00 52 #define AL_CPU_RESUME_FLAGS_REG 0x04 53 #define AL_CPU_RESUME_PCPU_RADDR_REG(cpu) (0x08 + 0x04 + 8*(cpu)) 54 #define AL_CPU_RESUME_PCPU_FLAGS(cpu) (0x08 + 8*(cpu)) 55 56 /* Per-CPU flags */ 57 #define AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME (1 << 2) 58 59 /* The expected magic number for validating the resume addresses */ 60 #define AL_CPU_RESUME_MAGIC_NUM 0xf0e1d200 61 #define AL_CPU_RESUME_MAGIC_NUM_MASK 0xffffff00 62 63 /* The expected minimal version number for validating the capabilities */ 64 #define AL_CPU_RESUME_MIN_VER 0x000000c3 65 #define AL_CPU_RESUME_MIN_VER_MASK 0x000000ff 66 67 /* Field controlling the boot-up of companion cores */ 68 #define AL_NB_INIT_CONTROL (0x8) 69 #define AL_NB_CONFIG_STATUS_PWR_CTRL(cpu) (0x2020 + (cpu)*0x100) 70 71 #define SERDES_NUM_GROUPS 4 72 #define SERDES_GROUP_SIZE 0x400 73 74 extern bus_addr_t al_devmap_pa; 75 extern bus_addr_t al_devmap_size; 76 77 extern void mpentry(void); 78 79 int alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, 80 bus_addr_t *baddr); 81 static int platform_mp_get_core_cnt(void); 82 static int alpine_get_cpu_resume_base(u_long *pbase, u_long *psize); 83 static int alpine_get_nb_base(u_long *pbase, u_long *psize); 84 static int alpine_get_serdes_base(u_long *pbase, u_long *psize); 85 int alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, 86 bus_addr_t *baddr); 87 static boolean_t alpine_validate_cpu(u_int, phandle_t, u_int, pcell_t *); 88 89 static boolean_t 90 alpine_validate_cpu(u_int id, phandle_t child, u_int addr_cell, pcell_t *reg) 91 { 92 return fdt_is_compatible(child, "arm,cortex-a15"); 93 } 94 95 static int 96 platform_mp_get_core_cnt(void) 97 { 98 static int ncores = 0; 99 int nchilds; 100 uint32_t reg; 101 102 /* Calculate ncores value only once */ 103 if (ncores) 104 return (ncores); 105 106 reg = cp15_l2ctlr_get(); 107 ncores = CPUV7_L2CTLR_NPROC(reg); 108 109 nchilds = ofw_cpu_early_foreach(alpine_validate_cpu, false); 110 111 /* Limit CPUs if DTS has configured less than available */ 112 if ((nchilds > 0) && (nchilds < ncores)) { 113 printf("SMP: limiting number of active CPUs to %d out of %d\n", 114 nchilds, ncores); 115 ncores = nchilds; 116 } 117 118 return (ncores); 119 } 120 121 void 122 platform_mp_setmaxid(void) 123 { 124 125 mp_ncpus = platform_mp_get_core_cnt(); 126 mp_maxid = mp_ncpus - 1; 127 } 128 129 static int 130 alpine_get_cpu_resume_base(u_long *pbase, u_long *psize) 131 { 132 phandle_t node; 133 u_long base = 0; 134 u_long size = 0; 135 136 if (pbase == NULL || psize == NULL) 137 return (EINVAL); 138 139 if ((node = OF_finddevice("/")) == -1) 140 return (EFAULT); 141 142 if ((node = 143 ofw_bus_find_compatible(node, "annapurna-labs,al-cpu-resume")) == 0) 144 return (EFAULT); 145 146 if (fdt_regsize(node, &base, &size)) 147 return (EFAULT); 148 149 *pbase = base; 150 *psize = size; 151 152 return (0); 153 } 154 155 static int 156 alpine_get_nb_base(u_long *pbase, u_long *psize) 157 { 158 phandle_t node; 159 u_long base = 0; 160 u_long size = 0; 161 162 if (pbase == NULL || psize == NULL) 163 return (EINVAL); 164 165 if ((node = OF_finddevice("/")) == -1) 166 return (EFAULT); 167 168 if ((node = 169 ofw_bus_find_compatible(node, "annapurna-labs,al-nb-service")) == 0) 170 return (EFAULT); 171 172 if (fdt_regsize(node, &base, &size)) 173 return (EFAULT); 174 175 *pbase = base; 176 *psize = size; 177 178 return (0); 179 } 180 181 void 182 platform_mp_start_ap(void) 183 { 184 uint32_t physaddr; 185 vm_offset_t vaddr; 186 uint32_t val; 187 uint32_t start_mask; 188 u_long cpu_resume_base; 189 u_long nb_base; 190 u_long cpu_resume_size; 191 u_long nb_size; 192 bus_addr_t cpu_resume_baddr; 193 bus_addr_t nb_baddr; 194 int a; 195 196 if (alpine_get_cpu_resume_base(&cpu_resume_base, &cpu_resume_size)) 197 panic("Couldn't resolve cpu_resume_base address\n"); 198 199 if (alpine_get_nb_base(&nb_base, &nb_size)) 200 panic("Couldn't resolve_nb_base address\n"); 201 202 /* Proceed with start addresses for additional CPUs */ 203 if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + cpu_resume_base, 204 cpu_resume_size, 0, &cpu_resume_baddr)) 205 panic("Couldn't map CPU-resume area"); 206 if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + nb_base, 207 nb_size, 0, &nb_baddr)) 208 panic("Couldn't map NB-service area"); 209 210 /* Proceed with start addresses for additional CPUs */ 211 val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr, 212 AL_CPU_RESUME_WATERMARK_REG); 213 if (((val & AL_CPU_RESUME_MAGIC_NUM_MASK) != AL_CPU_RESUME_MAGIC_NUM) || 214 ((val & AL_CPU_RESUME_MIN_VER_MASK) < AL_CPU_RESUME_MIN_VER)) { 215 panic("CPU-resume device is not compatible"); 216 } 217 218 vaddr = (vm_offset_t)mpentry; 219 physaddr = pmap_kextract(vaddr); 220 221 for (a = 1; a < platform_mp_get_core_cnt(); a++) { 222 /* Power up the core */ 223 bus_space_write_4(fdtbus_bs_tag, nb_baddr, 224 AL_NB_CONFIG_STATUS_PWR_CTRL(a), 0); 225 mb(); 226 227 /* Enable resume */ 228 val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr, 229 AL_CPU_RESUME_PCPU_FLAGS(a)); 230 val &= ~AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME; 231 bus_space_write_4(fdtbus_bs_tag, cpu_resume_baddr, 232 AL_CPU_RESUME_PCPU_FLAGS(a), val); 233 mb(); 234 235 /* Set resume physical address */ 236 bus_space_write_4(fdtbus_bs_tag, cpu_resume_baddr, 237 AL_CPU_RESUME_PCPU_RADDR_REG(a), physaddr); 238 mb(); 239 } 240 241 /* Release cores from reset */ 242 if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + nb_base, 243 nb_size, 0, &nb_baddr)) 244 panic("Couldn't map NB-service area"); 245 246 start_mask = (1 << platform_mp_get_core_cnt()) - 1; 247 248 /* Release cores from reset */ 249 val = bus_space_read_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL); 250 val |= start_mask; 251 bus_space_write_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL, val); 252 dsb(); 253 254 bus_space_unmap(fdtbus_bs_tag, nb_baddr, nb_size); 255 bus_space_unmap(fdtbus_bs_tag, cpu_resume_baddr, cpu_resume_size); 256 } 257 258 static int 259 alpine_get_serdes_base(u_long *pbase, u_long *psize) 260 { 261 phandle_t node; 262 u_long base = 0; 263 u_long size = 0; 264 265 if (pbase == NULL || psize == NULL) 266 return (EINVAL); 267 268 if ((node = OF_finddevice("/")) == -1) 269 return (EFAULT); 270 271 if ((node = 272 ofw_bus_find_compatible(node, "annapurna-labs,al-serdes")) == 0) 273 return (EFAULT); 274 275 if (fdt_regsize(node, &base, &size)) 276 return (EFAULT); 277 278 *pbase = base; 279 *psize = size; 280 281 return (0); 282 } 283 284 int 285 alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, bus_addr_t *baddr) 286 { 287 u_long serdes_base, serdes_size; 288 int ret; 289 static bus_addr_t baddr_mapped[SERDES_NUM_GROUPS]; 290 291 if (group >= SERDES_NUM_GROUPS) 292 return (EINVAL); 293 294 if (baddr_mapped[group]) { 295 *tag = fdtbus_bs_tag; 296 *baddr = baddr_mapped[group]; 297 return (0); 298 } 299 300 ret = alpine_get_serdes_base(&serdes_base, &serdes_size); 301 if (ret) 302 return (ret); 303 304 ret = bus_space_map(fdtbus_bs_tag, 305 al_devmap_pa + serdes_base + group * SERDES_GROUP_SIZE, 306 (SERDES_NUM_GROUPS - group) * SERDES_GROUP_SIZE, 0, baddr); 307 if (ret) 308 return (ret); 309 310 baddr_mapped[group] = *baddr; 311 312 return (0); 313 } 314