1*501ce0d8SAndrew Turner#- 2*501ce0d8SAndrew Turner# Copyright (c) 2016 Jared D. McNeill <jmcneill@invisible.ca> 3*501ce0d8SAndrew Turner# All rights reserved. 4*501ce0d8SAndrew Turner# 5*501ce0d8SAndrew Turner# Redistribution and use in source and binary forms, with or without 6*501ce0d8SAndrew Turner# modification, are permitted provided that the following conditions 7*501ce0d8SAndrew Turner# are met: 8*501ce0d8SAndrew Turner# 1. Redistributions of source code must retain the above copyright 9*501ce0d8SAndrew Turner# notice, this list of conditions and the following disclaimer. 10*501ce0d8SAndrew Turner# 2. Redistributions in binary form must reproduce the above copyright 11*501ce0d8SAndrew Turner# notice, this list of conditions and the following disclaimer in the 12*501ce0d8SAndrew Turner# documentation and/or other materials provided with the distribution. 13*501ce0d8SAndrew Turner# 14*501ce0d8SAndrew Turner# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15*501ce0d8SAndrew Turner# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*501ce0d8SAndrew Turner# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*501ce0d8SAndrew Turner# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18*501ce0d8SAndrew Turner# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19*501ce0d8SAndrew Turner# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20*501ce0d8SAndrew Turner# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21*501ce0d8SAndrew Turner# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22*501ce0d8SAndrew Turner# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*501ce0d8SAndrew Turner# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*501ce0d8SAndrew Turner# SUCH DAMAGE. 25*501ce0d8SAndrew Turner# 26*501ce0d8SAndrew Turner# 27*501ce0d8SAndrew Turner 28*501ce0d8SAndrew Turner#include <sys/bus.h> 29*501ce0d8SAndrew Turner 30*501ce0d8SAndrew TurnerINTERFACE sunxi_dma; 31*501ce0d8SAndrew Turner 32*501ce0d8SAndrew TurnerHEADER { 33*501ce0d8SAndrew Turner #include <machine/bus.h> 34*501ce0d8SAndrew Turner 35*501ce0d8SAndrew Turner struct sunxi_dma_config { 36*501ce0d8SAndrew Turner unsigned int dst_width; 37*501ce0d8SAndrew Turner unsigned int dst_burst_len; 38*501ce0d8SAndrew Turner unsigned int dst_drqtype; 39*501ce0d8SAndrew Turner bool dst_noincr; 40*501ce0d8SAndrew Turner unsigned int dst_blksize; /* DDMA-only */ 41*501ce0d8SAndrew Turner unsigned int dst_wait_cyc; /* DDMA-only */ 42*501ce0d8SAndrew Turner unsigned int src_width; 43*501ce0d8SAndrew Turner unsigned int src_burst_len; 44*501ce0d8SAndrew Turner unsigned int src_drqtype; 45*501ce0d8SAndrew Turner bool src_noincr; 46*501ce0d8SAndrew Turner unsigned int src_blksize; /* DDMA-only */ 47*501ce0d8SAndrew Turner unsigned int src_wait_cyc; /* DDMA-only */ 48*501ce0d8SAndrew Turner }; 49*501ce0d8SAndrew Turner 50*501ce0d8SAndrew Turner typedef void (*sunxi_dma_callback)(void *); 51*501ce0d8SAndrew Turner} 52*501ce0d8SAndrew Turner 53*501ce0d8SAndrew Turner# 54*501ce0d8SAndrew Turner# Allocate DMA channel 55*501ce0d8SAndrew Turner# 56*501ce0d8SAndrew TurnerMETHOD void * alloc { 57*501ce0d8SAndrew Turner device_t dev; 58*501ce0d8SAndrew Turner bool dedicated; 59*501ce0d8SAndrew Turner sunxi_dma_callback callback; 60*501ce0d8SAndrew Turner void *callback_arg; 61*501ce0d8SAndrew Turner}; 62*501ce0d8SAndrew Turner 63*501ce0d8SAndrew Turner# 64*501ce0d8SAndrew Turner# Free DMA channel 65*501ce0d8SAndrew Turner# 66*501ce0d8SAndrew TurnerMETHOD void free { 67*501ce0d8SAndrew Turner device_t dev; 68*501ce0d8SAndrew Turner void *dmachan; 69*501ce0d8SAndrew Turner}; 70*501ce0d8SAndrew Turner 71*501ce0d8SAndrew Turner# 72*501ce0d8SAndrew Turner# Set DMA channel configuration 73*501ce0d8SAndrew Turner# 74*501ce0d8SAndrew TurnerMETHOD int set_config { 75*501ce0d8SAndrew Turner device_t dev; 76*501ce0d8SAndrew Turner void *dmachan; 77*501ce0d8SAndrew Turner const struct sunxi_dma_config *cfg; 78*501ce0d8SAndrew Turner}; 79*501ce0d8SAndrew Turner 80*501ce0d8SAndrew Turner# 81*501ce0d8SAndrew Turner# Start DMA channel transfer 82*501ce0d8SAndrew Turner# 83*501ce0d8SAndrew TurnerMETHOD int transfer { 84*501ce0d8SAndrew Turner device_t dev; 85*501ce0d8SAndrew Turner void *dmachan; 86*501ce0d8SAndrew Turner bus_addr_t src; 87*501ce0d8SAndrew Turner bus_addr_t dst; 88*501ce0d8SAndrew Turner size_t nbytes; 89*501ce0d8SAndrew Turner}; 90*501ce0d8SAndrew Turner 91*501ce0d8SAndrew Turner# 92*501ce0d8SAndrew Turner# Halt DMA channel transfer 93*501ce0d8SAndrew Turner# 94*501ce0d8SAndrew TurnerMETHOD void halt { 95*501ce0d8SAndrew Turner device_t dev; 96*501ce0d8SAndrew Turner void *dmachan; 97*501ce0d8SAndrew Turner}; 98