1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/eventhandler.h> 40 #include <sys/bus.h> 41 #include <sys/rman.h> 42 #include <sys/kernel.h> 43 #include <sys/reboot.h> 44 #include <sys/gpio.h> 45 #include <sys/module.h> 46 #include <machine/bus.h> 47 48 #include <dev/iicbus/iicbus.h> 49 #include <dev/iicbus/iiconf.h> 50 51 #include <dev/gpio/gpiobusvar.h> 52 53 #include <dev/ofw/ofw_bus.h> 54 #include <dev/ofw/ofw_bus_subr.h> 55 56 #include <dev/extres/regulator/regulator.h> 57 58 #include "gpio_if.h" 59 #include "iicbus_if.h" 60 #include "regdev_if.h" 61 62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 63 64 #define AXP_POWERSRC 0x00 65 #define AXP_POWERSRC_ACIN (1 << 7) 66 #define AXP_POWERSRC_VBUS (1 << 5) 67 #define AXP_POWERSRC_VBAT (1 << 3) 68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 69 #define AXP_POWERSRC_SHORTED (1 << 1) 70 #define AXP_POWERSRC_STARTUP (1 << 0) 71 #define AXP_POWERMODE 0x01 72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 74 #define AXP_POWERMODE_BAT_VALID (1 << 4) 75 #define AXP_ICTYPE 0x03 76 #define AXP_POWERCTL1 0x10 77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 78 #define AXP_POWERCTL1_DCDC6 (1 << 5) 79 #define AXP_POWERCTL1_DCDC5 (1 << 4) 80 #define AXP_POWERCTL1_DCDC4 (1 << 3) 81 #define AXP_POWERCTL1_DCDC3 (1 << 2) 82 #define AXP_POWERCTL1_DCDC2 (1 << 1) 83 #define AXP_POWERCTL1_DCDC1 (1 << 0) 84 #define AXP_POWERCTL2 0x12 85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 86 #define AXP_POWERCTL2_DLDO4 (1 << 6) 87 #define AXP_POWERCTL2_DLDO3 (1 << 5) 88 #define AXP_POWERCTL2_DLDO2 (1 << 4) 89 #define AXP_POWERCTL2_DLDO1 (1 << 3) 90 #define AXP_POWERCTL2_ELDO3 (1 << 2) 91 #define AXP_POWERCTL2_ELDO2 (1 << 1) 92 #define AXP_POWERCTL2_ELDO1 (1 << 0) 93 #define AXP_POWERCTL3 0x13 94 #define AXP_POWERCTL3_ALDO3 (1 << 7) 95 #define AXP_POWERCTL3_ALDO2 (1 << 6) 96 #define AXP_POWERCTL3_ALDO1 (1 << 5) 97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 98 #define AXP_POWERCTL3_FLDO2 (1 << 3) 99 #define AXP_POWERCTL3_FLDO1 (1 << 2) 100 #define AXP_VOLTCTL_DLDO1 0x15 101 #define AXP_VOLTCTL_DLDO2 0x16 102 #define AXP_VOLTCTL_DLDO3 0x17 103 #define AXP_VOLTCTL_DLDO4 0x18 104 #define AXP_VOLTCTL_ELDO1 0x19 105 #define AXP_VOLTCTL_ELDO2 0x1A 106 #define AXP_VOLTCTL_ELDO3 0x1B 107 #define AXP_VOLTCTL_FLDO1 0x1C 108 #define AXP_VOLTCTL_FLDO2 0x1D 109 #define AXP_VOLTCTL_DCDC1 0x20 110 #define AXP_VOLTCTL_DCDC2 0x21 111 #define AXP_VOLTCTL_DCDC3 0x22 112 #define AXP_VOLTCTL_DCDC4 0x23 113 #define AXP_VOLTCTL_DCDC5 0x24 114 #define AXP_VOLTCTL_DCDC6 0x25 115 #define AXP_VOLTCTL_DCDC7 0x26 116 #define AXP_VOLTCTL_ALDO1 0x28 117 #define AXP_VOLTCTL_ALDO2 0x29 118 #define AXP_VOLTCTL_ALDO3 0x2A 119 #define AXP_VOLTCTL_STATUS (1 << 7) 120 #define AXP_VOLTCTL_MASK 0x7f 121 #define AXP_POWERBAT 0x32 122 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 123 #define AXP_CHARGERCTL1 0x33 124 #define AXP_CHARGERCTL1_MIN 0 125 #define AXP_CHARGERCTL1_MAX 13 126 #define AXP_CHARGERCTL1_CMASK 0xf 127 #define AXP_IRQEN1 0x40 128 #define AXP_IRQEN1_ACIN_HI (1 << 6) 129 #define AXP_IRQEN1_ACIN_LO (1 << 5) 130 #define AXP_IRQEN1_VBUS_HI (1 << 3) 131 #define AXP_IRQEN1_VBUS_LO (1 << 2) 132 #define AXP_IRQEN2 0x41 133 #define AXP_IRQEN2_BAT_IN (1 << 7) 134 #define AXP_IRQEN2_BAT_NO (1 << 6) 135 #define AXP_IRQEN2_BATCHGC (1 << 3) 136 #define AXP_IRQEN2_BATCHGD (1 << 2) 137 #define AXP_IRQEN3 0x42 138 #define AXP_IRQEN4 0x43 139 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 140 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 141 #define AXP_IRQEN5 0x44 142 #define AXP_IRQEN5_POKSIRQ (1 << 4) 143 #define AXP_IRQEN5_POKLIRQ (1 << 3) 144 #define AXP_IRQEN6 0x45 145 #define AXP_IRQSTAT1 0x48 146 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 147 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 148 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 149 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 150 #define AXP_IRQSTAT2 0x49 151 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 152 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 153 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 154 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 155 #define AXP_IRQSTAT3 0x4a 156 #define AXP_IRQSTAT4 0x4b 157 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 158 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 159 #define AXP_IRQSTAT5 0x4c 160 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 161 #define AXP_IRQEN5_POKLIRQ (1 << 3) 162 #define AXP_IRQSTAT6 0x4d 163 #define AXP_BATSENSE_HI 0x78 164 #define AXP_BATSENSE_LO 0x79 165 #define AXP_BATCHG_HI 0x7a 166 #define AXP_BATCHG_LO 0x7b 167 #define AXP_BATDISCHG_HI 0x7c 168 #define AXP_BATDISCHG_LO 0x7d 169 #define AXP_GPIO0_CTRL 0x90 170 #define AXP_GPIO0LDO_CTRL 0x91 171 #define AXP_GPIO1_CTRL 0x92 172 #define AXP_GPIO1LDO_CTRL 0x93 173 #define AXP_GPIO_FUNC (0x7 << 0) 174 #define AXP_GPIO_FUNC_SHIFT 0 175 #define AXP_GPIO_FUNC_DRVLO 0 176 #define AXP_GPIO_FUNC_DRVHI 1 177 #define AXP_GPIO_FUNC_INPUT 2 178 #define AXP_GPIO_FUNC_LDO_ON 3 179 #define AXP_GPIO_FUNC_LDO_OFF 4 180 #define AXP_GPIO_SIGBIT 0x94 181 #define AXP_GPIO_PD 0x97 182 #define AXP_FUEL_GAUGECTL 0xb8 183 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 184 185 #define AXP_BAT_CAP 0xb9 186 #define AXP_BAT_CAP_VALID (1 << 7) 187 #define AXP_BAT_CAP_PERCENT 0x7f 188 189 #define AXP_BAT_MAX_CAP_HI 0xe0 190 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 191 #define AXP_BAT_MAX_CAP_LO 0xe1 192 193 #define AXP_BAT_COULOMB_HI 0xe2 194 #define AXP_BAT_COULOMB_VALID (1 << 7) 195 #define AXP_BAT_COULOMB_LO 0xe3 196 197 #define AXP_BAT_CAP_WARN 0xe6 198 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 199 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */ 200 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 201 202 /* Sensor conversion macros */ 203 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 204 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 205 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 206 207 static const struct { 208 const char *name; 209 uint8_t ctrl_reg; 210 } axp8xx_pins[] = { 211 { "GPIO0", AXP_GPIO0_CTRL }, 212 { "GPIO1", AXP_GPIO1_CTRL }, 213 }; 214 215 enum AXP8XX_TYPE { 216 AXP803 = 1, 217 AXP813, 218 }; 219 220 static struct ofw_compat_data compat_data[] = { 221 { "x-powers,axp803", AXP803 }, 222 { "x-powers,axp813", AXP813 }, 223 { "x-powers,axp818", AXP813 }, 224 { NULL, 0 } 225 }; 226 227 static struct resource_spec axp8xx_spec[] = { 228 { SYS_RES_IRQ, 0, RF_ACTIVE }, 229 { -1, 0 } 230 }; 231 232 struct axp8xx_regdef { 233 intptr_t id; 234 char *name; 235 char *supply_name; 236 uint8_t enable_reg; 237 uint8_t enable_mask; 238 uint8_t enable_value; 239 uint8_t disable_value; 240 uint8_t voltage_reg; 241 int voltage_min; 242 int voltage_max; 243 int voltage_step1; 244 int voltage_nstep1; 245 int voltage_step2; 246 int voltage_nstep2; 247 }; 248 249 enum axp8xx_reg_id { 250 AXP8XX_REG_ID_DCDC1 = 100, 251 AXP8XX_REG_ID_DCDC2, 252 AXP8XX_REG_ID_DCDC3, 253 AXP8XX_REG_ID_DCDC4, 254 AXP8XX_REG_ID_DCDC5, 255 AXP8XX_REG_ID_DCDC6, 256 AXP813_REG_ID_DCDC7, 257 AXP803_REG_ID_DC1SW, 258 AXP8XX_REG_ID_DLDO1, 259 AXP8XX_REG_ID_DLDO2, 260 AXP8XX_REG_ID_DLDO3, 261 AXP8XX_REG_ID_DLDO4, 262 AXP8XX_REG_ID_ELDO1, 263 AXP8XX_REG_ID_ELDO2, 264 AXP8XX_REG_ID_ELDO3, 265 AXP8XX_REG_ID_ALDO1, 266 AXP8XX_REG_ID_ALDO2, 267 AXP8XX_REG_ID_ALDO3, 268 AXP8XX_REG_ID_FLDO1, 269 AXP8XX_REG_ID_FLDO2, 270 AXP813_REG_ID_FLDO3, 271 AXP8XX_REG_ID_GPIO0_LDO, 272 AXP8XX_REG_ID_GPIO1_LDO, 273 }; 274 275 static struct axp8xx_regdef axp803_regdefs[] = { 276 { 277 .id = AXP803_REG_ID_DC1SW, 278 .name = "dc1sw", 279 .enable_reg = AXP_POWERCTL2, 280 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 281 .enable_value = AXP_POWERCTL2_DC1SW, 282 }, 283 }; 284 285 static struct axp8xx_regdef axp813_regdefs[] = { 286 { 287 .id = AXP813_REG_ID_DCDC7, 288 .name = "dcdc7", 289 .enable_reg = AXP_POWERCTL1, 290 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 291 .enable_value = AXP_POWERCTL1_DCDC7, 292 .voltage_reg = AXP_VOLTCTL_DCDC7, 293 .voltage_min = 600, 294 .voltage_max = 1520, 295 .voltage_step1 = 10, 296 .voltage_nstep1 = 50, 297 .voltage_step2 = 20, 298 .voltage_nstep2 = 21, 299 }, 300 }; 301 302 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 303 { 304 .id = AXP8XX_REG_ID_DCDC1, 305 .name = "dcdc1", 306 .enable_reg = AXP_POWERCTL1, 307 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 308 .enable_value = AXP_POWERCTL1_DCDC1, 309 .voltage_reg = AXP_VOLTCTL_DCDC1, 310 .voltage_min = 1600, 311 .voltage_max = 3400, 312 .voltage_step1 = 100, 313 .voltage_nstep1 = 18, 314 }, 315 { 316 .id = AXP8XX_REG_ID_DCDC2, 317 .name = "dcdc2", 318 .enable_reg = AXP_POWERCTL1, 319 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 320 .enable_value = AXP_POWERCTL1_DCDC2, 321 .voltage_reg = AXP_VOLTCTL_DCDC2, 322 .voltage_min = 500, 323 .voltage_max = 1300, 324 .voltage_step1 = 10, 325 .voltage_nstep1 = 70, 326 .voltage_step2 = 20, 327 .voltage_nstep2 = 5, 328 }, 329 { 330 .id = AXP8XX_REG_ID_DCDC3, 331 .name = "dcdc3", 332 .enable_reg = AXP_POWERCTL1, 333 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 334 .enable_value = AXP_POWERCTL1_DCDC3, 335 .voltage_reg = AXP_VOLTCTL_DCDC3, 336 .voltage_min = 500, 337 .voltage_max = 1300, 338 .voltage_step1 = 10, 339 .voltage_nstep1 = 70, 340 .voltage_step2 = 20, 341 .voltage_nstep2 = 5, 342 }, 343 { 344 .id = AXP8XX_REG_ID_DCDC4, 345 .name = "dcdc4", 346 .enable_reg = AXP_POWERCTL1, 347 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 348 .enable_value = AXP_POWERCTL1_DCDC4, 349 .voltage_reg = AXP_VOLTCTL_DCDC4, 350 .voltage_min = 500, 351 .voltage_max = 1300, 352 .voltage_step1 = 10, 353 .voltage_nstep1 = 70, 354 .voltage_step2 = 20, 355 .voltage_nstep2 = 5, 356 }, 357 { 358 .id = AXP8XX_REG_ID_DCDC5, 359 .name = "dcdc5", 360 .enable_reg = AXP_POWERCTL1, 361 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 362 .enable_value = AXP_POWERCTL1_DCDC5, 363 .voltage_reg = AXP_VOLTCTL_DCDC5, 364 .voltage_min = 800, 365 .voltage_max = 1840, 366 .voltage_step1 = 10, 367 .voltage_nstep1 = 42, 368 .voltage_step2 = 20, 369 .voltage_nstep2 = 36, 370 }, 371 { 372 .id = AXP8XX_REG_ID_DCDC6, 373 .name = "dcdc6", 374 .enable_reg = AXP_POWERCTL1, 375 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 376 .enable_value = AXP_POWERCTL1_DCDC6, 377 .voltage_reg = AXP_VOLTCTL_DCDC6, 378 .voltage_min = 600, 379 .voltage_max = 1520, 380 .voltage_step1 = 10, 381 .voltage_nstep1 = 50, 382 .voltage_step2 = 20, 383 .voltage_nstep2 = 21, 384 }, 385 { 386 .id = AXP8XX_REG_ID_DLDO1, 387 .name = "dldo1", 388 .enable_reg = AXP_POWERCTL2, 389 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 390 .enable_value = AXP_POWERCTL2_DLDO1, 391 .voltage_reg = AXP_VOLTCTL_DLDO1, 392 .voltage_min = 700, 393 .voltage_max = 3300, 394 .voltage_step1 = 100, 395 .voltage_nstep1 = 26, 396 }, 397 { 398 .id = AXP8XX_REG_ID_DLDO2, 399 .name = "dldo2", 400 .enable_reg = AXP_POWERCTL2, 401 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 402 .enable_value = AXP_POWERCTL2_DLDO2, 403 .voltage_reg = AXP_VOLTCTL_DLDO2, 404 .voltage_min = 700, 405 .voltage_max = 4200, 406 .voltage_step1 = 100, 407 .voltage_nstep1 = 27, 408 .voltage_step2 = 200, 409 .voltage_nstep2 = 4, 410 }, 411 { 412 .id = AXP8XX_REG_ID_DLDO3, 413 .name = "dldo3", 414 .enable_reg = AXP_POWERCTL2, 415 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 416 .enable_value = AXP_POWERCTL2_DLDO3, 417 .voltage_reg = AXP_VOLTCTL_DLDO3, 418 .voltage_min = 700, 419 .voltage_max = 3300, 420 .voltage_step1 = 100, 421 .voltage_nstep1 = 26, 422 }, 423 { 424 .id = AXP8XX_REG_ID_DLDO4, 425 .name = "dldo4", 426 .enable_reg = AXP_POWERCTL2, 427 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 428 .enable_value = AXP_POWERCTL2_DLDO4, 429 .voltage_reg = AXP_VOLTCTL_DLDO4, 430 .voltage_min = 700, 431 .voltage_max = 3300, 432 .voltage_step1 = 100, 433 .voltage_nstep1 = 26, 434 }, 435 { 436 .id = AXP8XX_REG_ID_ALDO1, 437 .name = "aldo1", 438 .enable_reg = AXP_POWERCTL3, 439 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 440 .enable_value = AXP_POWERCTL3_ALDO1, 441 .voltage_min = 700, 442 .voltage_max = 3300, 443 .voltage_step1 = 100, 444 .voltage_nstep1 = 26, 445 }, 446 { 447 .id = AXP8XX_REG_ID_ALDO2, 448 .name = "aldo2", 449 .enable_reg = AXP_POWERCTL3, 450 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 451 .enable_value = AXP_POWERCTL3_ALDO2, 452 .voltage_min = 700, 453 .voltage_max = 3300, 454 .voltage_step1 = 100, 455 .voltage_nstep1 = 26, 456 }, 457 { 458 .id = AXP8XX_REG_ID_ALDO3, 459 .name = "aldo3", 460 .enable_reg = AXP_POWERCTL3, 461 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 462 .enable_value = AXP_POWERCTL3_ALDO3, 463 .voltage_min = 700, 464 .voltage_max = 3300, 465 .voltage_step1 = 100, 466 .voltage_nstep1 = 26, 467 }, 468 { 469 .id = AXP8XX_REG_ID_ELDO1, 470 .name = "eldo1", 471 .enable_reg = AXP_POWERCTL2, 472 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 473 .enable_value = AXP_POWERCTL2_ELDO1, 474 .voltage_min = 700, 475 .voltage_max = 1900, 476 .voltage_step1 = 50, 477 .voltage_nstep1 = 24, 478 }, 479 { 480 .id = AXP8XX_REG_ID_ELDO2, 481 .name = "eldo2", 482 .enable_reg = AXP_POWERCTL2, 483 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 484 .enable_value = AXP_POWERCTL2_ELDO2, 485 .voltage_min = 700, 486 .voltage_max = 1900, 487 .voltage_step1 = 50, 488 .voltage_nstep1 = 24, 489 }, 490 { 491 .id = AXP8XX_REG_ID_ELDO3, 492 .name = "eldo3", 493 .enable_reg = AXP_POWERCTL2, 494 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 495 .enable_value = AXP_POWERCTL2_ELDO3, 496 .voltage_min = 700, 497 .voltage_max = 1900, 498 .voltage_step1 = 50, 499 .voltage_nstep1 = 24, 500 }, 501 { 502 .id = AXP8XX_REG_ID_FLDO1, 503 .name = "fldo1", 504 .enable_reg = AXP_POWERCTL3, 505 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 506 .enable_value = AXP_POWERCTL3_FLDO1, 507 .voltage_min = 700, 508 .voltage_max = 1450, 509 .voltage_step1 = 50, 510 .voltage_nstep1 = 15, 511 }, 512 { 513 .id = AXP8XX_REG_ID_FLDO2, 514 .name = "fldo2", 515 .enable_reg = AXP_POWERCTL3, 516 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 517 .enable_value = AXP_POWERCTL3_FLDO2, 518 .voltage_min = 700, 519 .voltage_max = 1450, 520 .voltage_step1 = 50, 521 .voltage_nstep1 = 15, 522 }, 523 { 524 .id = AXP8XX_REG_ID_GPIO0_LDO, 525 .name = "ldo-io0", 526 .enable_reg = AXP_GPIO0_CTRL, 527 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 528 .enable_value = AXP_GPIO_FUNC_LDO_ON, 529 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 530 .voltage_reg = AXP_GPIO0LDO_CTRL, 531 .voltage_min = 700, 532 .voltage_max = 3300, 533 .voltage_step1 = 100, 534 .voltage_nstep1 = 26, 535 }, 536 { 537 .id = AXP8XX_REG_ID_GPIO1_LDO, 538 .name = "ldo-io1", 539 .enable_reg = AXP_GPIO1_CTRL, 540 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 541 .enable_value = AXP_GPIO_FUNC_LDO_ON, 542 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 543 .voltage_reg = AXP_GPIO1LDO_CTRL, 544 .voltage_min = 700, 545 .voltage_max = 3300, 546 .voltage_step1 = 100, 547 .voltage_nstep1 = 26, 548 }, 549 }; 550 551 enum axp8xx_sensor { 552 AXP_SENSOR_ACIN_PRESENT, 553 AXP_SENSOR_VBUS_PRESENT, 554 AXP_SENSOR_BATT_PRESENT, 555 AXP_SENSOR_BATT_CHARGING, 556 AXP_SENSOR_BATT_CHARGE_STATE, 557 AXP_SENSOR_BATT_VOLTAGE, 558 AXP_SENSOR_BATT_CHARGE_CURRENT, 559 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 560 AXP_SENSOR_BATT_CAPACITY_PERCENT, 561 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 562 AXP_SENSOR_BATT_CURRENT_CAPACITY, 563 }; 564 565 enum battery_capacity_state { 566 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 567 BATT_CAPACITY_WARNING, /* warning cap in battery */ 568 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 569 BATT_CAPACITY_HIGH, /* high cap in battery */ 570 BATT_CAPACITY_MAX, /* maximum cap in battery */ 571 BATT_CAPACITY_LOW /* low cap in battery */ 572 }; 573 574 struct axp8xx_sensors { 575 int id; 576 const char *name; 577 const char *desc; 578 const char *format; 579 }; 580 581 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 582 { 583 .id = AXP_SENSOR_ACIN_PRESENT, 584 .name = "acin", 585 .format = "I", 586 .desc = "ACIN Present", 587 }, 588 { 589 .id = AXP_SENSOR_VBUS_PRESENT, 590 .name = "vbus", 591 .format = "I", 592 .desc = "VBUS Present", 593 }, 594 { 595 .id = AXP_SENSOR_BATT_PRESENT, 596 .name = "bat", 597 .format = "I", 598 .desc = "Battery Present", 599 }, 600 { 601 .id = AXP_SENSOR_BATT_CHARGING, 602 .name = "batcharging", 603 .format = "I", 604 .desc = "Battery Charging", 605 }, 606 { 607 .id = AXP_SENSOR_BATT_CHARGE_STATE, 608 .name = "batchargestate", 609 .format = "I", 610 .desc = "Battery Charge State", 611 }, 612 { 613 .id = AXP_SENSOR_BATT_VOLTAGE, 614 .name = "batvolt", 615 .format = "I", 616 .desc = "Battery Voltage", 617 }, 618 { 619 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 620 .name = "batchargecurrent", 621 .format = "I", 622 .desc = "Average Battery Charging Current", 623 }, 624 { 625 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 626 .name = "batdischargecurrent", 627 .format = "I", 628 .desc = "Average Battery Discharging Current", 629 }, 630 { 631 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 632 .name = "batcapacitypercent", 633 .format = "I", 634 .desc = "Battery Capacity Percentage", 635 }, 636 { 637 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 638 .name = "batmaxcapacity", 639 .format = "I", 640 .desc = "Battery Maximum Capacity", 641 }, 642 { 643 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 644 .name = "batcurrentcapacity", 645 .format = "I", 646 .desc = "Battery Current Capacity", 647 }, 648 }; 649 650 struct axp8xx_config { 651 const char *name; 652 int batsense_step; /* uV */ 653 int charge_step; /* uA */ 654 int discharge_step; /* uA */ 655 int maxcap_step; /* uAh */ 656 int coulomb_step; /* uAh */ 657 }; 658 659 static struct axp8xx_config axp803_config = { 660 .name = "AXP803", 661 .batsense_step = 1100, 662 .charge_step = 1000, 663 .discharge_step = 1000, 664 .maxcap_step = 1456, 665 .coulomb_step = 1456, 666 }; 667 668 struct axp8xx_softc; 669 670 struct axp8xx_reg_sc { 671 struct regnode *regnode; 672 device_t base_dev; 673 struct axp8xx_regdef *def; 674 phandle_t xref; 675 struct regnode_std_param *param; 676 }; 677 678 struct axp8xx_softc { 679 struct resource *res; 680 uint16_t addr; 681 void *ih; 682 device_t gpiodev; 683 struct mtx mtx; 684 int busy; 685 686 int type; 687 688 /* Configs */ 689 const struct axp8xx_config *config; 690 691 /* Sensors */ 692 const struct axp8xx_sensors *sensors; 693 int nsensors; 694 695 /* Regulators */ 696 struct axp8xx_reg_sc **regs; 697 int nregs; 698 699 /* Warning, shutdown thresholds */ 700 int warn_thres; 701 int shut_thres; 702 }; 703 704 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 705 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 706 707 static int 708 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 709 { 710 struct axp8xx_softc *sc; 711 struct iic_msg msg[2]; 712 713 sc = device_get_softc(dev); 714 715 msg[0].slave = sc->addr; 716 msg[0].flags = IIC_M_WR; 717 msg[0].len = 1; 718 msg[0].buf = ® 719 720 msg[1].slave = sc->addr; 721 msg[1].flags = IIC_M_RD; 722 msg[1].len = size; 723 msg[1].buf = data; 724 725 return (iicbus_transfer(dev, msg, 2)); 726 } 727 728 static int 729 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 730 { 731 struct axp8xx_softc *sc; 732 struct iic_msg msg[2]; 733 734 sc = device_get_softc(dev); 735 736 msg[0].slave = sc->addr; 737 msg[0].flags = IIC_M_WR; 738 msg[0].len = 1; 739 msg[0].buf = ® 740 741 msg[1].slave = sc->addr; 742 msg[1].flags = IIC_M_WR; 743 msg[1].len = 1; 744 msg[1].buf = &val; 745 746 return (iicbus_transfer(dev, msg, 2)); 747 } 748 749 static int 750 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 751 { 752 struct axp8xx_reg_sc *sc; 753 uint8_t val; 754 755 sc = regnode_get_softc(regnode); 756 757 if (bootverbose) 758 device_printf(sc->base_dev, "%sable %s (%s)\n", 759 enable ? "En" : "Dis", 760 regnode_get_name(regnode), 761 sc->def->name); 762 763 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 764 val &= ~sc->def->enable_mask; 765 if (enable) 766 val |= sc->def->enable_value; 767 else { 768 if (sc->def->disable_value) 769 val |= sc->def->disable_value; 770 else 771 val &= ~sc->def->enable_value; 772 } 773 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 774 775 *udelay = 0; 776 777 return (0); 778 } 779 780 static void 781 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 782 { 783 if (val < sc->def->voltage_nstep1) 784 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 785 else 786 *uv = sc->def->voltage_min + 787 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 788 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 789 *uv *= 1000; 790 } 791 792 static int 793 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 794 int max_uvolt, uint8_t *val) 795 { 796 uint8_t nval; 797 int nstep, uvolt; 798 799 nval = 0; 800 uvolt = sc->def->voltage_min * 1000; 801 802 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 803 nstep++) { 804 ++nval; 805 uvolt += (sc->def->voltage_step1 * 1000); 806 } 807 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 808 nstep++) { 809 ++nval; 810 uvolt += (sc->def->voltage_step2 * 1000); 811 } 812 if (uvolt > max_uvolt) 813 return (EINVAL); 814 815 *val = nval; 816 return (0); 817 } 818 819 static int 820 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 821 int max_uvolt, int *udelay) 822 { 823 struct axp8xx_reg_sc *sc; 824 uint8_t val; 825 826 sc = regnode_get_softc(regnode); 827 828 if (bootverbose) 829 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 830 regnode_get_name(regnode), 831 sc->def->name, 832 min_uvolt, max_uvolt); 833 834 if (sc->def->voltage_step1 == 0) 835 return (ENXIO); 836 837 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 838 return (ERANGE); 839 840 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 841 842 *udelay = 0; 843 844 return (0); 845 } 846 847 static int 848 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 849 { 850 struct axp8xx_reg_sc *sc; 851 uint8_t val; 852 853 sc = regnode_get_softc(regnode); 854 855 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 856 return (ENXIO); 857 858 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 859 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 860 861 return (0); 862 } 863 864 static regnode_method_t axp8xx_regnode_methods[] = { 865 /* Regulator interface */ 866 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 867 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 868 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 869 REGNODEMETHOD_END 870 }; 871 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 872 sizeof(struct axp8xx_reg_sc), regnode_class); 873 874 static void 875 axp8xx_shutdown(void *devp, int howto) 876 { 877 device_t dev; 878 879 if ((howto & RB_POWEROFF) == 0) 880 return; 881 882 dev = devp; 883 884 if (bootverbose) 885 device_printf(dev, "Shutdown Axp8xx\n"); 886 887 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 888 } 889 890 static int 891 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 892 { 893 device_t dev = arg1; 894 uint8_t data; 895 int val, error; 896 897 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 898 if (error != 0) 899 return (error); 900 901 if (bootverbose) 902 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 903 val = (data & AXP_CHARGERCTL1_CMASK); 904 error = sysctl_handle_int(oidp, &val, 0, req); 905 if (error || !req->newptr) /* error || read request */ 906 return (error); 907 908 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 909 return (EINVAL); 910 911 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 912 axp8xx_write(dev, AXP_CHARGERCTL1, val); 913 914 return (0); 915 } 916 917 static int 918 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 919 { 920 struct axp8xx_softc *sc; 921 device_t dev = arg1; 922 enum axp8xx_sensor sensor = arg2; 923 const struct axp8xx_config *c; 924 uint8_t data; 925 int val, i, found, batt_val; 926 uint8_t lo, hi; 927 928 sc = device_get_softc(dev); 929 c = sc->config; 930 931 for (found = 0, i = 0; i < sc->nsensors; i++) { 932 if (sc->sensors[i].id == sensor) { 933 found = 1; 934 break; 935 } 936 } 937 938 if (found == 0) 939 return (ENOENT); 940 941 switch (sensor) { 942 case AXP_SENSOR_ACIN_PRESENT: 943 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 944 val = !!(data & AXP_POWERSRC_ACIN); 945 break; 946 case AXP_SENSOR_VBUS_PRESENT: 947 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 948 val = !!(data & AXP_POWERSRC_VBUS); 949 break; 950 case AXP_SENSOR_BATT_PRESENT: 951 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 952 if (data & AXP_POWERMODE_BAT_VALID) 953 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 954 } 955 break; 956 case AXP_SENSOR_BATT_CHARGING: 957 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 958 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 959 break; 960 case AXP_SENSOR_BATT_CHARGE_STATE: 961 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 962 (data & AXP_BAT_CAP_VALID) != 0) { 963 batt_val = (data & AXP_BAT_CAP_PERCENT); 964 if (batt_val <= sc->shut_thres) 965 val = BATT_CAPACITY_CRITICAL; 966 else if (batt_val <= sc->warn_thres) 967 val = BATT_CAPACITY_WARNING; 968 else 969 val = BATT_CAPACITY_NORMAL; 970 } 971 break; 972 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 973 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 974 (data & AXP_BAT_CAP_VALID) != 0) 975 val = (data & AXP_BAT_CAP_PERCENT); 976 break; 977 case AXP_SENSOR_BATT_VOLTAGE: 978 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 979 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 980 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 981 val *= c->batsense_step; 982 } 983 break; 984 case AXP_SENSOR_BATT_CHARGE_CURRENT: 985 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 986 (data & AXP_POWERSRC_CHARING) != 0 && 987 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 988 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 989 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 990 val *= c->charge_step; 991 } 992 break; 993 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 994 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 995 (data & AXP_POWERSRC_CHARING) == 0 && 996 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 997 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 998 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 999 val *= c->discharge_step; 1000 } 1001 break; 1002 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1003 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1004 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1005 val = AXP_SENSOR_COULOMB(hi, lo); 1006 val *= c->maxcap_step; 1007 } 1008 break; 1009 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1010 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1011 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1012 val = AXP_SENSOR_COULOMB(hi, lo); 1013 val *= c->coulomb_step; 1014 } 1015 break; 1016 } 1017 1018 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1019 } 1020 1021 static void 1022 axp8xx_intr(void *arg) 1023 { 1024 device_t dev; 1025 uint8_t val; 1026 int error; 1027 1028 dev = arg; 1029 1030 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1031 if (error != 0) 1032 return; 1033 1034 if (val) { 1035 if (bootverbose) 1036 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1037 if (val & AXP_IRQSTAT1_ACIN_HI) 1038 devctl_notify("PMU", "AC", "plugged", NULL); 1039 if (val & AXP_IRQSTAT1_ACIN_LO) 1040 devctl_notify("PMU", "AC", "unplugged", NULL); 1041 if (val & AXP_IRQSTAT1_VBUS_HI) 1042 devctl_notify("PMU", "USB", "plugged", NULL); 1043 if (val & AXP_IRQSTAT1_VBUS_LO) 1044 devctl_notify("PMU", "USB", "unplugged", NULL); 1045 /* Acknowledge */ 1046 axp8xx_write(dev, AXP_IRQSTAT1, val); 1047 } 1048 1049 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1050 if (error != 0) 1051 return; 1052 1053 if (val) { 1054 if (bootverbose) 1055 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1056 if (val & AXP_IRQSTAT2_BATCHGD) 1057 devctl_notify("PMU", "Battery", "charged", NULL); 1058 if (val & AXP_IRQSTAT2_BATCHGC) 1059 devctl_notify("PMU", "Battery", "charging", NULL); 1060 if (val & AXP_IRQSTAT2_BAT_NO) 1061 devctl_notify("PMU", "Battery", "absent", NULL); 1062 if (val & AXP_IRQSTAT2_BAT_IN) 1063 devctl_notify("PMU", "Battery", "plugged", NULL); 1064 /* Acknowledge */ 1065 axp8xx_write(dev, AXP_IRQSTAT2, val); 1066 } 1067 1068 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1069 if (error != 0) 1070 return; 1071 1072 if (val) { 1073 /* Acknowledge */ 1074 axp8xx_write(dev, AXP_IRQSTAT3, val); 1075 } 1076 1077 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1078 if (error != 0) 1079 return; 1080 1081 if (val) { 1082 if (bootverbose) 1083 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1084 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1085 devctl_notify("PMU", "Battery", "shutdown threshold", NULL); 1086 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1087 devctl_notify("PMU", "Battery", "warning threshold", NULL); 1088 /* Acknowledge */ 1089 axp8xx_write(dev, AXP_IRQSTAT4, val); 1090 } 1091 1092 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1093 if (error != 0) 1094 return; 1095 1096 if (val != 0) { 1097 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1098 if (bootverbose) 1099 device_printf(dev, "Power button pressed\n"); 1100 shutdown_nice(RB_POWEROFF); 1101 } 1102 /* Acknowledge */ 1103 axp8xx_write(dev, AXP_IRQSTAT5, val); 1104 } 1105 1106 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1107 if (error != 0) 1108 return; 1109 1110 if (val) { 1111 /* Acknowledge */ 1112 axp8xx_write(dev, AXP_IRQSTAT6, val); 1113 } 1114 } 1115 1116 static device_t 1117 axp8xx_gpio_get_bus(device_t dev) 1118 { 1119 struct axp8xx_softc *sc; 1120 1121 sc = device_get_softc(dev); 1122 1123 return (sc->gpiodev); 1124 } 1125 1126 static int 1127 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1128 { 1129 *maxpin = nitems(axp8xx_pins) - 1; 1130 1131 return (0); 1132 } 1133 1134 static int 1135 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1136 { 1137 if (pin >= nitems(axp8xx_pins)) 1138 return (EINVAL); 1139 1140 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1141 1142 return (0); 1143 } 1144 1145 static int 1146 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1147 { 1148 if (pin >= nitems(axp8xx_pins)) 1149 return (EINVAL); 1150 1151 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1152 1153 return (0); 1154 } 1155 1156 static int 1157 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1158 { 1159 struct axp8xx_softc *sc; 1160 uint8_t data, func; 1161 int error; 1162 1163 if (pin >= nitems(axp8xx_pins)) 1164 return (EINVAL); 1165 1166 sc = device_get_softc(dev); 1167 1168 AXP_LOCK(sc); 1169 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1170 if (error == 0) { 1171 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1172 if (func == AXP_GPIO_FUNC_INPUT) 1173 *flags = GPIO_PIN_INPUT; 1174 else if (func == AXP_GPIO_FUNC_DRVLO || 1175 func == AXP_GPIO_FUNC_DRVHI) 1176 *flags = GPIO_PIN_OUTPUT; 1177 else 1178 *flags = 0; 1179 } 1180 AXP_UNLOCK(sc); 1181 1182 return (error); 1183 } 1184 1185 static int 1186 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1187 { 1188 struct axp8xx_softc *sc; 1189 uint8_t data; 1190 int error; 1191 1192 if (pin >= nitems(axp8xx_pins)) 1193 return (EINVAL); 1194 1195 sc = device_get_softc(dev); 1196 1197 AXP_LOCK(sc); 1198 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1199 if (error == 0) { 1200 data &= ~AXP_GPIO_FUNC; 1201 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1202 if ((flags & GPIO_PIN_OUTPUT) == 0) 1203 data |= AXP_GPIO_FUNC_INPUT; 1204 } 1205 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1206 } 1207 AXP_UNLOCK(sc); 1208 1209 return (error); 1210 } 1211 1212 static int 1213 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1214 { 1215 struct axp8xx_softc *sc; 1216 uint8_t data, func; 1217 int error; 1218 1219 if (pin >= nitems(axp8xx_pins)) 1220 return (EINVAL); 1221 1222 sc = device_get_softc(dev); 1223 1224 AXP_LOCK(sc); 1225 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1226 if (error == 0) { 1227 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1228 switch (func) { 1229 case AXP_GPIO_FUNC_DRVLO: 1230 *val = 0; 1231 break; 1232 case AXP_GPIO_FUNC_DRVHI: 1233 *val = 1; 1234 break; 1235 case AXP_GPIO_FUNC_INPUT: 1236 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1237 if (error == 0) 1238 *val = (data & (1 << pin)) ? 1 : 0; 1239 break; 1240 default: 1241 error = EIO; 1242 break; 1243 } 1244 } 1245 AXP_UNLOCK(sc); 1246 1247 return (error); 1248 } 1249 1250 static int 1251 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1252 { 1253 struct axp8xx_softc *sc; 1254 uint8_t data, func; 1255 int error; 1256 1257 if (pin >= nitems(axp8xx_pins)) 1258 return (EINVAL); 1259 1260 sc = device_get_softc(dev); 1261 1262 AXP_LOCK(sc); 1263 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1264 if (error == 0) { 1265 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1266 switch (func) { 1267 case AXP_GPIO_FUNC_DRVLO: 1268 case AXP_GPIO_FUNC_DRVHI: 1269 data &= ~AXP_GPIO_FUNC; 1270 data |= (val << AXP_GPIO_FUNC_SHIFT); 1271 break; 1272 default: 1273 error = EIO; 1274 break; 1275 } 1276 } 1277 if (error == 0) 1278 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1279 AXP_UNLOCK(sc); 1280 1281 return (error); 1282 } 1283 1284 1285 static int 1286 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1287 { 1288 struct axp8xx_softc *sc; 1289 uint8_t data, func; 1290 int error; 1291 1292 if (pin >= nitems(axp8xx_pins)) 1293 return (EINVAL); 1294 1295 sc = device_get_softc(dev); 1296 1297 AXP_LOCK(sc); 1298 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1299 if (error == 0) { 1300 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1301 switch (func) { 1302 case AXP_GPIO_FUNC_DRVLO: 1303 data &= ~AXP_GPIO_FUNC; 1304 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1305 break; 1306 case AXP_GPIO_FUNC_DRVHI: 1307 data &= ~AXP_GPIO_FUNC; 1308 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1309 break; 1310 default: 1311 error = EIO; 1312 break; 1313 } 1314 } 1315 if (error == 0) 1316 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1317 AXP_UNLOCK(sc); 1318 1319 return (error); 1320 } 1321 1322 static int 1323 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1324 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1325 { 1326 if (gpios[0] >= nitems(axp8xx_pins)) 1327 return (EINVAL); 1328 1329 *pin = gpios[0]; 1330 *flags = gpios[1]; 1331 1332 return (0); 1333 } 1334 1335 static phandle_t 1336 axp8xx_get_node(device_t dev, device_t bus) 1337 { 1338 return (ofw_bus_get_node(dev)); 1339 } 1340 1341 static struct axp8xx_reg_sc * 1342 axp8xx_reg_attach(device_t dev, phandle_t node, 1343 struct axp8xx_regdef *def) 1344 { 1345 struct axp8xx_reg_sc *reg_sc; 1346 struct regnode_init_def initdef; 1347 struct regnode *regnode; 1348 1349 memset(&initdef, 0, sizeof(initdef)); 1350 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1351 return (NULL); 1352 if (initdef.std_param.min_uvolt == 0) 1353 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1354 if (initdef.std_param.max_uvolt == 0) 1355 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1356 initdef.id = def->id; 1357 initdef.ofw_node = node; 1358 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1359 if (regnode == NULL) { 1360 device_printf(dev, "cannot create regulator\n"); 1361 return (NULL); 1362 } 1363 1364 reg_sc = regnode_get_softc(regnode); 1365 reg_sc->regnode = regnode; 1366 reg_sc->base_dev = dev; 1367 reg_sc->def = def; 1368 reg_sc->xref = OF_xref_from_node(node); 1369 reg_sc->param = regnode_get_stdparam(regnode); 1370 1371 regnode_register(regnode); 1372 1373 return (reg_sc); 1374 } 1375 1376 static int 1377 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1378 intptr_t *num) 1379 { 1380 struct axp8xx_softc *sc; 1381 int i; 1382 1383 sc = device_get_softc(dev); 1384 for (i = 0; i < sc->nregs; i++) { 1385 if (sc->regs[i] == NULL) 1386 continue; 1387 if (sc->regs[i]->xref == xref) { 1388 *num = sc->regs[i]->def->id; 1389 return (0); 1390 } 1391 } 1392 1393 return (ENXIO); 1394 } 1395 1396 static int 1397 axp8xx_probe(device_t dev) 1398 { 1399 if (!ofw_bus_status_okay(dev)) 1400 return (ENXIO); 1401 1402 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1403 { 1404 case AXP803: 1405 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1406 break; 1407 case AXP813: 1408 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1409 break; 1410 default: 1411 return (ENXIO); 1412 } 1413 1414 return (BUS_PROBE_DEFAULT); 1415 } 1416 1417 static int 1418 axp8xx_attach(device_t dev) 1419 { 1420 struct axp8xx_softc *sc; 1421 struct axp8xx_reg_sc *reg; 1422 uint8_t chip_id, val; 1423 phandle_t rnode, child; 1424 int error, i; 1425 1426 sc = device_get_softc(dev); 1427 1428 sc->addr = iicbus_get_addr(dev); 1429 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1430 1431 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1432 if (error != 0) { 1433 device_printf(dev, "cannot allocate resources for device\n"); 1434 return (error); 1435 } 1436 1437 if (bootverbose) { 1438 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1439 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1440 } 1441 1442 sc->nregs = nitems(axp8xx_common_regdefs); 1443 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1444 switch (sc->type) { 1445 case AXP803: 1446 sc->nregs += nitems(axp803_regdefs); 1447 break; 1448 case AXP813: 1449 sc->nregs += nitems(axp813_regdefs); 1450 break; 1451 } 1452 sc->config = &axp803_config; 1453 sc->sensors = axp8xx_common_sensors; 1454 sc->nsensors = nitems(axp8xx_common_sensors); 1455 1456 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1457 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1458 1459 /* Attach known regulators that exist in the DT */ 1460 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1461 if (rnode > 0) { 1462 for (i = 0; i < sc->nregs; i++) { 1463 char *regname; 1464 struct axp8xx_regdef *regdef; 1465 1466 if (i <= nitems(axp8xx_common_regdefs)) { 1467 regname = axp8xx_common_regdefs[i].name; 1468 regdef = &axp8xx_common_regdefs[i]; 1469 } else { 1470 int off; 1471 1472 off = i - nitems(axp8xx_common_regdefs); 1473 switch (sc->type) { 1474 case AXP803: 1475 regname = axp803_regdefs[off].name; 1476 regdef = &axp803_regdefs[off]; 1477 break; 1478 case AXP813: 1479 regname = axp813_regdefs[off].name; 1480 regdef = &axp813_regdefs[off]; 1481 break; 1482 } 1483 } 1484 child = ofw_bus_find_child(rnode, 1485 regname); 1486 if (child == 0) 1487 continue; 1488 reg = axp8xx_reg_attach(dev, child, 1489 regdef); 1490 if (reg == NULL) { 1491 device_printf(dev, 1492 "cannot attach regulator %s\n", 1493 regname); 1494 continue; 1495 } 1496 sc->regs[i] = reg; 1497 } 1498 } 1499 1500 /* Add sensors */ 1501 for (i = 0; i < sc->nsensors; i++) { 1502 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1503 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1504 OID_AUTO, sc->sensors[i].name, 1505 CTLTYPE_INT | CTLFLAG_RD, 1506 dev, sc->sensors[i].id, axp8xx_sysctl, 1507 sc->sensors[i].format, 1508 sc->sensors[i].desc); 1509 } 1510 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1511 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1512 OID_AUTO, "batchargecurrentstep", 1513 CTLTYPE_INT | CTLFLAG_RW, 1514 dev, 0, axp8xx_sysctl_chargecurrent, 1515 "I", "Battery Charging Current Step, " 1516 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1517 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1518 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1519 "12: 2600mA, 13: 2800mA"); 1520 1521 /* Get thresholds */ 1522 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1523 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1524 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE; 1525 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1526 if (bootverbose) { 1527 device_printf(dev, 1528 "Raw reg val: 0x%02x\n", val); 1529 device_printf(dev, 1530 "Warning threshold: 0x%02x\n", sc->warn_thres); 1531 device_printf(dev, 1532 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1533 } 1534 } 1535 1536 /* Enable interrupts */ 1537 axp8xx_write(dev, AXP_IRQEN1, 1538 AXP_IRQEN1_VBUS_LO | 1539 AXP_IRQEN1_VBUS_HI | 1540 AXP_IRQEN1_ACIN_LO | 1541 AXP_IRQEN1_ACIN_HI); 1542 axp8xx_write(dev, AXP_IRQEN2, 1543 AXP_IRQEN2_BATCHGD | 1544 AXP_IRQEN2_BATCHGC | 1545 AXP_IRQEN2_BAT_NO | 1546 AXP_IRQEN2_BAT_IN); 1547 axp8xx_write(dev, AXP_IRQEN3, 0); 1548 axp8xx_write(dev, AXP_IRQEN4, 1549 AXP_IRQEN4_BATLVL_LO0 | 1550 AXP_IRQEN4_BATLVL_LO1); 1551 axp8xx_write(dev, AXP_IRQEN5, 1552 AXP_IRQEN5_POKSIRQ | 1553 AXP_IRQEN5_POKLIRQ); 1554 axp8xx_write(dev, AXP_IRQEN6, 0); 1555 1556 /* Install interrupt handler */ 1557 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1558 NULL, axp8xx_intr, dev, &sc->ih); 1559 if (error != 0) { 1560 device_printf(dev, "cannot setup interrupt handler\n"); 1561 return (error); 1562 } 1563 1564 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1565 SHUTDOWN_PRI_LAST); 1566 1567 sc->gpiodev = gpiobus_attach_bus(dev); 1568 1569 return (0); 1570 } 1571 1572 static device_method_t axp8xx_methods[] = { 1573 /* Device interface */ 1574 DEVMETHOD(device_probe, axp8xx_probe), 1575 DEVMETHOD(device_attach, axp8xx_attach), 1576 1577 /* GPIO interface */ 1578 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1579 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1580 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1581 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1582 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1583 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1584 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1585 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1586 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1587 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1588 1589 /* Regdev interface */ 1590 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1591 1592 /* OFW bus interface */ 1593 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1594 1595 DEVMETHOD_END 1596 }; 1597 1598 static driver_t axp8xx_driver = { 1599 "axp8xx_pmu", 1600 axp8xx_methods, 1601 sizeof(struct axp8xx_softc), 1602 }; 1603 1604 static devclass_t axp8xx_devclass; 1605 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 1606 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1607 1608 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0, 1609 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1610 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 1611 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1612 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0); 1613 MODULE_VERSION(axp8xx, 1); 1614 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1615 SIMPLEBUS_PNP_INFO(compat_data); 1616