1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/eventhandler.h> 40 #include <sys/bus.h> 41 #include <sys/rman.h> 42 #include <sys/kernel.h> 43 #include <sys/reboot.h> 44 #include <sys/gpio.h> 45 #include <sys/module.h> 46 #include <machine/bus.h> 47 48 #include <dev/iicbus/iicbus.h> 49 #include <dev/iicbus/iiconf.h> 50 51 #include <dev/gpio/gpiobusvar.h> 52 53 #include <dev/ofw/ofw_bus.h> 54 #include <dev/ofw/ofw_bus_subr.h> 55 56 #include <dev/extres/regulator/regulator.h> 57 58 #include "gpio_if.h" 59 #include "iicbus_if.h" 60 #include "regdev_if.h" 61 62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 63 64 #define AXP_POWERSRC 0x00 65 #define AXP_POWERSRC_ACIN (1 << 7) 66 #define AXP_POWERSRC_VBUS (1 << 5) 67 #define AXP_POWERSRC_VBAT (1 << 3) 68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 69 #define AXP_POWERSRC_SHORTED (1 << 1) 70 #define AXP_POWERSRC_STARTUP (1 << 0) 71 #define AXP_POWERMODE 0x01 72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 74 #define AXP_POWERMODE_BAT_VALID (1 << 4) 75 #define AXP_ICTYPE 0x03 76 #define AXP_POWERCTL1 0x10 77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 78 #define AXP_POWERCTL1_DCDC6 (1 << 5) 79 #define AXP_POWERCTL1_DCDC5 (1 << 4) 80 #define AXP_POWERCTL1_DCDC4 (1 << 3) 81 #define AXP_POWERCTL1_DCDC3 (1 << 2) 82 #define AXP_POWERCTL1_DCDC2 (1 << 1) 83 #define AXP_POWERCTL1_DCDC1 (1 << 0) 84 #define AXP_POWERCTL2 0x12 85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 86 #define AXP_POWERCTL2_DLDO4 (1 << 6) 87 #define AXP_POWERCTL2_DLDO3 (1 << 5) 88 #define AXP_POWERCTL2_DLDO2 (1 << 4) 89 #define AXP_POWERCTL2_DLDO1 (1 << 3) 90 #define AXP_POWERCTL2_ELDO3 (1 << 2) 91 #define AXP_POWERCTL2_ELDO2 (1 << 1) 92 #define AXP_POWERCTL2_ELDO1 (1 << 0) 93 #define AXP_POWERCTL3 0x13 94 #define AXP_POWERCTL3_ALDO3 (1 << 7) 95 #define AXP_POWERCTL3_ALDO2 (1 << 6) 96 #define AXP_POWERCTL3_ALDO1 (1 << 5) 97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 98 #define AXP_POWERCTL3_FLDO2 (1 << 3) 99 #define AXP_POWERCTL3_FLDO1 (1 << 2) 100 #define AXP_VOLTCTL_DLDO1 0x15 101 #define AXP_VOLTCTL_DLDO2 0x16 102 #define AXP_VOLTCTL_DLDO3 0x17 103 #define AXP_VOLTCTL_DLDO4 0x18 104 #define AXP_VOLTCTL_ELDO1 0x19 105 #define AXP_VOLTCTL_ELDO2 0x1A 106 #define AXP_VOLTCTL_ELDO3 0x1B 107 #define AXP_VOLTCTL_FLDO1 0x1C 108 #define AXP_VOLTCTL_FLDO2 0x1D 109 #define AXP_VOLTCTL_DCDC1 0x20 110 #define AXP_VOLTCTL_DCDC2 0x21 111 #define AXP_VOLTCTL_DCDC3 0x22 112 #define AXP_VOLTCTL_DCDC4 0x23 113 #define AXP_VOLTCTL_DCDC5 0x24 114 #define AXP_VOLTCTL_DCDC6 0x25 115 #define AXP_VOLTCTL_DCDC7 0x26 116 #define AXP_VOLTCTL_ALDO1 0x28 117 #define AXP_VOLTCTL_ALDO2 0x29 118 #define AXP_VOLTCTL_ALDO3 0x2A 119 #define AXP_VOLTCTL_STATUS (1 << 7) 120 #define AXP_VOLTCTL_MASK 0x7f 121 #define AXP_POWERBAT 0x32 122 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 123 #define AXP_CHARGERCTL1 0x33 124 #define AXP_CHARGERCTL1_MIN 0 125 #define AXP_CHARGERCTL1_MAX 13 126 #define AXP_CHARGERCTL1_CMASK 0xf 127 #define AXP_IRQEN1 0x40 128 #define AXP_IRQEN1_ACIN_HI (1 << 6) 129 #define AXP_IRQEN1_ACIN_LO (1 << 5) 130 #define AXP_IRQEN1_VBUS_HI (1 << 3) 131 #define AXP_IRQEN1_VBUS_LO (1 << 2) 132 #define AXP_IRQEN2 0x41 133 #define AXP_IRQEN2_BAT_IN (1 << 7) 134 #define AXP_IRQEN2_BAT_NO (1 << 6) 135 #define AXP_IRQEN2_BATCHGC (1 << 3) 136 #define AXP_IRQEN2_BATCHGD (1 << 2) 137 #define AXP_IRQEN3 0x42 138 #define AXP_IRQEN4 0x43 139 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 140 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 141 #define AXP_IRQEN5 0x44 142 #define AXP_IRQEN5_POKSIRQ (1 << 4) 143 #define AXP_IRQEN5_POKLIRQ (1 << 3) 144 #define AXP_IRQEN6 0x45 145 #define AXP_IRQSTAT1 0x48 146 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 147 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 148 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 149 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 150 #define AXP_IRQSTAT2 0x49 151 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 152 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 153 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 154 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 155 #define AXP_IRQSTAT3 0x4a 156 #define AXP_IRQSTAT4 0x4b 157 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 158 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 159 #define AXP_IRQSTAT5 0x4c 160 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 161 #define AXP_IRQEN5_POKLIRQ (1 << 3) 162 #define AXP_IRQSTAT6 0x4d 163 #define AXP_BATSENSE_HI 0x78 164 #define AXP_BATSENSE_LO 0x79 165 #define AXP_BATCHG_HI 0x7a 166 #define AXP_BATCHG_LO 0x7b 167 #define AXP_BATDISCHG_HI 0x7c 168 #define AXP_BATDISCHG_LO 0x7d 169 #define AXP_GPIO0_CTRL 0x90 170 #define AXP_GPIO0LDO_CTRL 0x91 171 #define AXP_GPIO1_CTRL 0x92 172 #define AXP_GPIO1LDO_CTRL 0x93 173 #define AXP_GPIO_FUNC (0x7 << 0) 174 #define AXP_GPIO_FUNC_SHIFT 0 175 #define AXP_GPIO_FUNC_DRVLO 0 176 #define AXP_GPIO_FUNC_DRVHI 1 177 #define AXP_GPIO_FUNC_INPUT 2 178 #define AXP_GPIO_FUNC_LDO_ON 3 179 #define AXP_GPIO_FUNC_LDO_OFF 4 180 #define AXP_GPIO_SIGBIT 0x94 181 #define AXP_GPIO_PD 0x97 182 #define AXP_FUEL_GAUGECTL 0xb8 183 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 184 185 #define AXP_BAT_CAP 0xb9 186 #define AXP_BAT_CAP_VALID (1 << 7) 187 #define AXP_BAT_CAP_PERCENT 0x7f 188 189 #define AXP_BAT_MAX_CAP_HI 0xe0 190 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 191 #define AXP_BAT_MAX_CAP_LO 0xe1 192 193 #define AXP_BAT_COULOMB_HI 0xe2 194 #define AXP_BAT_COULOMB_VALID (1 << 7) 195 #define AXP_BAT_COULOMB_LO 0xe3 196 197 #define AXP_BAT_CAP_WARN 0xe6 198 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 199 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */ 200 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 201 202 /* Sensor conversion macros */ 203 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 204 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 205 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 206 207 static const struct { 208 const char *name; 209 uint8_t ctrl_reg; 210 } axp8xx_pins[] = { 211 { "GPIO0", AXP_GPIO0_CTRL }, 212 { "GPIO1", AXP_GPIO1_CTRL }, 213 }; 214 215 enum AXP8XX_TYPE { 216 AXP803 = 1, 217 AXP813, 218 }; 219 220 static struct ofw_compat_data compat_data[] = { 221 { "x-powers,axp803", AXP803 }, 222 { "x-powers,axp813", AXP813 }, 223 { "x-powers,axp818", AXP813 }, 224 { NULL, 0 } 225 }; 226 227 static struct resource_spec axp8xx_spec[] = { 228 { SYS_RES_IRQ, 0, RF_ACTIVE }, 229 { -1, 0 } 230 }; 231 232 struct axp8xx_regdef { 233 intptr_t id; 234 char *name; 235 char *supply_name; 236 uint8_t enable_reg; 237 uint8_t enable_mask; 238 uint8_t enable_value; 239 uint8_t disable_value; 240 uint8_t voltage_reg; 241 int voltage_min; 242 int voltage_max; 243 int voltage_step1; 244 int voltage_nstep1; 245 int voltage_step2; 246 int voltage_nstep2; 247 }; 248 249 enum axp8xx_reg_id { 250 AXP8XX_REG_ID_DCDC1 = 100, 251 AXP8XX_REG_ID_DCDC2, 252 AXP8XX_REG_ID_DCDC3, 253 AXP8XX_REG_ID_DCDC4, 254 AXP8XX_REG_ID_DCDC5, 255 AXP8XX_REG_ID_DCDC6, 256 AXP813_REG_ID_DCDC7, 257 AXP803_REG_ID_DC1SW, 258 AXP8XX_REG_ID_DLDO1, 259 AXP8XX_REG_ID_DLDO2, 260 AXP8XX_REG_ID_DLDO3, 261 AXP8XX_REG_ID_DLDO4, 262 AXP8XX_REG_ID_ELDO1, 263 AXP8XX_REG_ID_ELDO2, 264 AXP8XX_REG_ID_ELDO3, 265 AXP8XX_REG_ID_ALDO1, 266 AXP8XX_REG_ID_ALDO2, 267 AXP8XX_REG_ID_ALDO3, 268 AXP8XX_REG_ID_FLDO1, 269 AXP8XX_REG_ID_FLDO2, 270 AXP813_REG_ID_FLDO3, 271 AXP8XX_REG_ID_GPIO0_LDO, 272 AXP8XX_REG_ID_GPIO1_LDO, 273 }; 274 275 static struct axp8xx_regdef axp803_regdefs[] = { 276 { 277 .id = AXP803_REG_ID_DC1SW, 278 .name = "dc1sw", 279 .enable_reg = AXP_POWERCTL2, 280 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 281 .enable_value = AXP_POWERCTL2_DC1SW, 282 }, 283 }; 284 285 static struct axp8xx_regdef axp813_regdefs[] = { 286 { 287 .id = AXP813_REG_ID_DCDC7, 288 .name = "dcdc7", 289 .enable_reg = AXP_POWERCTL1, 290 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 291 .enable_value = AXP_POWERCTL1_DCDC7, 292 .voltage_reg = AXP_VOLTCTL_DCDC7, 293 .voltage_min = 600, 294 .voltage_max = 1520, 295 .voltage_step1 = 10, 296 .voltage_nstep1 = 50, 297 .voltage_step2 = 20, 298 .voltage_nstep2 = 21, 299 }, 300 }; 301 302 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 303 { 304 .id = AXP8XX_REG_ID_DCDC1, 305 .name = "dcdc1", 306 .enable_reg = AXP_POWERCTL1, 307 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 308 .enable_value = AXP_POWERCTL1_DCDC1, 309 .voltage_reg = AXP_VOLTCTL_DCDC1, 310 .voltage_min = 1600, 311 .voltage_max = 3400, 312 .voltage_step1 = 100, 313 .voltage_nstep1 = 18, 314 }, 315 { 316 .id = AXP8XX_REG_ID_DCDC2, 317 .name = "dcdc2", 318 .enable_reg = AXP_POWERCTL1, 319 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 320 .enable_value = AXP_POWERCTL1_DCDC2, 321 .voltage_reg = AXP_VOLTCTL_DCDC2, 322 .voltage_min = 500, 323 .voltage_max = 1300, 324 .voltage_step1 = 10, 325 .voltage_nstep1 = 70, 326 .voltage_step2 = 20, 327 .voltage_nstep2 = 5, 328 }, 329 { 330 .id = AXP8XX_REG_ID_DCDC3, 331 .name = "dcdc3", 332 .enable_reg = AXP_POWERCTL1, 333 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 334 .enable_value = AXP_POWERCTL1_DCDC3, 335 .voltage_reg = AXP_VOLTCTL_DCDC3, 336 .voltage_min = 500, 337 .voltage_max = 1300, 338 .voltage_step1 = 10, 339 .voltage_nstep1 = 70, 340 .voltage_step2 = 20, 341 .voltage_nstep2 = 5, 342 }, 343 { 344 .id = AXP8XX_REG_ID_DCDC4, 345 .name = "dcdc4", 346 .enable_reg = AXP_POWERCTL1, 347 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 348 .enable_value = AXP_POWERCTL1_DCDC4, 349 .voltage_reg = AXP_VOLTCTL_DCDC4, 350 .voltage_min = 500, 351 .voltage_max = 1300, 352 .voltage_step1 = 10, 353 .voltage_nstep1 = 70, 354 .voltage_step2 = 20, 355 .voltage_nstep2 = 5, 356 }, 357 { 358 .id = AXP8XX_REG_ID_DCDC5, 359 .name = "dcdc5", 360 .enable_reg = AXP_POWERCTL1, 361 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 362 .enable_value = AXP_POWERCTL1_DCDC5, 363 .voltage_reg = AXP_VOLTCTL_DCDC5, 364 .voltage_min = 800, 365 .voltage_max = 1840, 366 .voltage_step1 = 10, 367 .voltage_nstep1 = 42, 368 .voltage_step2 = 20, 369 .voltage_nstep2 = 36, 370 }, 371 { 372 .id = AXP8XX_REG_ID_DCDC6, 373 .name = "dcdc6", 374 .enable_reg = AXP_POWERCTL1, 375 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 376 .enable_value = AXP_POWERCTL1_DCDC6, 377 .voltage_reg = AXP_VOLTCTL_DCDC6, 378 .voltage_min = 600, 379 .voltage_max = 1520, 380 .voltage_step1 = 10, 381 .voltage_nstep1 = 50, 382 .voltage_step2 = 20, 383 .voltage_nstep2 = 21, 384 }, 385 { 386 .id = AXP8XX_REG_ID_DLDO1, 387 .name = "dldo1", 388 .enable_reg = AXP_POWERCTL2, 389 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 390 .enable_value = AXP_POWERCTL2_DLDO1, 391 .voltage_reg = AXP_VOLTCTL_DLDO1, 392 .voltage_min = 700, 393 .voltage_max = 3300, 394 .voltage_step1 = 100, 395 .voltage_nstep1 = 26, 396 }, 397 { 398 .id = AXP8XX_REG_ID_DLDO2, 399 .name = "dldo2", 400 .enable_reg = AXP_POWERCTL2, 401 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 402 .enable_value = AXP_POWERCTL2_DLDO2, 403 .voltage_reg = AXP_VOLTCTL_DLDO2, 404 .voltage_min = 700, 405 .voltage_max = 4200, 406 .voltage_step1 = 100, 407 .voltage_nstep1 = 27, 408 .voltage_step2 = 200, 409 .voltage_nstep2 = 4, 410 }, 411 { 412 .id = AXP8XX_REG_ID_DLDO3, 413 .name = "dldo3", 414 .enable_reg = AXP_POWERCTL2, 415 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 416 .enable_value = AXP_POWERCTL2_DLDO3, 417 .voltage_reg = AXP_VOLTCTL_DLDO3, 418 .voltage_min = 700, 419 .voltage_max = 3300, 420 .voltage_step1 = 100, 421 .voltage_nstep1 = 26, 422 }, 423 { 424 .id = AXP8XX_REG_ID_DLDO4, 425 .name = "dldo4", 426 .enable_reg = AXP_POWERCTL2, 427 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 428 .enable_value = AXP_POWERCTL2_DLDO4, 429 .voltage_reg = AXP_VOLTCTL_DLDO4, 430 .voltage_min = 700, 431 .voltage_max = 3300, 432 .voltage_step1 = 100, 433 .voltage_nstep1 = 26, 434 }, 435 { 436 .id = AXP8XX_REG_ID_ALDO1, 437 .name = "aldo1", 438 .enable_reg = AXP_POWERCTL3, 439 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 440 .enable_value = AXP_POWERCTL3_ALDO1, 441 .voltage_min = 700, 442 .voltage_max = 3300, 443 .voltage_step1 = 100, 444 .voltage_nstep1 = 26, 445 }, 446 { 447 .id = AXP8XX_REG_ID_ALDO2, 448 .name = "aldo2", 449 .enable_reg = AXP_POWERCTL3, 450 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 451 .enable_value = AXP_POWERCTL3_ALDO2, 452 .voltage_min = 700, 453 .voltage_max = 3300, 454 .voltage_step1 = 100, 455 .voltage_nstep1 = 26, 456 }, 457 { 458 .id = AXP8XX_REG_ID_ALDO3, 459 .name = "aldo3", 460 .enable_reg = AXP_POWERCTL3, 461 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 462 .enable_value = AXP_POWERCTL3_ALDO3, 463 .voltage_min = 700, 464 .voltage_max = 3300, 465 .voltage_step1 = 100, 466 .voltage_nstep1 = 26, 467 }, 468 { 469 .id = AXP8XX_REG_ID_ELDO1, 470 .name = "eldo1", 471 .enable_reg = AXP_POWERCTL2, 472 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 473 .enable_value = AXP_POWERCTL2_ELDO1, 474 .voltage_min = 700, 475 .voltage_max = 1900, 476 .voltage_step1 = 50, 477 .voltage_nstep1 = 24, 478 }, 479 { 480 .id = AXP8XX_REG_ID_ELDO2, 481 .name = "eldo2", 482 .enable_reg = AXP_POWERCTL2, 483 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 484 .enable_value = AXP_POWERCTL2_ELDO2, 485 .voltage_min = 700, 486 .voltage_max = 1900, 487 .voltage_step1 = 50, 488 .voltage_nstep1 = 24, 489 }, 490 { 491 .id = AXP8XX_REG_ID_ELDO3, 492 .name = "eldo3", 493 .enable_reg = AXP_POWERCTL2, 494 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 495 .enable_value = AXP_POWERCTL2_ELDO3, 496 .voltage_min = 700, 497 .voltage_max = 1900, 498 .voltage_step1 = 50, 499 .voltage_nstep1 = 24, 500 }, 501 { 502 .id = AXP8XX_REG_ID_FLDO1, 503 .name = "fldo1", 504 .enable_reg = AXP_POWERCTL3, 505 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 506 .enable_value = AXP_POWERCTL3_FLDO1, 507 .voltage_min = 700, 508 .voltage_max = 1450, 509 .voltage_step1 = 50, 510 .voltage_nstep1 = 15, 511 }, 512 { 513 .id = AXP8XX_REG_ID_FLDO2, 514 .name = "fldo2", 515 .enable_reg = AXP_POWERCTL3, 516 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 517 .enable_value = AXP_POWERCTL3_FLDO2, 518 .voltage_min = 700, 519 .voltage_max = 1450, 520 .voltage_step1 = 50, 521 .voltage_nstep1 = 15, 522 }, 523 { 524 .id = AXP8XX_REG_ID_GPIO0_LDO, 525 .name = "ldo-io0", 526 .enable_reg = AXP_GPIO0_CTRL, 527 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 528 .enable_value = AXP_GPIO_FUNC_LDO_ON, 529 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 530 .voltage_reg = AXP_GPIO0LDO_CTRL, 531 .voltage_min = 700, 532 .voltage_max = 3300, 533 .voltage_step1 = 100, 534 .voltage_nstep1 = 26, 535 }, 536 { 537 .id = AXP8XX_REG_ID_GPIO1_LDO, 538 .name = "ldo-io1", 539 .enable_reg = AXP_GPIO1_CTRL, 540 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 541 .enable_value = AXP_GPIO_FUNC_LDO_ON, 542 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 543 .voltage_reg = AXP_GPIO1LDO_CTRL, 544 .voltage_min = 700, 545 .voltage_max = 3300, 546 .voltage_step1 = 100, 547 .voltage_nstep1 = 26, 548 }, 549 }; 550 551 enum axp8xx_sensor { 552 AXP_SENSOR_ACIN_PRESENT, 553 AXP_SENSOR_VBUS_PRESENT, 554 AXP_SENSOR_BATT_PRESENT, 555 AXP_SENSOR_BATT_CHARGING, 556 AXP_SENSOR_BATT_CHARGE_STATE, 557 AXP_SENSOR_BATT_VOLTAGE, 558 AXP_SENSOR_BATT_CHARGE_CURRENT, 559 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 560 AXP_SENSOR_BATT_CAPACITY_PERCENT, 561 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 562 AXP_SENSOR_BATT_CURRENT_CAPACITY, 563 }; 564 565 enum battery_capacity_state { 566 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 567 BATT_CAPACITY_WARNING, /* warning cap in battery */ 568 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 569 BATT_CAPACITY_HIGH, /* high cap in battery */ 570 BATT_CAPACITY_MAX, /* maximum cap in battery */ 571 BATT_CAPACITY_LOW /* low cap in battery */ 572 }; 573 574 struct axp8xx_sensors { 575 int id; 576 const char *name; 577 const char *desc; 578 const char *format; 579 }; 580 581 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 582 { 583 .id = AXP_SENSOR_ACIN_PRESENT, 584 .name = "acin", 585 .format = "I", 586 .desc = "ACIN Present", 587 }, 588 { 589 .id = AXP_SENSOR_VBUS_PRESENT, 590 .name = "vbus", 591 .format = "I", 592 .desc = "VBUS Present", 593 }, 594 { 595 .id = AXP_SENSOR_BATT_PRESENT, 596 .name = "bat", 597 .format = "I", 598 .desc = "Battery Present", 599 }, 600 { 601 .id = AXP_SENSOR_BATT_CHARGING, 602 .name = "batcharging", 603 .format = "I", 604 .desc = "Battery Charging", 605 }, 606 { 607 .id = AXP_SENSOR_BATT_CHARGE_STATE, 608 .name = "batchargestate", 609 .format = "I", 610 .desc = "Battery Charge State", 611 }, 612 { 613 .id = AXP_SENSOR_BATT_VOLTAGE, 614 .name = "batvolt", 615 .format = "I", 616 .desc = "Battery Voltage", 617 }, 618 { 619 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 620 .name = "batchargecurrent", 621 .format = "I", 622 .desc = "Average Battery Charging Current", 623 }, 624 { 625 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 626 .name = "batdischargecurrent", 627 .format = "I", 628 .desc = "Average Battery Discharging Current", 629 }, 630 { 631 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 632 .name = "batcapacitypercent", 633 .format = "I", 634 .desc = "Battery Capacity Percentage", 635 }, 636 { 637 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 638 .name = "batmaxcapacity", 639 .format = "I", 640 .desc = "Battery Maximum Capacity", 641 }, 642 { 643 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 644 .name = "batcurrentcapacity", 645 .format = "I", 646 .desc = "Battery Current Capacity", 647 }, 648 }; 649 650 struct axp8xx_config { 651 const char *name; 652 int batsense_step; /* uV */ 653 int charge_step; /* uA */ 654 int discharge_step; /* uA */ 655 int maxcap_step; /* uAh */ 656 int coulomb_step; /* uAh */ 657 }; 658 659 static struct axp8xx_config axp803_config = { 660 .name = "AXP803", 661 .batsense_step = 1100, 662 .charge_step = 1000, 663 .discharge_step = 1000, 664 .maxcap_step = 1456, 665 .coulomb_step = 1456, 666 }; 667 668 struct axp8xx_softc; 669 670 struct axp8xx_reg_sc { 671 struct regnode *regnode; 672 device_t base_dev; 673 struct axp8xx_regdef *def; 674 phandle_t xref; 675 struct regnode_std_param *param; 676 }; 677 678 struct axp8xx_softc { 679 struct resource *res; 680 uint16_t addr; 681 void *ih; 682 device_t gpiodev; 683 struct mtx mtx; 684 int busy; 685 686 int type; 687 688 /* Configs */ 689 const struct axp8xx_config *config; 690 691 /* Sensors */ 692 const struct axp8xx_sensors *sensors; 693 int nsensors; 694 695 /* Regulators */ 696 struct axp8xx_reg_sc **regs; 697 int nregs; 698 699 /* Warning, shutdown thresholds */ 700 int warn_thres; 701 int shut_thres; 702 }; 703 704 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 705 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 706 707 static int 708 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 709 { 710 struct axp8xx_softc *sc; 711 struct iic_msg msg[2]; 712 713 sc = device_get_softc(dev); 714 715 msg[0].slave = sc->addr; 716 msg[0].flags = IIC_M_WR; 717 msg[0].len = 1; 718 msg[0].buf = ® 719 720 msg[1].slave = sc->addr; 721 msg[1].flags = IIC_M_RD; 722 msg[1].len = size; 723 msg[1].buf = data; 724 725 return (iicbus_transfer(dev, msg, 2)); 726 } 727 728 static int 729 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 730 { 731 struct axp8xx_softc *sc; 732 struct iic_msg msg[2]; 733 734 sc = device_get_softc(dev); 735 736 msg[0].slave = sc->addr; 737 msg[0].flags = IIC_M_WR; 738 msg[0].len = 1; 739 msg[0].buf = ® 740 741 msg[1].slave = sc->addr; 742 msg[1].flags = IIC_M_WR; 743 msg[1].len = 1; 744 msg[1].buf = &val; 745 746 return (iicbus_transfer(dev, msg, 2)); 747 } 748 749 static int 750 axp8xx_regnode_init(struct regnode *regnode) 751 { 752 return (0); 753 } 754 755 static int 756 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 757 { 758 struct axp8xx_reg_sc *sc; 759 uint8_t val; 760 761 sc = regnode_get_softc(regnode); 762 763 if (bootverbose) 764 device_printf(sc->base_dev, "%sable %s (%s)\n", 765 enable ? "En" : "Dis", 766 regnode_get_name(regnode), 767 sc->def->name); 768 769 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 770 val &= ~sc->def->enable_mask; 771 if (enable) 772 val |= sc->def->enable_value; 773 else { 774 if (sc->def->disable_value) 775 val |= sc->def->disable_value; 776 else 777 val &= ~sc->def->enable_value; 778 } 779 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 780 781 *udelay = 0; 782 783 return (0); 784 } 785 786 static void 787 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 788 { 789 if (val < sc->def->voltage_nstep1) 790 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 791 else 792 *uv = sc->def->voltage_min + 793 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 794 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 795 *uv *= 1000; 796 } 797 798 static int 799 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 800 int max_uvolt, uint8_t *val) 801 { 802 uint8_t nval; 803 int nstep, uvolt; 804 805 nval = 0; 806 uvolt = sc->def->voltage_min * 1000; 807 808 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 809 nstep++) { 810 ++nval; 811 uvolt += (sc->def->voltage_step1 * 1000); 812 } 813 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 814 nstep++) { 815 ++nval; 816 uvolt += (sc->def->voltage_step2 * 1000); 817 } 818 if (uvolt > max_uvolt) 819 return (EINVAL); 820 821 *val = nval; 822 return (0); 823 } 824 825 static int 826 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 827 int max_uvolt, int *udelay) 828 { 829 struct axp8xx_reg_sc *sc; 830 uint8_t val; 831 832 sc = regnode_get_softc(regnode); 833 834 if (bootverbose) 835 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 836 regnode_get_name(regnode), 837 sc->def->name, 838 min_uvolt, max_uvolt); 839 840 if (sc->def->voltage_step1 == 0) 841 return (ENXIO); 842 843 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 844 return (ERANGE); 845 846 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 847 848 *udelay = 0; 849 850 return (0); 851 } 852 853 static int 854 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 855 { 856 struct axp8xx_reg_sc *sc; 857 uint8_t val; 858 859 sc = regnode_get_softc(regnode); 860 861 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 862 return (ENXIO); 863 864 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 865 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 866 867 return (0); 868 } 869 870 static regnode_method_t axp8xx_regnode_methods[] = { 871 /* Regulator interface */ 872 REGNODEMETHOD(regnode_init, axp8xx_regnode_init), 873 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 874 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 875 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 876 REGNODEMETHOD_END 877 }; 878 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 879 sizeof(struct axp8xx_reg_sc), regnode_class); 880 881 static void 882 axp8xx_shutdown(void *devp, int howto) 883 { 884 device_t dev; 885 886 if ((howto & RB_POWEROFF) == 0) 887 return; 888 889 dev = devp; 890 891 if (bootverbose) 892 device_printf(dev, "Shutdown Axp8xx\n"); 893 894 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 895 } 896 897 static int 898 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 899 { 900 device_t dev = arg1; 901 uint8_t data; 902 int val, error; 903 904 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 905 if (error != 0) 906 return (error); 907 908 if (bootverbose) 909 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 910 val = (data & AXP_CHARGERCTL1_CMASK); 911 error = sysctl_handle_int(oidp, &val, 0, req); 912 if (error || !req->newptr) /* error || read request */ 913 return (error); 914 915 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 916 return (EINVAL); 917 918 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 919 axp8xx_write(dev, AXP_CHARGERCTL1, val); 920 921 return (0); 922 } 923 924 static int 925 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 926 { 927 struct axp8xx_softc *sc; 928 device_t dev = arg1; 929 enum axp8xx_sensor sensor = arg2; 930 const struct axp8xx_config *c; 931 uint8_t data; 932 int val, i, found, batt_val; 933 uint8_t lo, hi; 934 935 sc = device_get_softc(dev); 936 c = sc->config; 937 938 for (found = 0, i = 0; i < sc->nsensors; i++) { 939 if (sc->sensors[i].id == sensor) { 940 found = 1; 941 break; 942 } 943 } 944 945 if (found == 0) 946 return (ENOENT); 947 948 switch (sensor) { 949 case AXP_SENSOR_ACIN_PRESENT: 950 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 951 val = !!(data & AXP_POWERSRC_ACIN); 952 break; 953 case AXP_SENSOR_VBUS_PRESENT: 954 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 955 val = !!(data & AXP_POWERSRC_VBUS); 956 break; 957 case AXP_SENSOR_BATT_PRESENT: 958 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 959 if (data & AXP_POWERMODE_BAT_VALID) 960 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 961 } 962 break; 963 case AXP_SENSOR_BATT_CHARGING: 964 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 965 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 966 break; 967 case AXP_SENSOR_BATT_CHARGE_STATE: 968 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 969 (data & AXP_BAT_CAP_VALID) != 0) { 970 batt_val = (data & AXP_BAT_CAP_PERCENT); 971 if (batt_val <= sc->shut_thres) 972 val = BATT_CAPACITY_CRITICAL; 973 else if (batt_val <= sc->warn_thres) 974 val = BATT_CAPACITY_WARNING; 975 else 976 val = BATT_CAPACITY_NORMAL; 977 } 978 break; 979 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 980 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 981 (data & AXP_BAT_CAP_VALID) != 0) 982 val = (data & AXP_BAT_CAP_PERCENT); 983 break; 984 case AXP_SENSOR_BATT_VOLTAGE: 985 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 986 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 987 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 988 val *= c->batsense_step; 989 } 990 break; 991 case AXP_SENSOR_BATT_CHARGE_CURRENT: 992 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 993 (data & AXP_POWERSRC_CHARING) != 0 && 994 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 995 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 996 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 997 val *= c->charge_step; 998 } 999 break; 1000 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 1001 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1002 (data & AXP_POWERSRC_CHARING) == 0 && 1003 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 1004 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 1005 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1006 val *= c->discharge_step; 1007 } 1008 break; 1009 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1010 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1011 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1012 val = AXP_SENSOR_COULOMB(hi, lo); 1013 val *= c->maxcap_step; 1014 } 1015 break; 1016 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1017 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1018 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1019 val = AXP_SENSOR_COULOMB(hi, lo); 1020 val *= c->coulomb_step; 1021 } 1022 break; 1023 } 1024 1025 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1026 } 1027 1028 static void 1029 axp8xx_intr(void *arg) 1030 { 1031 device_t dev; 1032 uint8_t val; 1033 int error; 1034 1035 dev = arg; 1036 1037 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1038 if (error != 0) 1039 return; 1040 1041 if (val) { 1042 if (bootverbose) 1043 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1044 if (val & AXP_IRQSTAT1_ACIN_HI) 1045 devctl_notify("PMU", "AC", "plugged", NULL); 1046 if (val & AXP_IRQSTAT1_ACIN_LO) 1047 devctl_notify("PMU", "AC", "unplugged", NULL); 1048 if (val & AXP_IRQSTAT1_VBUS_HI) 1049 devctl_notify("PMU", "USB", "plugged", NULL); 1050 if (val & AXP_IRQSTAT1_VBUS_LO) 1051 devctl_notify("PMU", "USB", "unplugged", NULL); 1052 /* Acknowledge */ 1053 axp8xx_write(dev, AXP_IRQSTAT1, val); 1054 } 1055 1056 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1057 if (error != 0) 1058 return; 1059 1060 if (val) { 1061 if (bootverbose) 1062 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1063 if (val & AXP_IRQSTAT2_BATCHGD) 1064 devctl_notify("PMU", "Battery", "charged", NULL); 1065 if (val & AXP_IRQSTAT2_BATCHGC) 1066 devctl_notify("PMU", "Battery", "charging", NULL); 1067 if (val & AXP_IRQSTAT2_BAT_NO) 1068 devctl_notify("PMU", "Battery", "absent", NULL); 1069 if (val & AXP_IRQSTAT2_BAT_IN) 1070 devctl_notify("PMU", "Battery", "plugged", NULL); 1071 /* Acknowledge */ 1072 axp8xx_write(dev, AXP_IRQSTAT2, val); 1073 } 1074 1075 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1076 if (error != 0) 1077 return; 1078 1079 if (val) { 1080 /* Acknowledge */ 1081 axp8xx_write(dev, AXP_IRQSTAT3, val); 1082 } 1083 1084 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1085 if (error != 0) 1086 return; 1087 1088 if (val) { 1089 if (bootverbose) 1090 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1091 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1092 devctl_notify("PMU", "Battery", "shutdown threshold", NULL); 1093 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1094 devctl_notify("PMU", "Battery", "warning threshold", NULL); 1095 /* Acknowledge */ 1096 axp8xx_write(dev, AXP_IRQSTAT4, val); 1097 } 1098 1099 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1100 if (error != 0) 1101 return; 1102 1103 if (val != 0) { 1104 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1105 if (bootverbose) 1106 device_printf(dev, "Power button pressed\n"); 1107 shutdown_nice(RB_POWEROFF); 1108 } 1109 /* Acknowledge */ 1110 axp8xx_write(dev, AXP_IRQSTAT5, val); 1111 } 1112 1113 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1114 if (error != 0) 1115 return; 1116 1117 if (val) { 1118 /* Acknowledge */ 1119 axp8xx_write(dev, AXP_IRQSTAT6, val); 1120 } 1121 } 1122 1123 static device_t 1124 axp8xx_gpio_get_bus(device_t dev) 1125 { 1126 struct axp8xx_softc *sc; 1127 1128 sc = device_get_softc(dev); 1129 1130 return (sc->gpiodev); 1131 } 1132 1133 static int 1134 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1135 { 1136 *maxpin = nitems(axp8xx_pins) - 1; 1137 1138 return (0); 1139 } 1140 1141 static int 1142 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1143 { 1144 if (pin >= nitems(axp8xx_pins)) 1145 return (EINVAL); 1146 1147 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1148 1149 return (0); 1150 } 1151 1152 static int 1153 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1154 { 1155 if (pin >= nitems(axp8xx_pins)) 1156 return (EINVAL); 1157 1158 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1159 1160 return (0); 1161 } 1162 1163 static int 1164 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1165 { 1166 struct axp8xx_softc *sc; 1167 uint8_t data, func; 1168 int error; 1169 1170 if (pin >= nitems(axp8xx_pins)) 1171 return (EINVAL); 1172 1173 sc = device_get_softc(dev); 1174 1175 AXP_LOCK(sc); 1176 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1177 if (error == 0) { 1178 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1179 if (func == AXP_GPIO_FUNC_INPUT) 1180 *flags = GPIO_PIN_INPUT; 1181 else if (func == AXP_GPIO_FUNC_DRVLO || 1182 func == AXP_GPIO_FUNC_DRVHI) 1183 *flags = GPIO_PIN_OUTPUT; 1184 else 1185 *flags = 0; 1186 } 1187 AXP_UNLOCK(sc); 1188 1189 return (error); 1190 } 1191 1192 static int 1193 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1194 { 1195 struct axp8xx_softc *sc; 1196 uint8_t data; 1197 int error; 1198 1199 if (pin >= nitems(axp8xx_pins)) 1200 return (EINVAL); 1201 1202 sc = device_get_softc(dev); 1203 1204 AXP_LOCK(sc); 1205 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1206 if (error == 0) { 1207 data &= ~AXP_GPIO_FUNC; 1208 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1209 if ((flags & GPIO_PIN_OUTPUT) == 0) 1210 data |= AXP_GPIO_FUNC_INPUT; 1211 } 1212 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1213 } 1214 AXP_UNLOCK(sc); 1215 1216 return (error); 1217 } 1218 1219 static int 1220 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1221 { 1222 struct axp8xx_softc *sc; 1223 uint8_t data, func; 1224 int error; 1225 1226 if (pin >= nitems(axp8xx_pins)) 1227 return (EINVAL); 1228 1229 sc = device_get_softc(dev); 1230 1231 AXP_LOCK(sc); 1232 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1233 if (error == 0) { 1234 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1235 switch (func) { 1236 case AXP_GPIO_FUNC_DRVLO: 1237 *val = 0; 1238 break; 1239 case AXP_GPIO_FUNC_DRVHI: 1240 *val = 1; 1241 break; 1242 case AXP_GPIO_FUNC_INPUT: 1243 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1244 if (error == 0) 1245 *val = (data & (1 << pin)) ? 1 : 0; 1246 break; 1247 default: 1248 error = EIO; 1249 break; 1250 } 1251 } 1252 AXP_UNLOCK(sc); 1253 1254 return (error); 1255 } 1256 1257 static int 1258 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1259 { 1260 struct axp8xx_softc *sc; 1261 uint8_t data, func; 1262 int error; 1263 1264 if (pin >= nitems(axp8xx_pins)) 1265 return (EINVAL); 1266 1267 sc = device_get_softc(dev); 1268 1269 AXP_LOCK(sc); 1270 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1271 if (error == 0) { 1272 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1273 switch (func) { 1274 case AXP_GPIO_FUNC_DRVLO: 1275 case AXP_GPIO_FUNC_DRVHI: 1276 data &= ~AXP_GPIO_FUNC; 1277 data |= (val << AXP_GPIO_FUNC_SHIFT); 1278 break; 1279 default: 1280 error = EIO; 1281 break; 1282 } 1283 } 1284 if (error == 0) 1285 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1286 AXP_UNLOCK(sc); 1287 1288 return (error); 1289 } 1290 1291 1292 static int 1293 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1294 { 1295 struct axp8xx_softc *sc; 1296 uint8_t data, func; 1297 int error; 1298 1299 if (pin >= nitems(axp8xx_pins)) 1300 return (EINVAL); 1301 1302 sc = device_get_softc(dev); 1303 1304 AXP_LOCK(sc); 1305 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1306 if (error == 0) { 1307 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1308 switch (func) { 1309 case AXP_GPIO_FUNC_DRVLO: 1310 data &= ~AXP_GPIO_FUNC; 1311 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1312 break; 1313 case AXP_GPIO_FUNC_DRVHI: 1314 data &= ~AXP_GPIO_FUNC; 1315 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1316 break; 1317 default: 1318 error = EIO; 1319 break; 1320 } 1321 } 1322 if (error == 0) 1323 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1324 AXP_UNLOCK(sc); 1325 1326 return (error); 1327 } 1328 1329 static int 1330 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1331 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1332 { 1333 if (gpios[0] >= nitems(axp8xx_pins)) 1334 return (EINVAL); 1335 1336 *pin = gpios[0]; 1337 *flags = gpios[1]; 1338 1339 return (0); 1340 } 1341 1342 static phandle_t 1343 axp8xx_get_node(device_t dev, device_t bus) 1344 { 1345 return (ofw_bus_get_node(dev)); 1346 } 1347 1348 static struct axp8xx_reg_sc * 1349 axp8xx_reg_attach(device_t dev, phandle_t node, 1350 struct axp8xx_regdef *def) 1351 { 1352 struct axp8xx_reg_sc *reg_sc; 1353 struct regnode_init_def initdef; 1354 struct regnode *regnode; 1355 1356 memset(&initdef, 0, sizeof(initdef)); 1357 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1358 return (NULL); 1359 if (initdef.std_param.min_uvolt == 0) 1360 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1361 if (initdef.std_param.max_uvolt == 0) 1362 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1363 initdef.id = def->id; 1364 initdef.ofw_node = node; 1365 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1366 if (regnode == NULL) { 1367 device_printf(dev, "cannot create regulator\n"); 1368 return (NULL); 1369 } 1370 1371 reg_sc = regnode_get_softc(regnode); 1372 reg_sc->regnode = regnode; 1373 reg_sc->base_dev = dev; 1374 reg_sc->def = def; 1375 reg_sc->xref = OF_xref_from_node(node); 1376 reg_sc->param = regnode_get_stdparam(regnode); 1377 1378 regnode_register(regnode); 1379 1380 return (reg_sc); 1381 } 1382 1383 static int 1384 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1385 intptr_t *num) 1386 { 1387 struct axp8xx_softc *sc; 1388 int i; 1389 1390 sc = device_get_softc(dev); 1391 for (i = 0; i < sc->nregs; i++) { 1392 if (sc->regs[i] == NULL) 1393 continue; 1394 if (sc->regs[i]->xref == xref) { 1395 *num = sc->regs[i]->def->id; 1396 return (0); 1397 } 1398 } 1399 1400 return (ENXIO); 1401 } 1402 1403 static int 1404 axp8xx_probe(device_t dev) 1405 { 1406 if (!ofw_bus_status_okay(dev)) 1407 return (ENXIO); 1408 1409 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1410 { 1411 case AXP803: 1412 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1413 break; 1414 case AXP813: 1415 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1416 break; 1417 default: 1418 return (ENXIO); 1419 } 1420 1421 return (BUS_PROBE_DEFAULT); 1422 } 1423 1424 static int 1425 axp8xx_attach(device_t dev) 1426 { 1427 struct axp8xx_softc *sc; 1428 struct axp8xx_reg_sc *reg; 1429 uint8_t chip_id, val; 1430 phandle_t rnode, child; 1431 int error, i; 1432 1433 sc = device_get_softc(dev); 1434 1435 sc->addr = iicbus_get_addr(dev); 1436 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1437 1438 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1439 if (error != 0) { 1440 device_printf(dev, "cannot allocate resources for device\n"); 1441 return (error); 1442 } 1443 1444 if (bootverbose) { 1445 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1446 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1447 } 1448 1449 sc->nregs = nitems(axp8xx_common_regdefs); 1450 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1451 switch (sc->type) { 1452 case AXP803: 1453 sc->nregs += nitems(axp803_regdefs); 1454 break; 1455 case AXP813: 1456 sc->nregs += nitems(axp813_regdefs); 1457 break; 1458 } 1459 sc->config = &axp803_config; 1460 sc->sensors = axp8xx_common_sensors; 1461 sc->nsensors = nitems(axp8xx_common_sensors); 1462 1463 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1464 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1465 1466 /* Attach known regulators that exist in the DT */ 1467 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1468 if (rnode > 0) { 1469 for (i = 0; i < sc->nregs; i++) { 1470 char *regname; 1471 struct axp8xx_regdef *regdef; 1472 1473 if (i <= nitems(axp8xx_common_regdefs)) { 1474 regname = axp8xx_common_regdefs[i].name; 1475 regdef = &axp8xx_common_regdefs[i]; 1476 } else { 1477 int off; 1478 1479 off = i - nitems(axp8xx_common_regdefs); 1480 switch (sc->type) { 1481 case AXP803: 1482 regname = axp803_regdefs[off].name; 1483 regdef = &axp803_regdefs[off]; 1484 break; 1485 case AXP813: 1486 regname = axp813_regdefs[off].name; 1487 regdef = &axp813_regdefs[off]; 1488 break; 1489 } 1490 } 1491 child = ofw_bus_find_child(rnode, 1492 regname); 1493 if (child == 0) 1494 continue; 1495 reg = axp8xx_reg_attach(dev, child, 1496 regdef); 1497 if (reg == NULL) { 1498 device_printf(dev, 1499 "cannot attach regulator %s\n", 1500 regname); 1501 continue; 1502 } 1503 sc->regs[i] = reg; 1504 } 1505 } 1506 1507 /* Add sensors */ 1508 for (i = 0; i < sc->nsensors; i++) { 1509 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1510 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1511 OID_AUTO, sc->sensors[i].name, 1512 CTLTYPE_INT | CTLFLAG_RD, 1513 dev, sc->sensors[i].id, axp8xx_sysctl, 1514 sc->sensors[i].format, 1515 sc->sensors[i].desc); 1516 } 1517 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1518 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1519 OID_AUTO, "batchargecurrentstep", 1520 CTLTYPE_INT | CTLFLAG_RW, 1521 dev, 0, axp8xx_sysctl_chargecurrent, 1522 "I", "Battery Charging Current Step, " 1523 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1524 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1525 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1526 "12: 2600mA, 13: 2800mA"); 1527 1528 /* Get thresholds */ 1529 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1530 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1531 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE; 1532 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1533 if (bootverbose) { 1534 device_printf(dev, 1535 "Raw reg val: 0x%02x\n", val); 1536 device_printf(dev, 1537 "Warning threshold: 0x%02x\n", sc->warn_thres); 1538 device_printf(dev, 1539 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1540 } 1541 } 1542 1543 /* Enable interrupts */ 1544 axp8xx_write(dev, AXP_IRQEN1, 1545 AXP_IRQEN1_VBUS_LO | 1546 AXP_IRQEN1_VBUS_HI | 1547 AXP_IRQEN1_ACIN_LO | 1548 AXP_IRQEN1_ACIN_HI); 1549 axp8xx_write(dev, AXP_IRQEN2, 1550 AXP_IRQEN2_BATCHGD | 1551 AXP_IRQEN2_BATCHGC | 1552 AXP_IRQEN2_BAT_NO | 1553 AXP_IRQEN2_BAT_IN); 1554 axp8xx_write(dev, AXP_IRQEN3, 0); 1555 axp8xx_write(dev, AXP_IRQEN4, 1556 AXP_IRQEN4_BATLVL_LO0 | 1557 AXP_IRQEN4_BATLVL_LO1); 1558 axp8xx_write(dev, AXP_IRQEN5, 1559 AXP_IRQEN5_POKSIRQ | 1560 AXP_IRQEN5_POKLIRQ); 1561 axp8xx_write(dev, AXP_IRQEN6, 0); 1562 1563 /* Install interrupt handler */ 1564 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1565 NULL, axp8xx_intr, dev, &sc->ih); 1566 if (error != 0) { 1567 device_printf(dev, "cannot setup interrupt handler\n"); 1568 return (error); 1569 } 1570 1571 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1572 SHUTDOWN_PRI_LAST); 1573 1574 sc->gpiodev = gpiobus_attach_bus(dev); 1575 1576 return (0); 1577 } 1578 1579 static device_method_t axp8xx_methods[] = { 1580 /* Device interface */ 1581 DEVMETHOD(device_probe, axp8xx_probe), 1582 DEVMETHOD(device_attach, axp8xx_attach), 1583 1584 /* GPIO interface */ 1585 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1586 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1587 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1588 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1589 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1590 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1591 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1592 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1593 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1594 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1595 1596 /* Regdev interface */ 1597 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1598 1599 /* OFW bus interface */ 1600 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1601 1602 DEVMETHOD_END 1603 }; 1604 1605 static driver_t axp8xx_driver = { 1606 "axp8xx_pmu", 1607 axp8xx_methods, 1608 sizeof(struct axp8xx_softc), 1609 }; 1610 1611 static devclass_t axp8xx_devclass; 1612 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 1613 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1614 1615 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0, 1616 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1617 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 1618 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1619 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0); 1620 MODULE_VERSION(axp8xx, 1); 1621 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1622