1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/eventhandler.h> 40 #include <sys/bus.h> 41 #include <sys/rman.h> 42 #include <sys/kernel.h> 43 #include <sys/reboot.h> 44 #include <sys/gpio.h> 45 #include <sys/module.h> 46 #include <machine/bus.h> 47 48 #include <dev/iicbus/iicbus.h> 49 #include <dev/iicbus/iiconf.h> 50 51 #include <dev/gpio/gpiobusvar.h> 52 53 #include <dev/ofw/ofw_bus.h> 54 #include <dev/ofw/ofw_bus_subr.h> 55 56 #include <dev/extres/regulator/regulator.h> 57 58 #include "gpio_if.h" 59 #include "iicbus_if.h" 60 #include "regdev_if.h" 61 62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 63 64 #define AXP_POWERSRC 0x00 65 #define AXP_POWERSRC_ACIN (1 << 7) 66 #define AXP_POWERSRC_VBUS (1 << 5) 67 #define AXP_POWERSRC_VBAT (1 << 3) 68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 69 #define AXP_POWERSRC_SHORTED (1 << 1) 70 #define AXP_POWERSRC_STARTUP (1 << 0) 71 #define AXP_POWERMODE 0x01 72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 74 #define AXP_POWERMODE_BAT_VALID (1 << 4) 75 #define AXP_ICTYPE 0x03 76 #define AXP_POWERCTL1 0x10 77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 78 #define AXP_POWERCTL1_DCDC6 (1 << 5) 79 #define AXP_POWERCTL1_DCDC5 (1 << 4) 80 #define AXP_POWERCTL1_DCDC4 (1 << 3) 81 #define AXP_POWERCTL1_DCDC3 (1 << 2) 82 #define AXP_POWERCTL1_DCDC2 (1 << 1) 83 #define AXP_POWERCTL1_DCDC1 (1 << 0) 84 #define AXP_POWERCTL2 0x12 85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 86 #define AXP_POWERCTL2_DLDO4 (1 << 6) 87 #define AXP_POWERCTL2_DLDO3 (1 << 5) 88 #define AXP_POWERCTL2_DLDO2 (1 << 4) 89 #define AXP_POWERCTL2_DLDO1 (1 << 3) 90 #define AXP_POWERCTL2_ELDO3 (1 << 2) 91 #define AXP_POWERCTL2_ELDO2 (1 << 1) 92 #define AXP_POWERCTL2_ELDO1 (1 << 0) 93 #define AXP_POWERCTL3 0x13 94 #define AXP_POWERCTL3_ALDO3 (1 << 7) 95 #define AXP_POWERCTL3_ALDO2 (1 << 6) 96 #define AXP_POWERCTL3_ALDO1 (1 << 5) 97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 98 #define AXP_POWERCTL3_FLDO2 (1 << 3) 99 #define AXP_POWERCTL3_FLDO1 (1 << 2) 100 #define AXP_VOLTCTL_DLDO1 0x15 101 #define AXP_VOLTCTL_DLDO2 0x16 102 #define AXP_VOLTCTL_DLDO3 0x17 103 #define AXP_VOLTCTL_DLDO4 0x18 104 #define AXP_VOLTCTL_ELDO1 0x19 105 #define AXP_VOLTCTL_ELDO2 0x1A 106 #define AXP_VOLTCTL_ELDO3 0x1B 107 #define AXP_VOLTCTL_FLDO1 0x1C 108 #define AXP_VOLTCTL_FLDO2 0x1D 109 #define AXP_VOLTCTL_DCDC1 0x20 110 #define AXP_VOLTCTL_DCDC2 0x21 111 #define AXP_VOLTCTL_DCDC3 0x22 112 #define AXP_VOLTCTL_DCDC4 0x23 113 #define AXP_VOLTCTL_DCDC5 0x24 114 #define AXP_VOLTCTL_DCDC6 0x25 115 #define AXP_VOLTCTL_DCDC7 0x26 116 #define AXP_VOLTCTL_ALDO1 0x28 117 #define AXP_VOLTCTL_ALDO2 0x29 118 #define AXP_VOLTCTL_ALDO3 0x2A 119 #define AXP_VOLTCTL_STATUS (1 << 7) 120 #define AXP_VOLTCTL_MASK 0x7f 121 #define AXP_POWERBAT 0x32 122 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 123 #define AXP_IRQEN1 0x40 124 #define AXP_IRQEN1_ACIN_HI (1 << 6) 125 #define AXP_IRQEN1_ACIN_LO (1 << 5) 126 #define AXP_IRQEN1_VBUS_HI (1 << 3) 127 #define AXP_IRQEN1_VBUS_LO (1 << 2) 128 #define AXP_IRQEN2 0x41 129 #define AXP_IRQEN2_BAT_IN (1 << 7) 130 #define AXP_IRQEN2_BAT_NO (1 << 6) 131 #define AXP_IRQEN2_BATCHGC (1 << 3) 132 #define AXP_IRQEN2_BATCHGD (1 << 2) 133 #define AXP_IRQEN3 0x42 134 #define AXP_IRQEN4 0x43 135 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 136 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 137 #define AXP_IRQEN5 0x44 138 #define AXP_IRQEN5_POKSIRQ (1 << 4) 139 #define AXP_IRQEN5_POKLIRQ (1 << 3) 140 #define AXP_IRQEN6 0x45 141 #define AXP_IRQSTAT1 0x48 142 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 143 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 144 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 145 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 146 #define AXP_IRQSTAT2 0x49 147 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 148 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 149 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 150 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 151 #define AXP_IRQSTAT3 0x4a 152 #define AXP_IRQSTAT4 0x4b 153 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 154 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 155 #define AXP_IRQSTAT5 0x4c 156 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 157 #define AXP_IRQEN5_POKLIRQ (1 << 3) 158 #define AXP_IRQSTAT6 0x4d 159 #define AXP_BATSENSE_HI 0x78 160 #define AXP_BATSENSE_LO 0x79 161 #define AXP_BATCHG_HI 0x7a 162 #define AXP_BATCHG_LO 0x7b 163 #define AXP_BATDISCHG_HI 0x7c 164 #define AXP_BATDISCHG_LO 0x7d 165 #define AXP_GPIO0_CTRL 0x90 166 #define AXP_GPIO0LDO_CTRL 0x91 167 #define AXP_GPIO1_CTRL 0x92 168 #define AXP_GPIO1LDO_CTRL 0x93 169 #define AXP_GPIO_FUNC (0x7 << 0) 170 #define AXP_GPIO_FUNC_SHIFT 0 171 #define AXP_GPIO_FUNC_DRVLO 0 172 #define AXP_GPIO_FUNC_DRVHI 1 173 #define AXP_GPIO_FUNC_INPUT 2 174 #define AXP_GPIO_FUNC_LDO_ON 3 175 #define AXP_GPIO_FUNC_LDO_OFF 4 176 #define AXP_GPIO_SIGBIT 0x94 177 #define AXP_GPIO_PD 0x97 178 #define AXP_FUEL_GAUGECTL 0xb8 179 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 180 181 #define AXP_BAT_CAP 0xb9 182 #define AXP_BAT_CAP_VALID (1 << 7) 183 #define AXP_BAT_CAP_PERCENT 0x7f 184 185 #define AXP_BAT_MAX_CAP_HI 0xe0 186 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 187 #define AXP_BAT_MAX_CAP_LO 0xe1 188 189 #define AXP_BAT_COULOMB_HI 0xe2 190 #define AXP_BAT_COULOMB_VALID (1 << 7) 191 #define AXP_BAT_COULOMB_LO 0xe3 192 193 #define AXP_BAT_CAP_WARN 0xe6 194 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 195 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 196 197 /* Sensor conversion macros */ 198 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 199 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 200 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 201 202 static const struct { 203 const char *name; 204 uint8_t ctrl_reg; 205 } axp8xx_pins[] = { 206 { "GPIO0", AXP_GPIO0_CTRL }, 207 { "GPIO1", AXP_GPIO1_CTRL }, 208 }; 209 210 enum AXP8XX_TYPE { 211 AXP803 = 1, 212 AXP813, 213 }; 214 215 static struct ofw_compat_data compat_data[] = { 216 { "x-powers,axp803", AXP803 }, 217 { "x-powers,axp813", AXP813 }, 218 { "x-powers,axp818", AXP813 }, 219 { NULL, 0 } 220 }; 221 222 static struct resource_spec axp8xx_spec[] = { 223 { SYS_RES_IRQ, 0, RF_ACTIVE }, 224 { -1, 0 } 225 }; 226 227 struct axp8xx_regdef { 228 intptr_t id; 229 char *name; 230 char *supply_name; 231 uint8_t enable_reg; 232 uint8_t enable_mask; 233 uint8_t enable_value; 234 uint8_t disable_value; 235 uint8_t voltage_reg; 236 int voltage_min; 237 int voltage_max; 238 int voltage_step1; 239 int voltage_nstep1; 240 int voltage_step2; 241 int voltage_nstep2; 242 }; 243 244 enum axp8xx_reg_id { 245 AXP8XX_REG_ID_DCDC1 = 100, 246 AXP8XX_REG_ID_DCDC2, 247 AXP8XX_REG_ID_DCDC3, 248 AXP8XX_REG_ID_DCDC4, 249 AXP8XX_REG_ID_DCDC5, 250 AXP8XX_REG_ID_DCDC6, 251 AXP813_REG_ID_DCDC7, 252 AXP803_REG_ID_DC1SW, 253 AXP8XX_REG_ID_DLDO1, 254 AXP8XX_REG_ID_DLDO2, 255 AXP8XX_REG_ID_DLDO3, 256 AXP8XX_REG_ID_DLDO4, 257 AXP8XX_REG_ID_ELDO1, 258 AXP8XX_REG_ID_ELDO2, 259 AXP8XX_REG_ID_ELDO3, 260 AXP8XX_REG_ID_ALDO1, 261 AXP8XX_REG_ID_ALDO2, 262 AXP8XX_REG_ID_ALDO3, 263 AXP8XX_REG_ID_FLDO1, 264 AXP8XX_REG_ID_FLDO2, 265 AXP813_REG_ID_FLDO3, 266 AXP8XX_REG_ID_GPIO0_LDO, 267 AXP8XX_REG_ID_GPIO1_LDO, 268 }; 269 270 static struct axp8xx_regdef axp803_regdefs[] = { 271 { 272 .id = AXP803_REG_ID_DC1SW, 273 .name = "dc1sw", 274 .enable_reg = AXP_POWERCTL2, 275 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 276 .enable_value = AXP_POWERCTL2_DC1SW, 277 }, 278 }; 279 280 static struct axp8xx_regdef axp813_regdefs[] = { 281 { 282 .id = AXP813_REG_ID_DCDC7, 283 .name = "dcdc7", 284 .enable_reg = AXP_POWERCTL1, 285 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 286 .enable_value = AXP_POWERCTL1_DCDC7, 287 .voltage_reg = AXP_VOLTCTL_DCDC7, 288 .voltage_min = 600, 289 .voltage_max = 1520, 290 .voltage_step1 = 10, 291 .voltage_nstep1 = 50, 292 .voltage_step2 = 20, 293 .voltage_nstep2 = 21, 294 }, 295 }; 296 297 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 298 { 299 .id = AXP8XX_REG_ID_DCDC1, 300 .name = "dcdc1", 301 .enable_reg = AXP_POWERCTL1, 302 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 303 .enable_value = AXP_POWERCTL1_DCDC1, 304 .voltage_reg = AXP_VOLTCTL_DCDC1, 305 .voltage_min = 1600, 306 .voltage_max = 3400, 307 .voltage_step1 = 100, 308 .voltage_nstep1 = 18, 309 }, 310 { 311 .id = AXP8XX_REG_ID_DCDC2, 312 .name = "dcdc2", 313 .enable_reg = AXP_POWERCTL1, 314 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 315 .enable_value = AXP_POWERCTL1_DCDC2, 316 .voltage_reg = AXP_VOLTCTL_DCDC2, 317 .voltage_min = 500, 318 .voltage_max = 1300, 319 .voltage_step1 = 10, 320 .voltage_nstep1 = 70, 321 .voltage_step2 = 20, 322 .voltage_nstep2 = 5, 323 }, 324 { 325 .id = AXP8XX_REG_ID_DCDC3, 326 .name = "dcdc3", 327 .enable_reg = AXP_POWERCTL1, 328 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 329 .enable_value = AXP_POWERCTL1_DCDC3, 330 .voltage_reg = AXP_VOLTCTL_DCDC3, 331 .voltage_min = 500, 332 .voltage_max = 1300, 333 .voltage_step1 = 10, 334 .voltage_nstep1 = 70, 335 .voltage_step2 = 20, 336 .voltage_nstep2 = 5, 337 }, 338 { 339 .id = AXP8XX_REG_ID_DCDC4, 340 .name = "dcdc4", 341 .enable_reg = AXP_POWERCTL1, 342 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 343 .enable_value = AXP_POWERCTL1_DCDC4, 344 .voltage_reg = AXP_VOLTCTL_DCDC4, 345 .voltage_min = 500, 346 .voltage_max = 1300, 347 .voltage_step1 = 10, 348 .voltage_nstep1 = 70, 349 .voltage_step2 = 20, 350 .voltage_nstep2 = 5, 351 }, 352 { 353 .id = AXP8XX_REG_ID_DCDC5, 354 .name = "dcdc5", 355 .enable_reg = AXP_POWERCTL1, 356 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 357 .enable_value = AXP_POWERCTL1_DCDC5, 358 .voltage_reg = AXP_VOLTCTL_DCDC5, 359 .voltage_min = 800, 360 .voltage_max = 1840, 361 .voltage_step1 = 10, 362 .voltage_nstep1 = 42, 363 .voltage_step2 = 20, 364 .voltage_nstep2 = 36, 365 }, 366 { 367 .id = AXP8XX_REG_ID_DCDC6, 368 .name = "dcdc6", 369 .enable_reg = AXP_POWERCTL1, 370 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 371 .enable_value = AXP_POWERCTL1_DCDC6, 372 .voltage_reg = AXP_VOLTCTL_DCDC6, 373 .voltage_min = 600, 374 .voltage_max = 1520, 375 .voltage_step1 = 10, 376 .voltage_nstep1 = 50, 377 .voltage_step2 = 20, 378 .voltage_nstep2 = 21, 379 }, 380 { 381 .id = AXP8XX_REG_ID_DLDO1, 382 .name = "dldo1", 383 .enable_reg = AXP_POWERCTL2, 384 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 385 .enable_value = AXP_POWERCTL2_DLDO1, 386 .voltage_reg = AXP_VOLTCTL_DLDO1, 387 .voltage_min = 700, 388 .voltage_max = 3300, 389 .voltage_step1 = 100, 390 .voltage_nstep1 = 26, 391 }, 392 { 393 .id = AXP8XX_REG_ID_DLDO2, 394 .name = "dldo2", 395 .enable_reg = AXP_POWERCTL2, 396 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 397 .enable_value = AXP_POWERCTL2_DLDO2, 398 .voltage_reg = AXP_VOLTCTL_DLDO2, 399 .voltage_min = 700, 400 .voltage_max = 4200, 401 .voltage_step1 = 100, 402 .voltage_nstep1 = 27, 403 .voltage_step2 = 200, 404 .voltage_nstep2 = 4, 405 }, 406 { 407 .id = AXP8XX_REG_ID_DLDO3, 408 .name = "dldo3", 409 .enable_reg = AXP_POWERCTL2, 410 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 411 .enable_value = AXP_POWERCTL2_DLDO3, 412 .voltage_reg = AXP_VOLTCTL_DLDO3, 413 .voltage_min = 700, 414 .voltage_max = 3300, 415 .voltage_step1 = 100, 416 .voltage_nstep1 = 26, 417 }, 418 { 419 .id = AXP8XX_REG_ID_DLDO4, 420 .name = "dldo4", 421 .enable_reg = AXP_POWERCTL2, 422 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 423 .enable_value = AXP_POWERCTL2_DLDO4, 424 .voltage_reg = AXP_VOLTCTL_DLDO4, 425 .voltage_min = 700, 426 .voltage_max = 3300, 427 .voltage_step1 = 100, 428 .voltage_nstep1 = 26, 429 }, 430 { 431 .id = AXP8XX_REG_ID_ALDO1, 432 .name = "aldo1", 433 .enable_reg = AXP_POWERCTL3, 434 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 435 .enable_value = AXP_POWERCTL3_ALDO1, 436 .voltage_min = 700, 437 .voltage_max = 3300, 438 .voltage_step1 = 100, 439 .voltage_nstep1 = 26, 440 }, 441 { 442 .id = AXP8XX_REG_ID_ALDO2, 443 .name = "aldo2", 444 .enable_reg = AXP_POWERCTL3, 445 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 446 .enable_value = AXP_POWERCTL3_ALDO2, 447 .voltage_min = 700, 448 .voltage_max = 3300, 449 .voltage_step1 = 100, 450 .voltage_nstep1 = 26, 451 }, 452 { 453 .id = AXP8XX_REG_ID_ALDO3, 454 .name = "aldo3", 455 .enable_reg = AXP_POWERCTL3, 456 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 457 .enable_value = AXP_POWERCTL3_ALDO3, 458 .voltage_min = 700, 459 .voltage_max = 3300, 460 .voltage_step1 = 100, 461 .voltage_nstep1 = 26, 462 }, 463 { 464 .id = AXP8XX_REG_ID_ELDO1, 465 .name = "eldo1", 466 .enable_reg = AXP_POWERCTL2, 467 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 468 .enable_value = AXP_POWERCTL2_ELDO1, 469 .voltage_min = 700, 470 .voltage_max = 1900, 471 .voltage_step1 = 50, 472 .voltage_nstep1 = 24, 473 }, 474 { 475 .id = AXP8XX_REG_ID_ELDO2, 476 .name = "eldo2", 477 .enable_reg = AXP_POWERCTL2, 478 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 479 .enable_value = AXP_POWERCTL2_ELDO2, 480 .voltage_min = 700, 481 .voltage_max = 1900, 482 .voltage_step1 = 50, 483 .voltage_nstep1 = 24, 484 }, 485 { 486 .id = AXP8XX_REG_ID_ELDO3, 487 .name = "eldo3", 488 .enable_reg = AXP_POWERCTL2, 489 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 490 .enable_value = AXP_POWERCTL2_ELDO3, 491 .voltage_min = 700, 492 .voltage_max = 1900, 493 .voltage_step1 = 50, 494 .voltage_nstep1 = 24, 495 }, 496 { 497 .id = AXP8XX_REG_ID_FLDO1, 498 .name = "fldo1", 499 .enable_reg = AXP_POWERCTL3, 500 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 501 .enable_value = AXP_POWERCTL3_FLDO1, 502 .voltage_min = 700, 503 .voltage_max = 1450, 504 .voltage_step1 = 50, 505 .voltage_nstep1 = 15, 506 }, 507 { 508 .id = AXP8XX_REG_ID_FLDO2, 509 .name = "fldo2", 510 .enable_reg = AXP_POWERCTL3, 511 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 512 .enable_value = AXP_POWERCTL3_FLDO2, 513 .voltage_min = 700, 514 .voltage_max = 1450, 515 .voltage_step1 = 50, 516 .voltage_nstep1 = 15, 517 }, 518 { 519 .id = AXP8XX_REG_ID_GPIO0_LDO, 520 .name = "ldo-io0", 521 .enable_reg = AXP_GPIO0_CTRL, 522 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 523 .enable_value = AXP_GPIO_FUNC_LDO_ON, 524 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 525 .voltage_reg = AXP_GPIO0LDO_CTRL, 526 .voltage_min = 700, 527 .voltage_max = 3300, 528 .voltage_step1 = 100, 529 .voltage_nstep1 = 26, 530 }, 531 { 532 .id = AXP8XX_REG_ID_GPIO1_LDO, 533 .name = "ldo-io1", 534 .enable_reg = AXP_GPIO1_CTRL, 535 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 536 .enable_value = AXP_GPIO_FUNC_LDO_ON, 537 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 538 .voltage_reg = AXP_GPIO1LDO_CTRL, 539 .voltage_min = 700, 540 .voltage_max = 3300, 541 .voltage_step1 = 100, 542 .voltage_nstep1 = 26, 543 }, 544 }; 545 546 enum axp8xx_sensor { 547 AXP_SENSOR_ACIN_PRESENT, 548 AXP_SENSOR_VBUS_PRESENT, 549 AXP_SENSOR_BATT_PRESENT, 550 AXP_SENSOR_BATT_CHARGING, 551 AXP_SENSOR_BATT_CHARGE_STATE, 552 AXP_SENSOR_BATT_VOLTAGE, 553 AXP_SENSOR_BATT_CHARGE_CURRENT, 554 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 555 AXP_SENSOR_BATT_CAPACITY_PERCENT, 556 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 557 AXP_SENSOR_BATT_CURRENT_CAPACITY, 558 }; 559 560 enum battery_capacity_state { 561 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 562 BATT_CAPACITY_WARNING, /* warning cap in battery */ 563 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 564 BATT_CAPACITY_HIGH, /* high cap in battery */ 565 BATT_CAPACITY_MAX, /* maximum cap in battery */ 566 BATT_CAPACITY_LOW /* low cap in battery */ 567 }; 568 569 struct axp8xx_sensors { 570 int id; 571 const char *name; 572 const char *desc; 573 const char *format; 574 }; 575 576 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 577 { 578 .id = AXP_SENSOR_ACIN_PRESENT, 579 .name = "acin", 580 .format = "I", 581 .desc = "ACIN Present", 582 }, 583 { 584 .id = AXP_SENSOR_VBUS_PRESENT, 585 .name = "vbus", 586 .format = "I", 587 .desc = "VBUS Present", 588 }, 589 { 590 .id = AXP_SENSOR_BATT_PRESENT, 591 .name = "bat", 592 .format = "I", 593 .desc = "Battery Present", 594 }, 595 { 596 .id = AXP_SENSOR_BATT_CHARGING, 597 .name = "batcharging", 598 .format = "I", 599 .desc = "Battery Charging", 600 }, 601 { 602 .id = AXP_SENSOR_BATT_CHARGE_STATE, 603 .name = "batchargestate", 604 .format = "I", 605 .desc = "Battery Charge State", 606 }, 607 { 608 .id = AXP_SENSOR_BATT_VOLTAGE, 609 .name = "batvolt", 610 .format = "I", 611 .desc = "Battery Voltage", 612 }, 613 { 614 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 615 .name = "batchargecurrent", 616 .format = "I", 617 .desc = "Battery Charging Current", 618 }, 619 { 620 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 621 .name = "batdischargecurrent", 622 .format = "I", 623 .desc = "Battery Discharging Current", 624 }, 625 { 626 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 627 .name = "batcapacitypercent", 628 .format = "I", 629 .desc = "Battery Capacity Percentage", 630 }, 631 { 632 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 633 .name = "batmaxcapacity", 634 .format = "I", 635 .desc = "Battery Maximum Capacity", 636 }, 637 { 638 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 639 .name = "batcurrentcapacity", 640 .format = "I", 641 .desc = "Battery Current Capacity", 642 }, 643 }; 644 645 struct axp8xx_config { 646 const char *name; 647 int batsense_step; /* uV */ 648 int charge_step; /* uA */ 649 int discharge_step; /* uA */ 650 int maxcap_step; /* uAh */ 651 int coulomb_step; /* uAh */ 652 }; 653 654 static struct axp8xx_config axp803_config = { 655 .name = "AXP803", 656 .batsense_step = 1100, 657 .charge_step = 1000, 658 .discharge_step = 1000, 659 .maxcap_step = 1456, 660 .coulomb_step = 1456, 661 }; 662 663 struct axp8xx_softc; 664 665 struct axp8xx_reg_sc { 666 struct regnode *regnode; 667 device_t base_dev; 668 struct axp8xx_regdef *def; 669 phandle_t xref; 670 struct regnode_std_param *param; 671 }; 672 673 struct axp8xx_softc { 674 struct resource *res; 675 uint16_t addr; 676 void *ih; 677 device_t gpiodev; 678 struct mtx mtx; 679 int busy; 680 681 int type; 682 683 /* Configs */ 684 const struct axp8xx_config *config; 685 686 /* Sensors */ 687 const struct axp8xx_sensors *sensors; 688 int nsensors; 689 690 /* Regulators */ 691 struct axp8xx_reg_sc **regs; 692 int nregs; 693 694 /* Warning, shutdown thresholds */ 695 int warn_thres; 696 int shut_thres; 697 }; 698 699 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 700 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 701 702 static int 703 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 704 { 705 struct axp8xx_softc *sc; 706 struct iic_msg msg[2]; 707 708 sc = device_get_softc(dev); 709 710 msg[0].slave = sc->addr; 711 msg[0].flags = IIC_M_WR; 712 msg[0].len = 1; 713 msg[0].buf = ® 714 715 msg[1].slave = sc->addr; 716 msg[1].flags = IIC_M_RD; 717 msg[1].len = size; 718 msg[1].buf = data; 719 720 return (iicbus_transfer(dev, msg, 2)); 721 } 722 723 static int 724 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 725 { 726 struct axp8xx_softc *sc; 727 struct iic_msg msg[2]; 728 729 sc = device_get_softc(dev); 730 731 msg[0].slave = sc->addr; 732 msg[0].flags = IIC_M_WR; 733 msg[0].len = 1; 734 msg[0].buf = ® 735 736 msg[1].slave = sc->addr; 737 msg[1].flags = IIC_M_WR; 738 msg[1].len = 1; 739 msg[1].buf = &val; 740 741 return (iicbus_transfer(dev, msg, 2)); 742 } 743 744 static int 745 axp8xx_regnode_init(struct regnode *regnode) 746 { 747 return (0); 748 } 749 750 static int 751 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 752 { 753 struct axp8xx_reg_sc *sc; 754 uint8_t val; 755 756 sc = regnode_get_softc(regnode); 757 758 if (bootverbose) 759 device_printf(sc->base_dev, "%sable %s (%s)\n", 760 enable ? "En" : "Dis", 761 regnode_get_name(regnode), 762 sc->def->name); 763 764 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 765 val &= ~sc->def->enable_mask; 766 if (enable) 767 val |= sc->def->enable_value; 768 else { 769 if (sc->def->disable_value) 770 val |= sc->def->disable_value; 771 else 772 val &= ~sc->def->enable_value; 773 } 774 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 775 776 *udelay = 0; 777 778 return (0); 779 } 780 781 static void 782 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 783 { 784 if (val < sc->def->voltage_nstep1) 785 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 786 else 787 *uv = sc->def->voltage_min + 788 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 789 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 790 *uv *= 1000; 791 } 792 793 static int 794 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 795 int max_uvolt, uint8_t *val) 796 { 797 uint8_t nval; 798 int nstep, uvolt; 799 800 nval = 0; 801 uvolt = sc->def->voltage_min * 1000; 802 803 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 804 nstep++) { 805 ++nval; 806 uvolt += (sc->def->voltage_step1 * 1000); 807 } 808 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 809 nstep++) { 810 ++nval; 811 uvolt += (sc->def->voltage_step2 * 1000); 812 } 813 if (uvolt > max_uvolt) 814 return (EINVAL); 815 816 *val = nval; 817 return (0); 818 } 819 820 static int 821 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 822 int max_uvolt, int *udelay) 823 { 824 struct axp8xx_reg_sc *sc; 825 uint8_t val; 826 827 sc = regnode_get_softc(regnode); 828 829 if (bootverbose) 830 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 831 regnode_get_name(regnode), 832 sc->def->name, 833 min_uvolt, max_uvolt); 834 835 if (sc->def->voltage_step1 == 0) 836 return (ENXIO); 837 838 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 839 return (ERANGE); 840 841 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 842 843 *udelay = 0; 844 845 return (0); 846 } 847 848 static int 849 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 850 { 851 struct axp8xx_reg_sc *sc; 852 uint8_t val; 853 854 sc = regnode_get_softc(regnode); 855 856 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 857 return (ENXIO); 858 859 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 860 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 861 862 return (0); 863 } 864 865 static regnode_method_t axp8xx_regnode_methods[] = { 866 /* Regulator interface */ 867 REGNODEMETHOD(regnode_init, axp8xx_regnode_init), 868 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 869 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 870 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 871 REGNODEMETHOD_END 872 }; 873 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 874 sizeof(struct axp8xx_reg_sc), regnode_class); 875 876 static void 877 axp8xx_shutdown(void *devp, int howto) 878 { 879 device_t dev; 880 881 if ((howto & RB_POWEROFF) == 0) 882 return; 883 884 dev = devp; 885 886 if (bootverbose) 887 device_printf(dev, "Shutdown Axp8xx\n"); 888 889 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 890 } 891 892 static int 893 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 894 { 895 struct axp8xx_softc *sc; 896 device_t dev = arg1; 897 enum axp8xx_sensor sensor = arg2; 898 const struct axp8xx_config *c; 899 uint8_t data; 900 int val, i, found, batt_val; 901 uint8_t lo, hi; 902 903 sc = device_get_softc(dev); 904 c = sc->config; 905 906 for (found = 0, i = 0; i < sc->nsensors; i++) { 907 if (sc->sensors[i].id == sensor) { 908 found = 1; 909 break; 910 } 911 } 912 913 if (found == 0) 914 return (ENOENT); 915 916 switch (sensor) { 917 case AXP_SENSOR_ACIN_PRESENT: 918 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 919 val = !!(data & AXP_POWERSRC_ACIN); 920 break; 921 case AXP_SENSOR_VBUS_PRESENT: 922 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 923 val = !!(data & AXP_POWERSRC_VBUS); 924 break; 925 case AXP_SENSOR_BATT_PRESENT: 926 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 927 if (data & AXP_POWERMODE_BAT_VALID) 928 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 929 } 930 break; 931 case AXP_SENSOR_BATT_CHARGING: 932 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 933 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 934 break; 935 case AXP_SENSOR_BATT_CHARGE_STATE: 936 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 937 (data & AXP_BAT_CAP_VALID) != 0) { 938 batt_val = (data & AXP_BAT_CAP_PERCENT); 939 if (batt_val <= sc->shut_thres) 940 val = BATT_CAPACITY_CRITICAL; 941 else if (batt_val <= sc->warn_thres) 942 val = BATT_CAPACITY_WARNING; 943 else 944 val = BATT_CAPACITY_NORMAL; 945 } 946 break; 947 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 948 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 949 (data & AXP_BAT_CAP_VALID) != 0) 950 val = (data & AXP_BAT_CAP_PERCENT); 951 break; 952 case AXP_SENSOR_BATT_VOLTAGE: 953 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 954 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 955 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 956 val *= c->batsense_step; 957 } 958 break; 959 case AXP_SENSOR_BATT_CHARGE_CURRENT: 960 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 961 (data & AXP_POWERSRC_CHARING) != 0 && 962 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 963 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 964 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 965 val *= c->charge_step; 966 } 967 break; 968 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 969 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 970 (data & AXP_POWERSRC_CHARING) == 0 && 971 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 972 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 973 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 974 val *= c->discharge_step; 975 } 976 break; 977 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 978 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 979 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 980 val = AXP_SENSOR_COULOMB(hi, lo); 981 val *= c->maxcap_step; 982 } 983 break; 984 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 985 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 986 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 987 val = AXP_SENSOR_COULOMB(hi, lo); 988 val *= c->coulomb_step; 989 } 990 break; 991 } 992 993 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 994 } 995 996 static void 997 axp8xx_intr(void *arg) 998 { 999 device_t dev; 1000 uint8_t val; 1001 int error; 1002 1003 dev = arg; 1004 1005 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1006 if (error != 0) 1007 return; 1008 1009 if (val) { 1010 if (bootverbose) 1011 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1012 if (val & AXP_IRQSTAT1_ACIN_HI) 1013 devctl_notify("PMU", "AC", "plugged", NULL); 1014 if (val & AXP_IRQSTAT1_ACIN_LO) 1015 devctl_notify("PMU", "AC", "unplugged", NULL); 1016 if (val & AXP_IRQSTAT1_VBUS_HI) 1017 devctl_notify("PMU", "USB", "plugged", NULL); 1018 if (val & AXP_IRQSTAT1_VBUS_LO) 1019 devctl_notify("PMU", "USB", "unplugged", NULL); 1020 /* Acknowledge */ 1021 axp8xx_write(dev, AXP_IRQSTAT1, val); 1022 } 1023 1024 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1025 if (error != 0) 1026 return; 1027 1028 if (val) { 1029 if (bootverbose) 1030 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1031 if (val & AXP_IRQSTAT2_BATCHGD) 1032 devctl_notify("PMU", "Battery", "charged", NULL); 1033 if (val & AXP_IRQSTAT2_BATCHGC) 1034 devctl_notify("PMU", "Battery", "charging", NULL); 1035 if (val & AXP_IRQSTAT2_BAT_NO) 1036 devctl_notify("PMU", "Battery", "absent", NULL); 1037 if (val & AXP_IRQSTAT2_BAT_IN) 1038 devctl_notify("PMU", "Battery", "plugged", NULL); 1039 /* Acknowledge */ 1040 axp8xx_write(dev, AXP_IRQSTAT2, val); 1041 } 1042 1043 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1044 if (error != 0) 1045 return; 1046 1047 if (val) { 1048 /* Acknowledge */ 1049 axp8xx_write(dev, AXP_IRQSTAT3, val); 1050 } 1051 1052 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1053 if (error != 0) 1054 return; 1055 1056 if (val) { 1057 if (bootverbose) 1058 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1059 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1060 devctl_notify("PMU", "Battery", "lower than level 2", NULL); 1061 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1062 devctl_notify("PMU", "Battery", "lower than level 1", NULL); 1063 /* Acknowledge */ 1064 axp8xx_write(dev, AXP_IRQSTAT4, val); 1065 } 1066 1067 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1068 if (error != 0) 1069 return; 1070 1071 if (val != 0) { 1072 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1073 if (bootverbose) 1074 device_printf(dev, "Power button pressed\n"); 1075 shutdown_nice(RB_POWEROFF); 1076 } 1077 /* Acknowledge */ 1078 axp8xx_write(dev, AXP_IRQSTAT5, val); 1079 } 1080 1081 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1082 if (error != 0) 1083 return; 1084 1085 if (val) { 1086 /* Acknowledge */ 1087 axp8xx_write(dev, AXP_IRQSTAT6, val); 1088 } 1089 } 1090 1091 static device_t 1092 axp8xx_gpio_get_bus(device_t dev) 1093 { 1094 struct axp8xx_softc *sc; 1095 1096 sc = device_get_softc(dev); 1097 1098 return (sc->gpiodev); 1099 } 1100 1101 static int 1102 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1103 { 1104 *maxpin = nitems(axp8xx_pins) - 1; 1105 1106 return (0); 1107 } 1108 1109 static int 1110 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1111 { 1112 if (pin >= nitems(axp8xx_pins)) 1113 return (EINVAL); 1114 1115 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1116 1117 return (0); 1118 } 1119 1120 static int 1121 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1122 { 1123 if (pin >= nitems(axp8xx_pins)) 1124 return (EINVAL); 1125 1126 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1127 1128 return (0); 1129 } 1130 1131 static int 1132 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1133 { 1134 struct axp8xx_softc *sc; 1135 uint8_t data, func; 1136 int error; 1137 1138 if (pin >= nitems(axp8xx_pins)) 1139 return (EINVAL); 1140 1141 sc = device_get_softc(dev); 1142 1143 AXP_LOCK(sc); 1144 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1145 if (error == 0) { 1146 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1147 if (func == AXP_GPIO_FUNC_INPUT) 1148 *flags = GPIO_PIN_INPUT; 1149 else if (func == AXP_GPIO_FUNC_DRVLO || 1150 func == AXP_GPIO_FUNC_DRVHI) 1151 *flags = GPIO_PIN_OUTPUT; 1152 else 1153 *flags = 0; 1154 } 1155 AXP_UNLOCK(sc); 1156 1157 return (error); 1158 } 1159 1160 static int 1161 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1162 { 1163 struct axp8xx_softc *sc; 1164 uint8_t data; 1165 int error; 1166 1167 if (pin >= nitems(axp8xx_pins)) 1168 return (EINVAL); 1169 1170 sc = device_get_softc(dev); 1171 1172 AXP_LOCK(sc); 1173 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1174 if (error == 0) { 1175 data &= ~AXP_GPIO_FUNC; 1176 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1177 if ((flags & GPIO_PIN_OUTPUT) == 0) 1178 data |= AXP_GPIO_FUNC_INPUT; 1179 } 1180 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1181 } 1182 AXP_UNLOCK(sc); 1183 1184 return (error); 1185 } 1186 1187 static int 1188 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1189 { 1190 struct axp8xx_softc *sc; 1191 uint8_t data, func; 1192 int error; 1193 1194 if (pin >= nitems(axp8xx_pins)) 1195 return (EINVAL); 1196 1197 sc = device_get_softc(dev); 1198 1199 AXP_LOCK(sc); 1200 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1201 if (error == 0) { 1202 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1203 switch (func) { 1204 case AXP_GPIO_FUNC_DRVLO: 1205 *val = 0; 1206 break; 1207 case AXP_GPIO_FUNC_DRVHI: 1208 *val = 1; 1209 break; 1210 case AXP_GPIO_FUNC_INPUT: 1211 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1212 if (error == 0) 1213 *val = (data & (1 << pin)) ? 1 : 0; 1214 break; 1215 default: 1216 error = EIO; 1217 break; 1218 } 1219 } 1220 AXP_UNLOCK(sc); 1221 1222 return (error); 1223 } 1224 1225 static int 1226 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1227 { 1228 struct axp8xx_softc *sc; 1229 uint8_t data, func; 1230 int error; 1231 1232 if (pin >= nitems(axp8xx_pins)) 1233 return (EINVAL); 1234 1235 sc = device_get_softc(dev); 1236 1237 AXP_LOCK(sc); 1238 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1239 if (error == 0) { 1240 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1241 switch (func) { 1242 case AXP_GPIO_FUNC_DRVLO: 1243 case AXP_GPIO_FUNC_DRVHI: 1244 data &= ~AXP_GPIO_FUNC; 1245 data |= (val << AXP_GPIO_FUNC_SHIFT); 1246 break; 1247 default: 1248 error = EIO; 1249 break; 1250 } 1251 } 1252 if (error == 0) 1253 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1254 AXP_UNLOCK(sc); 1255 1256 return (error); 1257 } 1258 1259 1260 static int 1261 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1262 { 1263 struct axp8xx_softc *sc; 1264 uint8_t data, func; 1265 int error; 1266 1267 if (pin >= nitems(axp8xx_pins)) 1268 return (EINVAL); 1269 1270 sc = device_get_softc(dev); 1271 1272 AXP_LOCK(sc); 1273 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1274 if (error == 0) { 1275 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1276 switch (func) { 1277 case AXP_GPIO_FUNC_DRVLO: 1278 data &= ~AXP_GPIO_FUNC; 1279 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1280 break; 1281 case AXP_GPIO_FUNC_DRVHI: 1282 data &= ~AXP_GPIO_FUNC; 1283 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1284 break; 1285 default: 1286 error = EIO; 1287 break; 1288 } 1289 } 1290 if (error == 0) 1291 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1292 AXP_UNLOCK(sc); 1293 1294 return (error); 1295 } 1296 1297 static int 1298 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1299 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1300 { 1301 if (gpios[0] >= nitems(axp8xx_pins)) 1302 return (EINVAL); 1303 1304 *pin = gpios[0]; 1305 *flags = gpios[1]; 1306 1307 return (0); 1308 } 1309 1310 static phandle_t 1311 axp8xx_get_node(device_t dev, device_t bus) 1312 { 1313 return (ofw_bus_get_node(dev)); 1314 } 1315 1316 static struct axp8xx_reg_sc * 1317 axp8xx_reg_attach(device_t dev, phandle_t node, 1318 struct axp8xx_regdef *def) 1319 { 1320 struct axp8xx_reg_sc *reg_sc; 1321 struct regnode_init_def initdef; 1322 struct regnode *regnode; 1323 1324 memset(&initdef, 0, sizeof(initdef)); 1325 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1326 return (NULL); 1327 if (initdef.std_param.min_uvolt == 0) 1328 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1329 if (initdef.std_param.max_uvolt == 0) 1330 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1331 initdef.id = def->id; 1332 initdef.ofw_node = node; 1333 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1334 if (regnode == NULL) { 1335 device_printf(dev, "cannot create regulator\n"); 1336 return (NULL); 1337 } 1338 1339 reg_sc = regnode_get_softc(regnode); 1340 reg_sc->regnode = regnode; 1341 reg_sc->base_dev = dev; 1342 reg_sc->def = def; 1343 reg_sc->xref = OF_xref_from_node(node); 1344 reg_sc->param = regnode_get_stdparam(regnode); 1345 1346 regnode_register(regnode); 1347 1348 return (reg_sc); 1349 } 1350 1351 static int 1352 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1353 intptr_t *num) 1354 { 1355 struct axp8xx_softc *sc; 1356 int i; 1357 1358 sc = device_get_softc(dev); 1359 for (i = 0; i < sc->nregs; i++) { 1360 if (sc->regs[i] == NULL) 1361 continue; 1362 if (sc->regs[i]->xref == xref) { 1363 *num = sc->regs[i]->def->id; 1364 return (0); 1365 } 1366 } 1367 1368 return (ENXIO); 1369 } 1370 1371 static int 1372 axp8xx_probe(device_t dev) 1373 { 1374 if (!ofw_bus_status_okay(dev)) 1375 return (ENXIO); 1376 1377 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1378 { 1379 case AXP803: 1380 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1381 break; 1382 case AXP813: 1383 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1384 break; 1385 default: 1386 return (ENXIO); 1387 } 1388 1389 return (BUS_PROBE_DEFAULT); 1390 } 1391 1392 static int 1393 axp8xx_attach(device_t dev) 1394 { 1395 struct axp8xx_softc *sc; 1396 struct axp8xx_reg_sc *reg; 1397 uint8_t chip_id, val; 1398 phandle_t rnode, child; 1399 int error, i; 1400 1401 sc = device_get_softc(dev); 1402 1403 sc->addr = iicbus_get_addr(dev); 1404 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1405 1406 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1407 if (error != 0) { 1408 device_printf(dev, "cannot allocate resources for device\n"); 1409 return (error); 1410 } 1411 1412 if (bootverbose) { 1413 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1414 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1415 } 1416 1417 sc->nregs = nitems(axp8xx_common_regdefs); 1418 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1419 switch (sc->type) { 1420 case AXP803: 1421 sc->nregs += nitems(axp803_regdefs); 1422 break; 1423 case AXP813: 1424 sc->nregs += nitems(axp813_regdefs); 1425 break; 1426 } 1427 sc->config = &axp803_config; 1428 sc->sensors = axp8xx_common_sensors; 1429 sc->nsensors = nitems(axp8xx_common_sensors); 1430 1431 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1432 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1433 1434 /* Attach known regulators that exist in the DT */ 1435 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1436 if (rnode > 0) { 1437 for (i = 0; i < sc->nregs; i++) { 1438 char *regname; 1439 struct axp8xx_regdef *regdef; 1440 1441 if (i <= nitems(axp8xx_common_regdefs)) { 1442 regname = axp8xx_common_regdefs[i].name; 1443 regdef = &axp8xx_common_regdefs[i]; 1444 } else { 1445 int off; 1446 1447 off = i - nitems(axp8xx_common_regdefs); 1448 switch (sc->type) { 1449 case AXP803: 1450 regname = axp803_regdefs[off].name; 1451 regdef = &axp803_regdefs[off]; 1452 break; 1453 case AXP813: 1454 regname = axp813_regdefs[off].name; 1455 regdef = &axp813_regdefs[off]; 1456 break; 1457 } 1458 } 1459 child = ofw_bus_find_child(rnode, 1460 regname); 1461 if (child == 0) 1462 continue; 1463 reg = axp8xx_reg_attach(dev, child, 1464 regdef); 1465 if (reg == NULL) { 1466 device_printf(dev, 1467 "cannot attach regulator %s\n", 1468 regname); 1469 continue; 1470 } 1471 sc->regs[i] = reg; 1472 } 1473 } 1474 1475 /* Add sensors */ 1476 for (i = 0; i < sc->nsensors; i++) { 1477 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1478 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1479 OID_AUTO, sc->sensors[i].name, 1480 CTLTYPE_INT | CTLFLAG_RD, 1481 dev, sc->sensors[i].id, axp8xx_sysctl, 1482 sc->sensors[i].format, 1483 sc->sensors[i].desc); 1484 } 1485 1486 /* Get thresholds */ 1487 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1488 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1489 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1490 if (bootverbose) { 1491 device_printf(dev, 1492 "Raw reg val: 0x%02x\n", val); 1493 device_printf(dev, 1494 "Warning threshold: 0x%02x\n", sc->warn_thres); 1495 device_printf(dev, 1496 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1497 } 1498 } 1499 1500 /* Enable interrupts */ 1501 axp8xx_write(dev, AXP_IRQEN1, 1502 AXP_IRQEN1_VBUS_LO | 1503 AXP_IRQEN1_VBUS_HI | 1504 AXP_IRQEN1_ACIN_LO | 1505 AXP_IRQEN1_ACIN_HI); 1506 axp8xx_write(dev, AXP_IRQEN2, 1507 AXP_IRQEN2_BATCHGD | 1508 AXP_IRQEN2_BATCHGC | 1509 AXP_IRQEN2_BAT_NO | 1510 AXP_IRQEN2_BAT_IN); 1511 axp8xx_write(dev, AXP_IRQEN3, 0); 1512 axp8xx_write(dev, AXP_IRQEN4, 1513 AXP_IRQEN4_BATLVL_LO0 | 1514 AXP_IRQEN4_BATLVL_LO1); 1515 axp8xx_write(dev, AXP_IRQEN5, 1516 AXP_IRQEN5_POKSIRQ | 1517 AXP_IRQEN5_POKLIRQ); 1518 axp8xx_write(dev, AXP_IRQEN6, 0); 1519 1520 /* Install interrupt handler */ 1521 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1522 NULL, axp8xx_intr, dev, &sc->ih); 1523 if (error != 0) { 1524 device_printf(dev, "cannot setup interrupt handler\n"); 1525 return (error); 1526 } 1527 1528 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1529 SHUTDOWN_PRI_LAST); 1530 1531 sc->gpiodev = gpiobus_attach_bus(dev); 1532 1533 return (0); 1534 } 1535 1536 static device_method_t axp8xx_methods[] = { 1537 /* Device interface */ 1538 DEVMETHOD(device_probe, axp8xx_probe), 1539 DEVMETHOD(device_attach, axp8xx_attach), 1540 1541 /* GPIO interface */ 1542 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1543 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1544 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1545 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1546 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1547 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1548 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1549 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1550 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1551 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1552 1553 /* Regdev interface */ 1554 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1555 1556 /* OFW bus interface */ 1557 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1558 1559 DEVMETHOD_END 1560 }; 1561 1562 static driver_t axp8xx_driver = { 1563 "axp8xx_pmu", 1564 axp8xx_methods, 1565 sizeof(struct axp8xx_softc), 1566 }; 1567 1568 static devclass_t axp8xx_devclass; 1569 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 1570 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1571 1572 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0, 1573 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1574 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 1575 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1576 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0); 1577 MODULE_VERSION(axp8xx, 1); 1578 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1579