1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/eventhandler.h> 37 #include <sys/bus.h> 38 #include <sys/rman.h> 39 #include <sys/kernel.h> 40 #include <sys/reboot.h> 41 #include <sys/gpio.h> 42 #include <sys/module.h> 43 #include <machine/bus.h> 44 45 #include <dev/iicbus/iicbus.h> 46 #include <dev/iicbus/iiconf.h> 47 48 #include <dev/gpio/gpiobusvar.h> 49 50 #include <dev/ofw/ofw_bus.h> 51 #include <dev/ofw/ofw_bus_subr.h> 52 53 #include <dev/extres/regulator/regulator.h> 54 55 #include "gpio_if.h" 56 #include "iicbus_if.h" 57 #include "regdev_if.h" 58 59 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 60 61 #define AXP_POWERSRC 0x00 62 #define AXP_POWERSRC_ACIN (1 << 7) 63 #define AXP_POWERSRC_VBUS (1 << 5) 64 #define AXP_POWERSRC_VBAT (1 << 3) 65 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 66 #define AXP_POWERSRC_SHORTED (1 << 1) 67 #define AXP_POWERSRC_STARTUP (1 << 0) 68 #define AXP_POWERMODE 0x01 69 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 70 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 71 #define AXP_POWERMODE_BAT_VALID (1 << 4) 72 #define AXP_ICTYPE 0x03 73 #define AXP_POWERCTL1 0x10 74 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 75 #define AXP_POWERCTL1_DCDC6 (1 << 5) 76 #define AXP_POWERCTL1_DCDC5 (1 << 4) 77 #define AXP_POWERCTL1_DCDC4 (1 << 3) 78 #define AXP_POWERCTL1_DCDC3 (1 << 2) 79 #define AXP_POWERCTL1_DCDC2 (1 << 1) 80 #define AXP_POWERCTL1_DCDC1 (1 << 0) 81 #define AXP_POWERCTL2 0x12 82 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 83 #define AXP_POWERCTL2_DLDO4 (1 << 6) 84 #define AXP_POWERCTL2_DLDO3 (1 << 5) 85 #define AXP_POWERCTL2_DLDO2 (1 << 4) 86 #define AXP_POWERCTL2_DLDO1 (1 << 3) 87 #define AXP_POWERCTL2_ELDO3 (1 << 2) 88 #define AXP_POWERCTL2_ELDO2 (1 << 1) 89 #define AXP_POWERCTL2_ELDO1 (1 << 0) 90 #define AXP_POWERCTL3 0x13 91 #define AXP_POWERCTL3_ALDO3 (1 << 7) 92 #define AXP_POWERCTL3_ALDO2 (1 << 6) 93 #define AXP_POWERCTL3_ALDO1 (1 << 5) 94 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 95 #define AXP_POWERCTL3_FLDO2 (1 << 3) 96 #define AXP_POWERCTL3_FLDO1 (1 << 2) 97 #define AXP_VOLTCTL_DLDO1 0x15 98 #define AXP_VOLTCTL_DLDO2 0x16 99 #define AXP_VOLTCTL_DLDO3 0x17 100 #define AXP_VOLTCTL_DLDO4 0x18 101 #define AXP_VOLTCTL_ELDO1 0x19 102 #define AXP_VOLTCTL_ELDO2 0x1A 103 #define AXP_VOLTCTL_ELDO3 0x1B 104 #define AXP_VOLTCTL_FLDO1 0x1C 105 #define AXP_VOLTCTL_FLDO2 0x1D 106 #define AXP_VOLTCTL_DCDC1 0x20 107 #define AXP_VOLTCTL_DCDC2 0x21 108 #define AXP_VOLTCTL_DCDC3 0x22 109 #define AXP_VOLTCTL_DCDC4 0x23 110 #define AXP_VOLTCTL_DCDC5 0x24 111 #define AXP_VOLTCTL_DCDC6 0x25 112 #define AXP_VOLTCTL_DCDC7 0x26 113 #define AXP_VOLTCTL_ALDO1 0x28 114 #define AXP_VOLTCTL_ALDO2 0x29 115 #define AXP_VOLTCTL_ALDO3 0x2A 116 #define AXP_VOLTCTL_STATUS (1 << 7) 117 #define AXP_VOLTCTL_MASK 0x7f 118 #define AXP_POWERBAT 0x32 119 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 120 #define AXP_CHARGERCTL1 0x33 121 #define AXP_CHARGERCTL1_MIN 0 122 #define AXP_CHARGERCTL1_MAX 13 123 #define AXP_CHARGERCTL1_CMASK 0xf 124 #define AXP_IRQEN1 0x40 125 #define AXP_IRQEN1_ACIN_HI (1 << 6) 126 #define AXP_IRQEN1_ACIN_LO (1 << 5) 127 #define AXP_IRQEN1_VBUS_HI (1 << 3) 128 #define AXP_IRQEN1_VBUS_LO (1 << 2) 129 #define AXP_IRQEN2 0x41 130 #define AXP_IRQEN2_BAT_IN (1 << 7) 131 #define AXP_IRQEN2_BAT_NO (1 << 6) 132 #define AXP_IRQEN2_BATCHGC (1 << 3) 133 #define AXP_IRQEN2_BATCHGD (1 << 2) 134 #define AXP_IRQEN3 0x42 135 #define AXP_IRQEN4 0x43 136 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 137 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 138 #define AXP_IRQEN5 0x44 139 #define AXP_IRQEN5_POKSIRQ (1 << 4) 140 #define AXP_IRQEN5_POKLIRQ (1 << 3) 141 #define AXP_IRQEN6 0x45 142 #define AXP_IRQSTAT1 0x48 143 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 144 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 145 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 146 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 147 #define AXP_IRQSTAT2 0x49 148 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 149 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 150 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 151 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 152 #define AXP_IRQSTAT3 0x4a 153 #define AXP_IRQSTAT4 0x4b 154 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 155 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 156 #define AXP_IRQSTAT5 0x4c 157 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 158 #define AXP_IRQEN5_POKLIRQ (1 << 3) 159 #define AXP_IRQSTAT6 0x4d 160 #define AXP_BATSENSE_HI 0x78 161 #define AXP_BATSENSE_LO 0x79 162 #define AXP_BATCHG_HI 0x7a 163 #define AXP_BATCHG_LO 0x7b 164 #define AXP_BATDISCHG_HI 0x7c 165 #define AXP_BATDISCHG_LO 0x7d 166 #define AXP_GPIO0_CTRL 0x90 167 #define AXP_GPIO0LDO_CTRL 0x91 168 #define AXP_GPIO1_CTRL 0x92 169 #define AXP_GPIO1LDO_CTRL 0x93 170 #define AXP_GPIO_FUNC (0x7 << 0) 171 #define AXP_GPIO_FUNC_SHIFT 0 172 #define AXP_GPIO_FUNC_DRVLO 0 173 #define AXP_GPIO_FUNC_DRVHI 1 174 #define AXP_GPIO_FUNC_INPUT 2 175 #define AXP_GPIO_FUNC_LDO_ON 3 176 #define AXP_GPIO_FUNC_LDO_OFF 4 177 #define AXP_GPIO_SIGBIT 0x94 178 #define AXP_GPIO_PD 0x97 179 #define AXP_FUEL_GAUGECTL 0xb8 180 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 181 182 #define AXP_BAT_CAP 0xb9 183 #define AXP_BAT_CAP_VALID (1 << 7) 184 #define AXP_BAT_CAP_PERCENT 0x7f 185 186 #define AXP_BAT_MAX_CAP_HI 0xe0 187 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 188 #define AXP_BAT_MAX_CAP_LO 0xe1 189 190 #define AXP_BAT_COULOMB_HI 0xe2 191 #define AXP_BAT_COULOMB_VALID (1 << 7) 192 #define AXP_BAT_COULOMB_LO 0xe3 193 194 #define AXP_BAT_CAP_WARN 0xe6 195 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 196 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */ 197 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 198 199 /* Sensor conversion macros */ 200 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 201 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 202 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 203 204 static const struct { 205 const char *name; 206 uint8_t ctrl_reg; 207 } axp8xx_pins[] = { 208 { "GPIO0", AXP_GPIO0_CTRL }, 209 { "GPIO1", AXP_GPIO1_CTRL }, 210 }; 211 212 enum AXP8XX_TYPE { 213 AXP803 = 1, 214 AXP813, 215 }; 216 217 static struct ofw_compat_data compat_data[] = { 218 { "x-powers,axp803", AXP803 }, 219 { "x-powers,axp813", AXP813 }, 220 { "x-powers,axp818", AXP813 }, 221 { NULL, 0 } 222 }; 223 224 static struct resource_spec axp8xx_spec[] = { 225 { SYS_RES_IRQ, 0, RF_ACTIVE }, 226 { -1, 0 } 227 }; 228 229 struct axp8xx_regdef { 230 intptr_t id; 231 char *name; 232 char *supply_name; 233 uint8_t enable_reg; 234 uint8_t enable_mask; 235 uint8_t enable_value; 236 uint8_t disable_value; 237 uint8_t voltage_reg; 238 int voltage_min; 239 int voltage_max; 240 int voltage_step1; 241 int voltage_nstep1; 242 int voltage_step2; 243 int voltage_nstep2; 244 }; 245 246 enum axp8xx_reg_id { 247 AXP8XX_REG_ID_DCDC1 = 100, 248 AXP8XX_REG_ID_DCDC2, 249 AXP8XX_REG_ID_DCDC3, 250 AXP8XX_REG_ID_DCDC4, 251 AXP8XX_REG_ID_DCDC5, 252 AXP8XX_REG_ID_DCDC6, 253 AXP813_REG_ID_DCDC7, 254 AXP803_REG_ID_DC1SW, 255 AXP8XX_REG_ID_DLDO1, 256 AXP8XX_REG_ID_DLDO2, 257 AXP8XX_REG_ID_DLDO3, 258 AXP8XX_REG_ID_DLDO4, 259 AXP8XX_REG_ID_ELDO1, 260 AXP8XX_REG_ID_ELDO2, 261 AXP8XX_REG_ID_ELDO3, 262 AXP8XX_REG_ID_ALDO1, 263 AXP8XX_REG_ID_ALDO2, 264 AXP8XX_REG_ID_ALDO3, 265 AXP8XX_REG_ID_FLDO1, 266 AXP8XX_REG_ID_FLDO2, 267 AXP813_REG_ID_FLDO3, 268 AXP8XX_REG_ID_GPIO0_LDO, 269 AXP8XX_REG_ID_GPIO1_LDO, 270 }; 271 272 static struct axp8xx_regdef axp803_regdefs[] = { 273 { 274 .id = AXP803_REG_ID_DC1SW, 275 .name = "dc1sw", 276 .enable_reg = AXP_POWERCTL2, 277 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 278 .enable_value = AXP_POWERCTL2_DC1SW, 279 }, 280 }; 281 282 static struct axp8xx_regdef axp813_regdefs[] = { 283 { 284 .id = AXP813_REG_ID_DCDC7, 285 .name = "dcdc7", 286 .enable_reg = AXP_POWERCTL1, 287 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 288 .enable_value = AXP_POWERCTL1_DCDC7, 289 .voltage_reg = AXP_VOLTCTL_DCDC7, 290 .voltage_min = 600, 291 .voltage_max = 1520, 292 .voltage_step1 = 10, 293 .voltage_nstep1 = 50, 294 .voltage_step2 = 20, 295 .voltage_nstep2 = 21, 296 }, 297 }; 298 299 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 300 { 301 .id = AXP8XX_REG_ID_DCDC1, 302 .name = "dcdc1", 303 .enable_reg = AXP_POWERCTL1, 304 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 305 .enable_value = AXP_POWERCTL1_DCDC1, 306 .voltage_reg = AXP_VOLTCTL_DCDC1, 307 .voltage_min = 1600, 308 .voltage_max = 3400, 309 .voltage_step1 = 100, 310 .voltage_nstep1 = 18, 311 }, 312 { 313 .id = AXP8XX_REG_ID_DCDC2, 314 .name = "dcdc2", 315 .enable_reg = AXP_POWERCTL1, 316 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 317 .enable_value = AXP_POWERCTL1_DCDC2, 318 .voltage_reg = AXP_VOLTCTL_DCDC2, 319 .voltage_min = 500, 320 .voltage_max = 1300, 321 .voltage_step1 = 10, 322 .voltage_nstep1 = 70, 323 .voltage_step2 = 20, 324 .voltage_nstep2 = 5, 325 }, 326 { 327 .id = AXP8XX_REG_ID_DCDC3, 328 .name = "dcdc3", 329 .enable_reg = AXP_POWERCTL1, 330 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 331 .enable_value = AXP_POWERCTL1_DCDC3, 332 .voltage_reg = AXP_VOLTCTL_DCDC3, 333 .voltage_min = 500, 334 .voltage_max = 1300, 335 .voltage_step1 = 10, 336 .voltage_nstep1 = 70, 337 .voltage_step2 = 20, 338 .voltage_nstep2 = 5, 339 }, 340 { 341 .id = AXP8XX_REG_ID_DCDC4, 342 .name = "dcdc4", 343 .enable_reg = AXP_POWERCTL1, 344 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 345 .enable_value = AXP_POWERCTL1_DCDC4, 346 .voltage_reg = AXP_VOLTCTL_DCDC4, 347 .voltage_min = 500, 348 .voltage_max = 1300, 349 .voltage_step1 = 10, 350 .voltage_nstep1 = 70, 351 .voltage_step2 = 20, 352 .voltage_nstep2 = 5, 353 }, 354 { 355 .id = AXP8XX_REG_ID_DCDC5, 356 .name = "dcdc5", 357 .enable_reg = AXP_POWERCTL1, 358 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 359 .enable_value = AXP_POWERCTL1_DCDC5, 360 .voltage_reg = AXP_VOLTCTL_DCDC5, 361 .voltage_min = 800, 362 .voltage_max = 1840, 363 .voltage_step1 = 10, 364 .voltage_nstep1 = 42, 365 .voltage_step2 = 20, 366 .voltage_nstep2 = 36, 367 }, 368 { 369 .id = AXP8XX_REG_ID_DCDC6, 370 .name = "dcdc6", 371 .enable_reg = AXP_POWERCTL1, 372 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 373 .enable_value = AXP_POWERCTL1_DCDC6, 374 .voltage_reg = AXP_VOLTCTL_DCDC6, 375 .voltage_min = 600, 376 .voltage_max = 1520, 377 .voltage_step1 = 10, 378 .voltage_nstep1 = 50, 379 .voltage_step2 = 20, 380 .voltage_nstep2 = 21, 381 }, 382 { 383 .id = AXP8XX_REG_ID_DLDO1, 384 .name = "dldo1", 385 .enable_reg = AXP_POWERCTL2, 386 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 387 .enable_value = AXP_POWERCTL2_DLDO1, 388 .voltage_reg = AXP_VOLTCTL_DLDO1, 389 .voltage_min = 700, 390 .voltage_max = 3300, 391 .voltage_step1 = 100, 392 .voltage_nstep1 = 26, 393 }, 394 { 395 .id = AXP8XX_REG_ID_DLDO2, 396 .name = "dldo2", 397 .enable_reg = AXP_POWERCTL2, 398 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 399 .enable_value = AXP_POWERCTL2_DLDO2, 400 .voltage_reg = AXP_VOLTCTL_DLDO2, 401 .voltage_min = 700, 402 .voltage_max = 4200, 403 .voltage_step1 = 100, 404 .voltage_nstep1 = 27, 405 .voltage_step2 = 200, 406 .voltage_nstep2 = 4, 407 }, 408 { 409 .id = AXP8XX_REG_ID_DLDO3, 410 .name = "dldo3", 411 .enable_reg = AXP_POWERCTL2, 412 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 413 .enable_value = AXP_POWERCTL2_DLDO3, 414 .voltage_reg = AXP_VOLTCTL_DLDO3, 415 .voltage_min = 700, 416 .voltage_max = 3300, 417 .voltage_step1 = 100, 418 .voltage_nstep1 = 26, 419 }, 420 { 421 .id = AXP8XX_REG_ID_DLDO4, 422 .name = "dldo4", 423 .enable_reg = AXP_POWERCTL2, 424 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 425 .enable_value = AXP_POWERCTL2_DLDO4, 426 .voltage_reg = AXP_VOLTCTL_DLDO4, 427 .voltage_min = 700, 428 .voltage_max = 3300, 429 .voltage_step1 = 100, 430 .voltage_nstep1 = 26, 431 }, 432 { 433 .id = AXP8XX_REG_ID_ALDO1, 434 .name = "aldo1", 435 .enable_reg = AXP_POWERCTL3, 436 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 437 .enable_value = AXP_POWERCTL3_ALDO1, 438 .voltage_reg = AXP_VOLTCTL_ALDO1, 439 .voltage_min = 700, 440 .voltage_max = 3300, 441 .voltage_step1 = 100, 442 .voltage_nstep1 = 26, 443 }, 444 { 445 .id = AXP8XX_REG_ID_ALDO2, 446 .name = "aldo2", 447 .enable_reg = AXP_POWERCTL3, 448 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 449 .enable_value = AXP_POWERCTL3_ALDO2, 450 .voltage_reg = AXP_VOLTCTL_ALDO2, 451 .voltage_min = 700, 452 .voltage_max = 3300, 453 .voltage_step1 = 100, 454 .voltage_nstep1 = 26, 455 }, 456 { 457 .id = AXP8XX_REG_ID_ALDO3, 458 .name = "aldo3", 459 .enable_reg = AXP_POWERCTL3, 460 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 461 .enable_value = AXP_POWERCTL3_ALDO3, 462 .voltage_reg = AXP_VOLTCTL_ALDO3, 463 .voltage_min = 700, 464 .voltage_max = 3300, 465 .voltage_step1 = 100, 466 .voltage_nstep1 = 26, 467 }, 468 { 469 .id = AXP8XX_REG_ID_ELDO1, 470 .name = "eldo1", 471 .enable_reg = AXP_POWERCTL2, 472 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 473 .enable_value = AXP_POWERCTL2_ELDO1, 474 .voltage_reg = AXP_VOLTCTL_ELDO1, 475 .voltage_min = 700, 476 .voltage_max = 1900, 477 .voltage_step1 = 50, 478 .voltage_nstep1 = 24, 479 }, 480 { 481 .id = AXP8XX_REG_ID_ELDO2, 482 .name = "eldo2", 483 .enable_reg = AXP_POWERCTL2, 484 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 485 .enable_value = AXP_POWERCTL2_ELDO2, 486 .voltage_reg = AXP_VOLTCTL_ELDO2, 487 .voltage_min = 700, 488 .voltage_max = 1900, 489 .voltage_step1 = 50, 490 .voltage_nstep1 = 24, 491 }, 492 { 493 .id = AXP8XX_REG_ID_ELDO3, 494 .name = "eldo3", 495 .enable_reg = AXP_POWERCTL2, 496 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 497 .enable_value = AXP_POWERCTL2_ELDO3, 498 .voltage_reg = AXP_VOLTCTL_ELDO3, 499 .voltage_min = 700, 500 .voltage_max = 1900, 501 .voltage_step1 = 50, 502 .voltage_nstep1 = 24, 503 }, 504 { 505 .id = AXP8XX_REG_ID_FLDO1, 506 .name = "fldo1", 507 .enable_reg = AXP_POWERCTL3, 508 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 509 .enable_value = AXP_POWERCTL3_FLDO1, 510 .voltage_reg = AXP_VOLTCTL_FLDO1, 511 .voltage_min = 700, 512 .voltage_max = 1450, 513 .voltage_step1 = 50, 514 .voltage_nstep1 = 15, 515 }, 516 { 517 .id = AXP8XX_REG_ID_FLDO2, 518 .name = "fldo2", 519 .enable_reg = AXP_POWERCTL3, 520 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 521 .enable_value = AXP_POWERCTL3_FLDO2, 522 .voltage_reg = AXP_VOLTCTL_FLDO2, 523 .voltage_min = 700, 524 .voltage_max = 1450, 525 .voltage_step1 = 50, 526 .voltage_nstep1 = 15, 527 }, 528 { 529 .id = AXP8XX_REG_ID_GPIO0_LDO, 530 .name = "ldo-io0", 531 .enable_reg = AXP_GPIO0_CTRL, 532 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 533 .enable_value = AXP_GPIO_FUNC_LDO_ON, 534 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 535 .voltage_reg = AXP_GPIO0LDO_CTRL, 536 .voltage_min = 700, 537 .voltage_max = 3300, 538 .voltage_step1 = 100, 539 .voltage_nstep1 = 26, 540 }, 541 { 542 .id = AXP8XX_REG_ID_GPIO1_LDO, 543 .name = "ldo-io1", 544 .enable_reg = AXP_GPIO1_CTRL, 545 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 546 .enable_value = AXP_GPIO_FUNC_LDO_ON, 547 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 548 .voltage_reg = AXP_GPIO1LDO_CTRL, 549 .voltage_min = 700, 550 .voltage_max = 3300, 551 .voltage_step1 = 100, 552 .voltage_nstep1 = 26, 553 }, 554 }; 555 556 enum axp8xx_sensor { 557 AXP_SENSOR_ACIN_PRESENT, 558 AXP_SENSOR_VBUS_PRESENT, 559 AXP_SENSOR_BATT_PRESENT, 560 AXP_SENSOR_BATT_CHARGING, 561 AXP_SENSOR_BATT_CHARGE_STATE, 562 AXP_SENSOR_BATT_VOLTAGE, 563 AXP_SENSOR_BATT_CHARGE_CURRENT, 564 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 565 AXP_SENSOR_BATT_CAPACITY_PERCENT, 566 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 567 AXP_SENSOR_BATT_CURRENT_CAPACITY, 568 }; 569 570 enum battery_capacity_state { 571 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 572 BATT_CAPACITY_WARNING, /* warning cap in battery */ 573 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 574 BATT_CAPACITY_HIGH, /* high cap in battery */ 575 BATT_CAPACITY_MAX, /* maximum cap in battery */ 576 BATT_CAPACITY_LOW /* low cap in battery */ 577 }; 578 579 struct axp8xx_sensors { 580 int id; 581 const char *name; 582 const char *desc; 583 const char *format; 584 }; 585 586 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 587 { 588 .id = AXP_SENSOR_ACIN_PRESENT, 589 .name = "acin", 590 .format = "I", 591 .desc = "ACIN Present", 592 }, 593 { 594 .id = AXP_SENSOR_VBUS_PRESENT, 595 .name = "vbus", 596 .format = "I", 597 .desc = "VBUS Present", 598 }, 599 { 600 .id = AXP_SENSOR_BATT_PRESENT, 601 .name = "bat", 602 .format = "I", 603 .desc = "Battery Present", 604 }, 605 { 606 .id = AXP_SENSOR_BATT_CHARGING, 607 .name = "batcharging", 608 .format = "I", 609 .desc = "Battery Charging", 610 }, 611 { 612 .id = AXP_SENSOR_BATT_CHARGE_STATE, 613 .name = "batchargestate", 614 .format = "I", 615 .desc = "Battery Charge State", 616 }, 617 { 618 .id = AXP_SENSOR_BATT_VOLTAGE, 619 .name = "batvolt", 620 .format = "I", 621 .desc = "Battery Voltage", 622 }, 623 { 624 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 625 .name = "batchargecurrent", 626 .format = "I", 627 .desc = "Average Battery Charging Current", 628 }, 629 { 630 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 631 .name = "batdischargecurrent", 632 .format = "I", 633 .desc = "Average Battery Discharging Current", 634 }, 635 { 636 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 637 .name = "batcapacitypercent", 638 .format = "I", 639 .desc = "Battery Capacity Percentage", 640 }, 641 { 642 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 643 .name = "batmaxcapacity", 644 .format = "I", 645 .desc = "Battery Maximum Capacity", 646 }, 647 { 648 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 649 .name = "batcurrentcapacity", 650 .format = "I", 651 .desc = "Battery Current Capacity", 652 }, 653 }; 654 655 struct axp8xx_config { 656 const char *name; 657 int batsense_step; /* uV */ 658 int charge_step; /* uA */ 659 int discharge_step; /* uA */ 660 int maxcap_step; /* uAh */ 661 int coulomb_step; /* uAh */ 662 }; 663 664 static struct axp8xx_config axp803_config = { 665 .name = "AXP803", 666 .batsense_step = 1100, 667 .charge_step = 1000, 668 .discharge_step = 1000, 669 .maxcap_step = 1456, 670 .coulomb_step = 1456, 671 }; 672 673 struct axp8xx_softc; 674 675 struct axp8xx_reg_sc { 676 struct regnode *regnode; 677 device_t base_dev; 678 struct axp8xx_regdef *def; 679 phandle_t xref; 680 struct regnode_std_param *param; 681 }; 682 683 struct axp8xx_softc { 684 struct resource *res; 685 uint16_t addr; 686 void *ih; 687 device_t gpiodev; 688 struct mtx mtx; 689 int busy; 690 691 int type; 692 693 /* Configs */ 694 const struct axp8xx_config *config; 695 696 /* Sensors */ 697 const struct axp8xx_sensors *sensors; 698 int nsensors; 699 700 /* Regulators */ 701 struct axp8xx_reg_sc **regs; 702 int nregs; 703 704 /* Warning, shutdown thresholds */ 705 int warn_thres; 706 int shut_thres; 707 }; 708 709 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 710 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 711 static int axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 712 int max_uvolt, int *udelay); 713 714 static int 715 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 716 { 717 struct axp8xx_softc *sc; 718 struct iic_msg msg[2]; 719 720 sc = device_get_softc(dev); 721 722 msg[0].slave = sc->addr; 723 msg[0].flags = IIC_M_WR; 724 msg[0].len = 1; 725 msg[0].buf = ® 726 727 msg[1].slave = sc->addr; 728 msg[1].flags = IIC_M_RD; 729 msg[1].len = size; 730 msg[1].buf = data; 731 732 return (iicbus_transfer(dev, msg, 2)); 733 } 734 735 static int 736 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 737 { 738 struct axp8xx_softc *sc; 739 struct iic_msg msg[2]; 740 741 sc = device_get_softc(dev); 742 743 msg[0].slave = sc->addr; 744 msg[0].flags = IIC_M_WR; 745 msg[0].len = 1; 746 msg[0].buf = ® 747 748 msg[1].slave = sc->addr; 749 msg[1].flags = IIC_M_WR; 750 msg[1].len = 1; 751 msg[1].buf = &val; 752 753 return (iicbus_transfer(dev, msg, 2)); 754 } 755 756 static int 757 axp8xx_regnode_init(struct regnode *regnode) 758 { 759 struct regnode_std_param *param; 760 int rv, udelay; 761 762 param = regnode_get_stdparam(regnode); 763 if (param->min_uvolt == 0) 764 return (0); 765 766 /* 767 * Set the regulator at the correct voltage 768 * Do not enable it, this is will be done either by a 769 * consumer or by regnode_set_constraint if boot_on is true 770 */ 771 rv = axp8xx_regnode_set_voltage(regnode, param->min_uvolt, 772 param->max_uvolt, &udelay); 773 if (rv != 0) 774 DELAY(udelay); 775 776 return (rv); 777 } 778 779 static int 780 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 781 { 782 struct axp8xx_reg_sc *sc; 783 uint8_t val; 784 785 sc = regnode_get_softc(regnode); 786 787 if (bootverbose) 788 device_printf(sc->base_dev, "%sable %s (%s)\n", 789 enable ? "En" : "Dis", 790 regnode_get_name(regnode), 791 sc->def->name); 792 793 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 794 val &= ~sc->def->enable_mask; 795 if (enable) 796 val |= sc->def->enable_value; 797 else { 798 if (sc->def->disable_value) 799 val |= sc->def->disable_value; 800 else 801 val &= ~sc->def->enable_value; 802 } 803 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 804 805 *udelay = 0; 806 807 return (0); 808 } 809 810 static void 811 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 812 { 813 if (val < sc->def->voltage_nstep1) 814 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 815 else 816 *uv = sc->def->voltage_min + 817 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 818 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 819 *uv *= 1000; 820 } 821 822 static int 823 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 824 int max_uvolt, uint8_t *val) 825 { 826 uint8_t nval; 827 int nstep, uvolt; 828 829 nval = 0; 830 uvolt = sc->def->voltage_min * 1000; 831 832 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 833 nstep++) { 834 ++nval; 835 uvolt += (sc->def->voltage_step1 * 1000); 836 } 837 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 838 nstep++) { 839 ++nval; 840 uvolt += (sc->def->voltage_step2 * 1000); 841 } 842 if (uvolt > max_uvolt) 843 return (EINVAL); 844 845 *val = nval; 846 return (0); 847 } 848 849 static int 850 axp8xx_regnode_status(struct regnode *regnode, int *status) 851 { 852 struct axp8xx_reg_sc *sc; 853 uint8_t val; 854 855 sc = regnode_get_softc(regnode); 856 857 *status = 0; 858 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 859 if (val & sc->def->enable_mask) 860 *status = REGULATOR_STATUS_ENABLED; 861 862 return (0); 863 } 864 865 static int 866 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 867 int max_uvolt, int *udelay) 868 { 869 struct axp8xx_reg_sc *sc; 870 uint8_t val; 871 872 sc = regnode_get_softc(regnode); 873 874 if (bootverbose) 875 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 876 regnode_get_name(regnode), 877 sc->def->name, 878 min_uvolt, max_uvolt); 879 880 if (sc->def->voltage_step1 == 0) 881 return (ENXIO); 882 883 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 884 return (ERANGE); 885 886 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 887 888 *udelay = 0; 889 890 return (0); 891 } 892 893 static int 894 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 895 { 896 struct axp8xx_reg_sc *sc; 897 uint8_t val; 898 899 sc = regnode_get_softc(regnode); 900 901 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 902 return (ENXIO); 903 904 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 905 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 906 907 return (0); 908 } 909 910 static regnode_method_t axp8xx_regnode_methods[] = { 911 /* Regulator interface */ 912 REGNODEMETHOD(regnode_init, axp8xx_regnode_init), 913 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 914 REGNODEMETHOD(regnode_status, axp8xx_regnode_status), 915 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 916 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 917 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage), 918 REGNODEMETHOD_END 919 }; 920 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 921 sizeof(struct axp8xx_reg_sc), regnode_class); 922 923 static void 924 axp8xx_shutdown(void *devp, int howto) 925 { 926 device_t dev; 927 928 if ((howto & RB_POWEROFF) == 0) 929 return; 930 931 dev = devp; 932 933 if (bootverbose) 934 device_printf(dev, "Shutdown Axp8xx\n"); 935 936 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 937 } 938 939 static int 940 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 941 { 942 device_t dev = arg1; 943 uint8_t data; 944 int val, error; 945 946 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 947 if (error != 0) 948 return (error); 949 950 if (bootverbose) 951 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 952 val = (data & AXP_CHARGERCTL1_CMASK); 953 error = sysctl_handle_int(oidp, &val, 0, req); 954 if (error || !req->newptr) /* error || read request */ 955 return (error); 956 957 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 958 return (EINVAL); 959 960 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 961 axp8xx_write(dev, AXP_CHARGERCTL1, val); 962 963 return (0); 964 } 965 966 static int 967 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 968 { 969 struct axp8xx_softc *sc; 970 device_t dev = arg1; 971 enum axp8xx_sensor sensor = arg2; 972 const struct axp8xx_config *c; 973 uint8_t data; 974 int val, i, found, batt_val; 975 uint8_t lo, hi; 976 977 sc = device_get_softc(dev); 978 c = sc->config; 979 980 for (found = 0, i = 0; i < sc->nsensors; i++) { 981 if (sc->sensors[i].id == sensor) { 982 found = 1; 983 break; 984 } 985 } 986 987 if (found == 0) 988 return (ENOENT); 989 990 switch (sensor) { 991 case AXP_SENSOR_ACIN_PRESENT: 992 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 993 val = !!(data & AXP_POWERSRC_ACIN); 994 break; 995 case AXP_SENSOR_VBUS_PRESENT: 996 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 997 val = !!(data & AXP_POWERSRC_VBUS); 998 break; 999 case AXP_SENSOR_BATT_PRESENT: 1000 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 1001 if (data & AXP_POWERMODE_BAT_VALID) 1002 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 1003 } 1004 break; 1005 case AXP_SENSOR_BATT_CHARGING: 1006 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 1007 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 1008 break; 1009 case AXP_SENSOR_BATT_CHARGE_STATE: 1010 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 1011 (data & AXP_BAT_CAP_VALID) != 0) { 1012 batt_val = (data & AXP_BAT_CAP_PERCENT); 1013 if (batt_val <= sc->shut_thres) 1014 val = BATT_CAPACITY_CRITICAL; 1015 else if (batt_val <= sc->warn_thres) 1016 val = BATT_CAPACITY_WARNING; 1017 else 1018 val = BATT_CAPACITY_NORMAL; 1019 } 1020 break; 1021 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 1022 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 1023 (data & AXP_BAT_CAP_VALID) != 0) 1024 val = (data & AXP_BAT_CAP_PERCENT); 1025 break; 1026 case AXP_SENSOR_BATT_VOLTAGE: 1027 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 1028 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 1029 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1030 val *= c->batsense_step; 1031 } 1032 break; 1033 case AXP_SENSOR_BATT_CHARGE_CURRENT: 1034 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1035 (data & AXP_POWERSRC_CHARING) != 0 && 1036 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 1037 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 1038 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1039 val *= c->charge_step; 1040 } 1041 break; 1042 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 1043 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1044 (data & AXP_POWERSRC_CHARING) == 0 && 1045 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 1046 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 1047 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1048 val *= c->discharge_step; 1049 } 1050 break; 1051 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1052 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1053 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1054 val = AXP_SENSOR_COULOMB(hi, lo); 1055 val *= c->maxcap_step; 1056 } 1057 break; 1058 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1059 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1060 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1061 val = AXP_SENSOR_COULOMB(hi, lo); 1062 val *= c->coulomb_step; 1063 } 1064 break; 1065 } 1066 1067 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1068 } 1069 1070 static void 1071 axp8xx_intr(void *arg) 1072 { 1073 device_t dev; 1074 uint8_t val; 1075 int error; 1076 1077 dev = arg; 1078 1079 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1080 if (error != 0) 1081 return; 1082 1083 if (val) { 1084 if (bootverbose) 1085 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1086 if (val & AXP_IRQSTAT1_ACIN_HI) 1087 devctl_notify("PMU", "AC", "plugged", NULL); 1088 if (val & AXP_IRQSTAT1_ACIN_LO) 1089 devctl_notify("PMU", "AC", "unplugged", NULL); 1090 if (val & AXP_IRQSTAT1_VBUS_HI) 1091 devctl_notify("PMU", "USB", "plugged", NULL); 1092 if (val & AXP_IRQSTAT1_VBUS_LO) 1093 devctl_notify("PMU", "USB", "unplugged", NULL); 1094 /* Acknowledge */ 1095 axp8xx_write(dev, AXP_IRQSTAT1, val); 1096 } 1097 1098 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1099 if (error != 0) 1100 return; 1101 1102 if (val) { 1103 if (bootverbose) 1104 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1105 if (val & AXP_IRQSTAT2_BATCHGD) 1106 devctl_notify("PMU", "Battery", "charged", NULL); 1107 if (val & AXP_IRQSTAT2_BATCHGC) 1108 devctl_notify("PMU", "Battery", "charging", NULL); 1109 if (val & AXP_IRQSTAT2_BAT_NO) 1110 devctl_notify("PMU", "Battery", "absent", NULL); 1111 if (val & AXP_IRQSTAT2_BAT_IN) 1112 devctl_notify("PMU", "Battery", "plugged", NULL); 1113 /* Acknowledge */ 1114 axp8xx_write(dev, AXP_IRQSTAT2, val); 1115 } 1116 1117 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1118 if (error != 0) 1119 return; 1120 1121 if (val) { 1122 /* Acknowledge */ 1123 axp8xx_write(dev, AXP_IRQSTAT3, val); 1124 } 1125 1126 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1127 if (error != 0) 1128 return; 1129 1130 if (val) { 1131 if (bootverbose) 1132 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1133 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1134 devctl_notify("PMU", "Battery", "shutdown-threshold", NULL); 1135 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1136 devctl_notify("PMU", "Battery", "warning-threshold", NULL); 1137 /* Acknowledge */ 1138 axp8xx_write(dev, AXP_IRQSTAT4, val); 1139 } 1140 1141 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1142 if (error != 0) 1143 return; 1144 1145 if (val != 0) { 1146 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1147 if (bootverbose) 1148 device_printf(dev, "Power button pressed\n"); 1149 shutdown_nice(RB_POWEROFF); 1150 } 1151 /* Acknowledge */ 1152 axp8xx_write(dev, AXP_IRQSTAT5, val); 1153 } 1154 1155 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1156 if (error != 0) 1157 return; 1158 1159 if (val) { 1160 /* Acknowledge */ 1161 axp8xx_write(dev, AXP_IRQSTAT6, val); 1162 } 1163 } 1164 1165 static device_t 1166 axp8xx_gpio_get_bus(device_t dev) 1167 { 1168 struct axp8xx_softc *sc; 1169 1170 sc = device_get_softc(dev); 1171 1172 return (sc->gpiodev); 1173 } 1174 1175 static int 1176 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1177 { 1178 *maxpin = nitems(axp8xx_pins) - 1; 1179 1180 return (0); 1181 } 1182 1183 static int 1184 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1185 { 1186 if (pin >= nitems(axp8xx_pins)) 1187 return (EINVAL); 1188 1189 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1190 1191 return (0); 1192 } 1193 1194 static int 1195 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1196 { 1197 if (pin >= nitems(axp8xx_pins)) 1198 return (EINVAL); 1199 1200 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1201 1202 return (0); 1203 } 1204 1205 static int 1206 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1207 { 1208 struct axp8xx_softc *sc; 1209 uint8_t data, func; 1210 int error; 1211 1212 if (pin >= nitems(axp8xx_pins)) 1213 return (EINVAL); 1214 1215 sc = device_get_softc(dev); 1216 1217 AXP_LOCK(sc); 1218 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1219 if (error == 0) { 1220 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1221 if (func == AXP_GPIO_FUNC_INPUT) 1222 *flags = GPIO_PIN_INPUT; 1223 else if (func == AXP_GPIO_FUNC_DRVLO || 1224 func == AXP_GPIO_FUNC_DRVHI) 1225 *flags = GPIO_PIN_OUTPUT; 1226 else 1227 *flags = 0; 1228 } 1229 AXP_UNLOCK(sc); 1230 1231 return (error); 1232 } 1233 1234 static int 1235 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1236 { 1237 struct axp8xx_softc *sc; 1238 uint8_t data; 1239 int error; 1240 1241 if (pin >= nitems(axp8xx_pins)) 1242 return (EINVAL); 1243 1244 sc = device_get_softc(dev); 1245 1246 AXP_LOCK(sc); 1247 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1248 if (error == 0) { 1249 data &= ~AXP_GPIO_FUNC; 1250 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1251 if ((flags & GPIO_PIN_OUTPUT) == 0) 1252 data |= AXP_GPIO_FUNC_INPUT; 1253 } 1254 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1255 } 1256 AXP_UNLOCK(sc); 1257 1258 return (error); 1259 } 1260 1261 static int 1262 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1263 { 1264 struct axp8xx_softc *sc; 1265 uint8_t data, func; 1266 int error; 1267 1268 if (pin >= nitems(axp8xx_pins)) 1269 return (EINVAL); 1270 1271 sc = device_get_softc(dev); 1272 1273 AXP_LOCK(sc); 1274 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1275 if (error == 0) { 1276 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1277 switch (func) { 1278 case AXP_GPIO_FUNC_DRVLO: 1279 *val = 0; 1280 break; 1281 case AXP_GPIO_FUNC_DRVHI: 1282 *val = 1; 1283 break; 1284 case AXP_GPIO_FUNC_INPUT: 1285 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1286 if (error == 0) 1287 *val = (data & (1 << pin)) ? 1 : 0; 1288 break; 1289 default: 1290 error = EIO; 1291 break; 1292 } 1293 } 1294 AXP_UNLOCK(sc); 1295 1296 return (error); 1297 } 1298 1299 static int 1300 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1301 { 1302 struct axp8xx_softc *sc; 1303 uint8_t data, func; 1304 int error; 1305 1306 if (pin >= nitems(axp8xx_pins)) 1307 return (EINVAL); 1308 1309 sc = device_get_softc(dev); 1310 1311 AXP_LOCK(sc); 1312 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1313 if (error == 0) { 1314 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1315 switch (func) { 1316 case AXP_GPIO_FUNC_DRVLO: 1317 case AXP_GPIO_FUNC_DRVHI: 1318 data &= ~AXP_GPIO_FUNC; 1319 data |= (val << AXP_GPIO_FUNC_SHIFT); 1320 break; 1321 default: 1322 error = EIO; 1323 break; 1324 } 1325 } 1326 if (error == 0) 1327 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1328 AXP_UNLOCK(sc); 1329 1330 return (error); 1331 } 1332 1333 static int 1334 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1335 { 1336 struct axp8xx_softc *sc; 1337 uint8_t data, func; 1338 int error; 1339 1340 if (pin >= nitems(axp8xx_pins)) 1341 return (EINVAL); 1342 1343 sc = device_get_softc(dev); 1344 1345 AXP_LOCK(sc); 1346 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1347 if (error == 0) { 1348 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1349 switch (func) { 1350 case AXP_GPIO_FUNC_DRVLO: 1351 data &= ~AXP_GPIO_FUNC; 1352 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1353 break; 1354 case AXP_GPIO_FUNC_DRVHI: 1355 data &= ~AXP_GPIO_FUNC; 1356 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1357 break; 1358 default: 1359 error = EIO; 1360 break; 1361 } 1362 } 1363 if (error == 0) 1364 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1365 AXP_UNLOCK(sc); 1366 1367 return (error); 1368 } 1369 1370 static int 1371 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1372 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1373 { 1374 if (gpios[0] >= nitems(axp8xx_pins)) 1375 return (EINVAL); 1376 1377 *pin = gpios[0]; 1378 *flags = gpios[1]; 1379 1380 return (0); 1381 } 1382 1383 static phandle_t 1384 axp8xx_get_node(device_t dev, device_t bus) 1385 { 1386 return (ofw_bus_get_node(dev)); 1387 } 1388 1389 static struct axp8xx_reg_sc * 1390 axp8xx_reg_attach(device_t dev, phandle_t node, 1391 struct axp8xx_regdef *def) 1392 { 1393 struct axp8xx_reg_sc *reg_sc; 1394 struct regnode_init_def initdef; 1395 struct regnode *regnode; 1396 1397 memset(&initdef, 0, sizeof(initdef)); 1398 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1399 return (NULL); 1400 if (initdef.std_param.min_uvolt == 0) 1401 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1402 if (initdef.std_param.max_uvolt == 0) 1403 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1404 initdef.id = def->id; 1405 initdef.ofw_node = node; 1406 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1407 if (regnode == NULL) { 1408 device_printf(dev, "cannot create regulator\n"); 1409 return (NULL); 1410 } 1411 1412 reg_sc = regnode_get_softc(regnode); 1413 reg_sc->regnode = regnode; 1414 reg_sc->base_dev = dev; 1415 reg_sc->def = def; 1416 reg_sc->xref = OF_xref_from_node(node); 1417 reg_sc->param = regnode_get_stdparam(regnode); 1418 1419 regnode_register(regnode); 1420 1421 return (reg_sc); 1422 } 1423 1424 static int 1425 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1426 intptr_t *num) 1427 { 1428 struct axp8xx_softc *sc; 1429 int i; 1430 1431 sc = device_get_softc(dev); 1432 for (i = 0; i < sc->nregs; i++) { 1433 if (sc->regs[i] == NULL) 1434 continue; 1435 if (sc->regs[i]->xref == xref) { 1436 *num = sc->regs[i]->def->id; 1437 return (0); 1438 } 1439 } 1440 1441 return (ENXIO); 1442 } 1443 1444 static int 1445 axp8xx_probe(device_t dev) 1446 { 1447 if (!ofw_bus_status_okay(dev)) 1448 return (ENXIO); 1449 1450 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1451 { 1452 case AXP803: 1453 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1454 break; 1455 case AXP813: 1456 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1457 break; 1458 default: 1459 return (ENXIO); 1460 } 1461 1462 return (BUS_PROBE_DEFAULT); 1463 } 1464 1465 static int 1466 axp8xx_attach(device_t dev) 1467 { 1468 struct axp8xx_softc *sc; 1469 struct axp8xx_reg_sc *reg; 1470 uint8_t chip_id, val; 1471 phandle_t rnode, child; 1472 int error, i; 1473 1474 sc = device_get_softc(dev); 1475 1476 sc->addr = iicbus_get_addr(dev); 1477 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1478 1479 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1480 if (error != 0) { 1481 device_printf(dev, "cannot allocate resources for device\n"); 1482 return (error); 1483 } 1484 1485 if (bootverbose) { 1486 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1487 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1488 } 1489 1490 sc->nregs = nitems(axp8xx_common_regdefs); 1491 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1492 switch (sc->type) { 1493 case AXP803: 1494 sc->nregs += nitems(axp803_regdefs); 1495 break; 1496 case AXP813: 1497 sc->nregs += nitems(axp813_regdefs); 1498 break; 1499 } 1500 sc->config = &axp803_config; 1501 sc->sensors = axp8xx_common_sensors; 1502 sc->nsensors = nitems(axp8xx_common_sensors); 1503 1504 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1505 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1506 1507 /* Attach known regulators that exist in the DT */ 1508 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1509 if (rnode > 0) { 1510 for (i = 0; i < sc->nregs; i++) { 1511 char *regname; 1512 struct axp8xx_regdef *regdef; 1513 1514 if (i <= nitems(axp8xx_common_regdefs)) { 1515 regname = axp8xx_common_regdefs[i].name; 1516 regdef = &axp8xx_common_regdefs[i]; 1517 } else { 1518 int off; 1519 1520 off = i - nitems(axp8xx_common_regdefs); 1521 switch (sc->type) { 1522 case AXP803: 1523 regname = axp803_regdefs[off].name; 1524 regdef = &axp803_regdefs[off]; 1525 break; 1526 case AXP813: 1527 regname = axp813_regdefs[off].name; 1528 regdef = &axp813_regdefs[off]; 1529 break; 1530 } 1531 } 1532 child = ofw_bus_find_child(rnode, 1533 regname); 1534 if (child == 0) 1535 continue; 1536 reg = axp8xx_reg_attach(dev, child, 1537 regdef); 1538 if (reg == NULL) { 1539 device_printf(dev, 1540 "cannot attach regulator %s\n", 1541 regname); 1542 continue; 1543 } 1544 sc->regs[i] = reg; 1545 } 1546 } 1547 1548 /* Add sensors */ 1549 for (i = 0; i < sc->nsensors; i++) { 1550 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1551 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1552 OID_AUTO, sc->sensors[i].name, 1553 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 1554 dev, sc->sensors[i].id, axp8xx_sysctl, 1555 sc->sensors[i].format, 1556 sc->sensors[i].desc); 1557 } 1558 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1559 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1560 OID_AUTO, "batchargecurrentstep", 1561 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 1562 dev, 0, axp8xx_sysctl_chargecurrent, 1563 "I", "Battery Charging Current Step, " 1564 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1565 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1566 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1567 "12: 2600mA, 13: 2800mA"); 1568 1569 /* Get thresholds */ 1570 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1571 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1572 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE; 1573 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1574 if (bootverbose) { 1575 device_printf(dev, 1576 "Raw reg val: 0x%02x\n", val); 1577 device_printf(dev, 1578 "Warning threshold: 0x%02x\n", sc->warn_thres); 1579 device_printf(dev, 1580 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1581 } 1582 } 1583 1584 /* Enable interrupts */ 1585 axp8xx_write(dev, AXP_IRQEN1, 1586 AXP_IRQEN1_VBUS_LO | 1587 AXP_IRQEN1_VBUS_HI | 1588 AXP_IRQEN1_ACIN_LO | 1589 AXP_IRQEN1_ACIN_HI); 1590 axp8xx_write(dev, AXP_IRQEN2, 1591 AXP_IRQEN2_BATCHGD | 1592 AXP_IRQEN2_BATCHGC | 1593 AXP_IRQEN2_BAT_NO | 1594 AXP_IRQEN2_BAT_IN); 1595 axp8xx_write(dev, AXP_IRQEN3, 0); 1596 axp8xx_write(dev, AXP_IRQEN4, 1597 AXP_IRQEN4_BATLVL_LO0 | 1598 AXP_IRQEN4_BATLVL_LO1); 1599 axp8xx_write(dev, AXP_IRQEN5, 1600 AXP_IRQEN5_POKSIRQ | 1601 AXP_IRQEN5_POKLIRQ); 1602 axp8xx_write(dev, AXP_IRQEN6, 0); 1603 1604 /* Install interrupt handler */ 1605 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1606 NULL, axp8xx_intr, dev, &sc->ih); 1607 if (error != 0) { 1608 device_printf(dev, "cannot setup interrupt handler\n"); 1609 return (error); 1610 } 1611 1612 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1613 SHUTDOWN_PRI_LAST); 1614 1615 sc->gpiodev = gpiobus_attach_bus(dev); 1616 1617 return (0); 1618 } 1619 1620 static device_method_t axp8xx_methods[] = { 1621 /* Device interface */ 1622 DEVMETHOD(device_probe, axp8xx_probe), 1623 DEVMETHOD(device_attach, axp8xx_attach), 1624 1625 /* GPIO interface */ 1626 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1627 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1628 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1629 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1630 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1631 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1632 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1633 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1634 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1635 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1636 1637 /* Regdev interface */ 1638 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1639 1640 /* OFW bus interface */ 1641 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1642 1643 DEVMETHOD_END 1644 }; 1645 1646 static driver_t axp8xx_driver = { 1647 "axp8xx_pmu", 1648 axp8xx_methods, 1649 sizeof(struct axp8xx_softc), 1650 }; 1651 1652 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1653 1654 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, 0, 0, 1655 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1656 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 0, 0, 1657 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1658 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, 0, 0); 1659 MODULE_VERSION(axp8xx, 1); 1660 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1661 SIMPLEBUS_PNP_INFO(compat_data); 1662