1 /*- 2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * X-Powers AXP813/818 PMU for Allwinner SoCs 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/eventhandler.h> 39 #include <sys/bus.h> 40 #include <sys/rman.h> 41 #include <sys/kernel.h> 42 #include <sys/reboot.h> 43 #include <sys/gpio.h> 44 #include <sys/module.h> 45 #include <machine/bus.h> 46 47 #include <dev/iicbus/iicbus.h> 48 #include <dev/iicbus/iiconf.h> 49 50 #include <dev/gpio/gpiobusvar.h> 51 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <dev/extres/regulator/regulator.h> 56 57 #include "gpio_if.h" 58 #include "iicbus_if.h" 59 #include "regdev_if.h" 60 61 MALLOC_DEFINE(M_AXP81X_REG, "AXP81x regulator", "AXP81x power regulator"); 62 63 #define AXP_ICTYPE 0x03 64 #define AXP_POWERCTL1 0x10 65 #define AXP_POWERCTL1_DCDC2 (1 << 1) 66 #define AXP_POWERCTL2 0x12 67 #define AXP_POWERCTL2_DC1SW (1 << 7) 68 #define AXP_VOLTCTL_DCDC2 0x21 69 #define AXP_VOLTCTL_STATUS (1 << 7) 70 #define AXP_VOLTCTL_MASK 0x7f 71 #define AXP_POWERBAT 0x32 72 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 73 #define AXP_IRQEN1 0x40 74 #define AXP_IRQEN2 0x41 75 #define AXP_IRQEN3 0x42 76 #define AXP_IRQEN4 0x43 77 #define AXP_IRQEN5 0x44 78 #define AXP_IRQEN5_POKSIRQ (1 << 4) 79 #define AXP_IRQEN6 0x45 80 #define AXP_IRQSTAT5 0x4c 81 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 82 #define AXP_GPIO0_CTRL 0x90 83 #define AXP_GPIO1_CTRL 0x92 84 #define AXP_GPIO_FUNC (0x7 << 0) 85 #define AXP_GPIO_FUNC_SHIFT 0 86 #define AXP_GPIO_FUNC_DRVLO 0 87 #define AXP_GPIO_FUNC_DRVHI 1 88 #define AXP_GPIO_FUNC_INPUT 2 89 #define AXP_GPIO_SIGBIT 0x94 90 #define AXP_GPIO_PD 0x97 91 92 static const struct { 93 const char *name; 94 uint8_t ctrl_reg; 95 } axp81x_pins[] = { 96 { "GPIO0", AXP_GPIO0_CTRL }, 97 { "GPIO1", AXP_GPIO1_CTRL }, 98 }; 99 100 static struct ofw_compat_data compat_data[] = { 101 { "x-powers,axp813", 1 }, 102 { "x-powers,axp818", 1 }, 103 { NULL, 0 } 104 }; 105 106 static struct resource_spec axp81x_spec[] = { 107 { SYS_RES_IRQ, 0, RF_ACTIVE }, 108 { -1, 0 } 109 }; 110 111 struct axp81x_regdef { 112 intptr_t id; 113 char *name; 114 char *supply_name; 115 uint8_t enable_reg; 116 uint8_t enable_mask; 117 uint8_t voltage_reg; 118 int voltage_min; 119 int voltage_max; 120 int voltage_step1; 121 int voltage_nstep1; 122 int voltage_step2; 123 int voltage_nstep2; 124 }; 125 126 enum axp81x_reg_id { 127 AXP81X_REG_ID_DC1SW, 128 AXP81X_REG_ID_DCDC2, 129 }; 130 131 static struct axp81x_regdef axp81x_regdefs[] = { 132 { 133 .id = AXP81X_REG_ID_DC1SW, 134 .name = "dc1sw", 135 .enable_reg = AXP_POWERCTL2, 136 .enable_mask = AXP_POWERCTL2_DC1SW, 137 }, 138 { 139 .id = AXP81X_REG_ID_DCDC2, 140 .name = "dcdc2", 141 .enable_reg = AXP_POWERCTL1, 142 .enable_mask = AXP_POWERCTL1_DCDC2, 143 .voltage_reg = AXP_VOLTCTL_DCDC2, 144 .voltage_min = 500, 145 .voltage_max = 1300, 146 .voltage_step1 = 10, 147 .voltage_nstep1 = 70, 148 .voltage_step2 = 20, 149 .voltage_nstep2 = 5, 150 }, 151 }; 152 153 struct axp81x_softc; 154 155 struct axp81x_reg_sc { 156 struct regnode *regnode; 157 device_t base_dev; 158 struct axp81x_regdef *def; 159 phandle_t xref; 160 struct regnode_std_param *param; 161 }; 162 163 struct axp81x_softc { 164 struct resource *res; 165 uint16_t addr; 166 void *ih; 167 device_t gpiodev; 168 struct mtx mtx; 169 int busy; 170 171 /* Regulators */ 172 struct axp81x_reg_sc **regs; 173 int nregs; 174 }; 175 176 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 177 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 178 179 static int 180 axp81x_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 181 { 182 struct axp81x_softc *sc; 183 struct iic_msg msg[2]; 184 185 sc = device_get_softc(dev); 186 187 msg[0].slave = sc->addr; 188 msg[0].flags = IIC_M_WR; 189 msg[0].len = 1; 190 msg[0].buf = ® 191 192 msg[1].slave = sc->addr; 193 msg[1].flags = IIC_M_RD; 194 msg[1].len = size; 195 msg[1].buf = data; 196 197 return (iicbus_transfer(dev, msg, 2)); 198 } 199 200 static int 201 axp81x_write(device_t dev, uint8_t reg, uint8_t val) 202 { 203 struct axp81x_softc *sc; 204 struct iic_msg msg[2]; 205 206 sc = device_get_softc(dev); 207 208 msg[0].slave = sc->addr; 209 msg[0].flags = IIC_M_WR; 210 msg[0].len = 1; 211 msg[0].buf = ® 212 213 msg[1].slave = sc->addr; 214 msg[1].flags = IIC_M_WR; 215 msg[1].len = 1; 216 msg[1].buf = &val; 217 218 return (iicbus_transfer(dev, msg, 2)); 219 } 220 221 static int 222 axp81x_regnode_init(struct regnode *regnode) 223 { 224 return (0); 225 } 226 227 static int 228 axp81x_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 229 { 230 struct axp81x_reg_sc *sc; 231 uint8_t val; 232 233 sc = regnode_get_softc(regnode); 234 235 axp81x_read(sc->base_dev, sc->def->enable_reg, &val, 1); 236 if (enable) 237 val |= sc->def->enable_mask; 238 else 239 val &= ~sc->def->enable_mask; 240 axp81x_write(sc->base_dev, sc->def->enable_reg, val); 241 242 *udelay = 0; 243 244 return (0); 245 } 246 247 static void 248 axp81x_regnode_reg_to_voltage(struct axp81x_reg_sc *sc, uint8_t val, int *uv) 249 { 250 if (val < sc->def->voltage_nstep1) 251 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 252 else 253 *uv = sc->def->voltage_min + 254 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 255 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 256 *uv *= 1000; 257 } 258 259 static int 260 axp81x_regnode_voltage_to_reg(struct axp81x_reg_sc *sc, int min_uvolt, 261 int max_uvolt, uint8_t *val) 262 { 263 uint8_t nval; 264 int nstep, uvolt; 265 266 nval = 0; 267 uvolt = sc->def->voltage_min * 1000; 268 269 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 270 nstep++) { 271 ++nval; 272 uvolt += (sc->def->voltage_step1 * 1000); 273 } 274 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 275 nstep++) { 276 ++nval; 277 uvolt += (sc->def->voltage_step2 * 1000); 278 } 279 if (uvolt > max_uvolt) 280 return (EINVAL); 281 282 *val = nval; 283 return (0); 284 } 285 286 static int 287 axp81x_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 288 int max_uvolt, int *udelay) 289 { 290 struct axp81x_reg_sc *sc; 291 uint8_t val; 292 293 sc = regnode_get_softc(regnode); 294 295 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 296 return (ENXIO); 297 298 if (axp81x_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 299 return (ERANGE); 300 301 axp81x_write(sc->base_dev, sc->def->voltage_reg, val); 302 303 *udelay = 0; 304 305 return (0); 306 } 307 308 static int 309 axp81x_regnode_get_voltage(struct regnode *regnode, int *uvolt) 310 { 311 struct axp81x_reg_sc *sc; 312 uint8_t val; 313 314 sc = regnode_get_softc(regnode); 315 316 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 317 return (ENXIO); 318 319 axp81x_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 320 axp81x_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 321 322 return (0); 323 } 324 325 static regnode_method_t axp81x_regnode_methods[] = { 326 /* Regulator interface */ 327 REGNODEMETHOD(regnode_init, axp81x_regnode_init), 328 REGNODEMETHOD(regnode_enable, axp81x_regnode_enable), 329 REGNODEMETHOD(regnode_set_voltage, axp81x_regnode_set_voltage), 330 REGNODEMETHOD(regnode_get_voltage, axp81x_regnode_get_voltage), 331 REGNODEMETHOD_END 332 }; 333 DEFINE_CLASS_1(axp81x_regnode, axp81x_regnode_class, axp81x_regnode_methods, 334 sizeof(struct axp81x_reg_sc), regnode_class); 335 336 static void 337 axp81x_shutdown(void *devp, int howto) 338 { 339 device_t dev; 340 341 if ((howto & RB_POWEROFF) == 0) 342 return; 343 344 dev = devp; 345 346 if (bootverbose) 347 device_printf(dev, "Shutdown AXP81x\n"); 348 349 axp81x_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 350 } 351 352 static void 353 axp81x_intr(void *arg) 354 { 355 device_t dev; 356 uint8_t val; 357 int error; 358 359 dev = arg; 360 361 error = axp81x_read(dev, AXP_IRQSTAT5, &val, 1); 362 if (error != 0) 363 return; 364 365 if (val != 0) { 366 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 367 if (bootverbose) 368 device_printf(dev, "Power button pressed\n"); 369 shutdown_nice(RB_POWEROFF); 370 } 371 /* Acknowledge */ 372 axp81x_write(dev, AXP_IRQSTAT5, val); 373 } 374 } 375 376 static device_t 377 axp81x_gpio_get_bus(device_t dev) 378 { 379 struct axp81x_softc *sc; 380 381 sc = device_get_softc(dev); 382 383 return (sc->gpiodev); 384 } 385 386 static int 387 axp81x_gpio_pin_max(device_t dev, int *maxpin) 388 { 389 *maxpin = nitems(axp81x_pins) - 1; 390 391 return (0); 392 } 393 394 static int 395 axp81x_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 396 { 397 if (pin >= nitems(axp81x_pins)) 398 return (EINVAL); 399 400 snprintf(name, GPIOMAXNAME, "%s", axp81x_pins[pin].name); 401 402 return (0); 403 } 404 405 static int 406 axp81x_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 407 { 408 if (pin >= nitems(axp81x_pins)) 409 return (EINVAL); 410 411 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 412 413 return (0); 414 } 415 416 static int 417 axp81x_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 418 { 419 struct axp81x_softc *sc; 420 uint8_t data, func; 421 int error; 422 423 if (pin >= nitems(axp81x_pins)) 424 return (EINVAL); 425 426 sc = device_get_softc(dev); 427 428 AXP_LOCK(sc); 429 error = axp81x_read(dev, axp81x_pins[pin].ctrl_reg, &data, 1); 430 if (error == 0) { 431 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 432 if (func == AXP_GPIO_FUNC_INPUT) 433 *flags = GPIO_PIN_INPUT; 434 else if (func == AXP_GPIO_FUNC_DRVLO || 435 func == AXP_GPIO_FUNC_DRVHI) 436 *flags = GPIO_PIN_OUTPUT; 437 else 438 *flags = 0; 439 } 440 AXP_UNLOCK(sc); 441 442 return (error); 443 } 444 445 static int 446 axp81x_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 447 { 448 struct axp81x_softc *sc; 449 uint8_t data; 450 int error; 451 452 if (pin >= nitems(axp81x_pins)) 453 return (EINVAL); 454 455 sc = device_get_softc(dev); 456 457 AXP_LOCK(sc); 458 error = axp81x_read(dev, axp81x_pins[pin].ctrl_reg, &data, 1); 459 if (error == 0) { 460 data &= ~AXP_GPIO_FUNC; 461 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 462 if ((flags & GPIO_PIN_OUTPUT) == 0) 463 data |= AXP_GPIO_FUNC_INPUT; 464 } 465 error = axp81x_write(dev, axp81x_pins[pin].ctrl_reg, data); 466 } 467 AXP_UNLOCK(sc); 468 469 return (error); 470 } 471 472 static int 473 axp81x_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 474 { 475 struct axp81x_softc *sc; 476 uint8_t data, func; 477 int error; 478 479 if (pin >= nitems(axp81x_pins)) 480 return (EINVAL); 481 482 sc = device_get_softc(dev); 483 484 AXP_LOCK(sc); 485 error = axp81x_read(dev, axp81x_pins[pin].ctrl_reg, &data, 1); 486 if (error == 0) { 487 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 488 switch (func) { 489 case AXP_GPIO_FUNC_DRVLO: 490 *val = 0; 491 break; 492 case AXP_GPIO_FUNC_DRVHI: 493 *val = 1; 494 break; 495 case AXP_GPIO_FUNC_INPUT: 496 error = axp81x_read(dev, AXP_GPIO_SIGBIT, &data, 1); 497 if (error == 0) 498 *val = (data & (1 << pin)) ? 1 : 0; 499 break; 500 default: 501 error = EIO; 502 break; 503 } 504 } 505 AXP_UNLOCK(sc); 506 507 return (error); 508 } 509 510 static int 511 axp81x_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 512 { 513 struct axp81x_softc *sc; 514 uint8_t data, func; 515 int error; 516 517 if (pin >= nitems(axp81x_pins)) 518 return (EINVAL); 519 520 sc = device_get_softc(dev); 521 522 AXP_LOCK(sc); 523 error = axp81x_read(dev, axp81x_pins[pin].ctrl_reg, &data, 1); 524 if (error == 0) { 525 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 526 switch (func) { 527 case AXP_GPIO_FUNC_DRVLO: 528 case AXP_GPIO_FUNC_DRVHI: 529 data &= ~AXP_GPIO_FUNC; 530 data |= (val << AXP_GPIO_FUNC_SHIFT); 531 break; 532 default: 533 error = EIO; 534 break; 535 } 536 } 537 if (error == 0) 538 error = axp81x_write(dev, axp81x_pins[pin].ctrl_reg, data); 539 AXP_UNLOCK(sc); 540 541 return (error); 542 } 543 544 545 static int 546 axp81x_gpio_pin_toggle(device_t dev, uint32_t pin) 547 { 548 struct axp81x_softc *sc; 549 uint8_t data, func; 550 int error; 551 552 if (pin >= nitems(axp81x_pins)) 553 return (EINVAL); 554 555 sc = device_get_softc(dev); 556 557 AXP_LOCK(sc); 558 error = axp81x_read(dev, axp81x_pins[pin].ctrl_reg, &data, 1); 559 if (error == 0) { 560 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 561 switch (func) { 562 case AXP_GPIO_FUNC_DRVLO: 563 data &= ~AXP_GPIO_FUNC; 564 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 565 break; 566 case AXP_GPIO_FUNC_DRVHI: 567 data &= ~AXP_GPIO_FUNC; 568 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 569 break; 570 default: 571 error = EIO; 572 break; 573 } 574 } 575 if (error == 0) 576 error = axp81x_write(dev, axp81x_pins[pin].ctrl_reg, data); 577 AXP_UNLOCK(sc); 578 579 return (error); 580 } 581 582 static int 583 axp81x_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 584 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 585 { 586 if (gpios[0] >= nitems(axp81x_pins)) 587 return (EINVAL); 588 589 *pin = gpios[0]; 590 *flags = gpios[1]; 591 592 return (0); 593 } 594 595 static phandle_t 596 axp81x_get_node(device_t dev, device_t bus) 597 { 598 return (ofw_bus_get_node(dev)); 599 } 600 601 static struct axp81x_reg_sc * 602 axp81x_reg_attach(device_t dev, phandle_t node, 603 struct axp81x_regdef *def) 604 { 605 struct axp81x_reg_sc *reg_sc; 606 struct regnode_init_def initdef; 607 struct regnode *regnode; 608 609 memset(&initdef, 0, sizeof(initdef)); 610 regulator_parse_ofw_stdparam(dev, node, &initdef); 611 if (initdef.std_param.min_uvolt == 0) 612 initdef.std_param.min_uvolt = def->voltage_min * 1000; 613 if (initdef.std_param.max_uvolt == 0) 614 initdef.std_param.max_uvolt = def->voltage_max * 1000; 615 initdef.id = def->id; 616 initdef.ofw_node = node; 617 regnode = regnode_create(dev, &axp81x_regnode_class, &initdef); 618 if (regnode == NULL) { 619 device_printf(dev, "cannot create regulator\n"); 620 return (NULL); 621 } 622 623 reg_sc = regnode_get_softc(regnode); 624 reg_sc->regnode = regnode; 625 reg_sc->base_dev = dev; 626 reg_sc->def = def; 627 reg_sc->xref = OF_xref_from_node(node); 628 reg_sc->param = regnode_get_stdparam(regnode); 629 630 regnode_register(regnode); 631 632 return (reg_sc); 633 } 634 635 static int 636 axp81x_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 637 intptr_t *num) 638 { 639 struct axp81x_softc *sc; 640 int i; 641 642 sc = device_get_softc(dev); 643 for (i = 0; i < sc->nregs; i++) { 644 if (sc->regs[i] == NULL) 645 continue; 646 if (sc->regs[i]->xref == xref) { 647 *num = sc->regs[i]->def->id; 648 return (0); 649 } 650 } 651 652 return (ENXIO); 653 } 654 655 static int 656 axp81x_probe(device_t dev) 657 { 658 if (!ofw_bus_status_okay(dev)) 659 return (ENXIO); 660 661 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 662 return (ENXIO); 663 664 device_set_desc(dev, "X-Powers AXP81x Power Management Unit"); 665 666 return (BUS_PROBE_DEFAULT); 667 } 668 669 static int 670 axp81x_attach(device_t dev) 671 { 672 struct axp81x_softc *sc; 673 struct axp81x_reg_sc *reg; 674 uint8_t chip_id; 675 phandle_t rnode, child; 676 int error, i; 677 678 sc = device_get_softc(dev); 679 680 sc->addr = iicbus_get_addr(dev); 681 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 682 683 error = bus_alloc_resources(dev, axp81x_spec, &sc->res); 684 if (error != 0) { 685 device_printf(dev, "cannot allocate resources for device\n"); 686 return (error); 687 } 688 689 if (bootverbose) { 690 axp81x_read(dev, AXP_ICTYPE, &chip_id, 1); 691 device_printf(dev, "chip ID 0x%02x\n", chip_id); 692 } 693 694 sc->nregs = nitems(axp81x_regdefs); 695 sc->regs = malloc(sizeof(struct axp81x_reg_sc *) * sc->nregs, 696 M_AXP81X_REG, M_WAITOK | M_ZERO); 697 698 /* Attach known regulators that exist in the DT */ 699 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 700 if (rnode > 0) { 701 for (i = 0; i < sc->nregs; i++) { 702 child = ofw_bus_find_child(rnode, 703 axp81x_regdefs[i].name); 704 if (child == 0) 705 continue; 706 reg = axp81x_reg_attach(dev, child, &axp81x_regdefs[i]); 707 if (reg == NULL) { 708 device_printf(dev, 709 "cannot attach regulator %s\n", 710 axp81x_regdefs[i].name); 711 return (ENXIO); 712 } 713 sc->regs[i] = reg; 714 } 715 } 716 717 /* Enable IRQ on short power key press */ 718 axp81x_write(dev, AXP_IRQEN1, 0); 719 axp81x_write(dev, AXP_IRQEN2, 0); 720 axp81x_write(dev, AXP_IRQEN3, 0); 721 axp81x_write(dev, AXP_IRQEN4, 0); 722 axp81x_write(dev, AXP_IRQEN5, AXP_IRQEN5_POKSIRQ); 723 axp81x_write(dev, AXP_IRQEN6, 0); 724 725 /* Install interrupt handler */ 726 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 727 NULL, axp81x_intr, dev, &sc->ih); 728 if (error != 0) { 729 device_printf(dev, "cannot setup interrupt handler\n"); 730 return (error); 731 } 732 733 EVENTHANDLER_REGISTER(shutdown_final, axp81x_shutdown, dev, 734 SHUTDOWN_PRI_LAST); 735 736 sc->gpiodev = gpiobus_attach_bus(dev); 737 738 return (0); 739 } 740 741 static device_method_t axp81x_methods[] = { 742 /* Device interface */ 743 DEVMETHOD(device_probe, axp81x_probe), 744 DEVMETHOD(device_attach, axp81x_attach), 745 746 /* GPIO interface */ 747 DEVMETHOD(gpio_get_bus, axp81x_gpio_get_bus), 748 DEVMETHOD(gpio_pin_max, axp81x_gpio_pin_max), 749 DEVMETHOD(gpio_pin_getname, axp81x_gpio_pin_getname), 750 DEVMETHOD(gpio_pin_getcaps, axp81x_gpio_pin_getcaps), 751 DEVMETHOD(gpio_pin_getflags, axp81x_gpio_pin_getflags), 752 DEVMETHOD(gpio_pin_setflags, axp81x_gpio_pin_setflags), 753 DEVMETHOD(gpio_pin_get, axp81x_gpio_pin_get), 754 DEVMETHOD(gpio_pin_set, axp81x_gpio_pin_set), 755 DEVMETHOD(gpio_pin_toggle, axp81x_gpio_pin_toggle), 756 DEVMETHOD(gpio_map_gpios, axp81x_gpio_map_gpios), 757 758 /* Regdev interface */ 759 DEVMETHOD(regdev_map, axp81x_regdev_map), 760 761 /* OFW bus interface */ 762 DEVMETHOD(ofw_bus_get_node, axp81x_get_node), 763 764 DEVMETHOD_END 765 }; 766 767 static driver_t axp81x_driver = { 768 "axp81x_pmu", 769 axp81x_methods, 770 sizeof(struct axp81x_softc), 771 }; 772 773 static devclass_t axp81x_devclass; 774 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 775 extern driver_t ofw_gpiobus_driver, gpioc_driver; 776 777 EARLY_DRIVER_MODULE(axp81x, iicbus, axp81x_driver, axp81x_devclass, 0, 0, 778 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 779 EARLY_DRIVER_MODULE(ofw_gpiobus, axp81x_pmu, ofw_gpiobus_driver, 780 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 781 DRIVER_MODULE(gpioc, axp81x_pmu, gpioc_driver, gpioc_devclass, 0, 0); 782 MODULE_VERSION(axp81x, 1); 783 MODULE_DEPEND(axp81x, iicbus, 1, 1, 1); 784