1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/eventhandler.h> 40 #include <sys/bus.h> 41 #include <sys/rman.h> 42 #include <sys/kernel.h> 43 #include <sys/reboot.h> 44 #include <sys/gpio.h> 45 #include <sys/module.h> 46 #include <machine/bus.h> 47 48 #include <dev/iicbus/iicbus.h> 49 #include <dev/iicbus/iiconf.h> 50 51 #include <dev/gpio/gpiobusvar.h> 52 53 #include <dev/ofw/ofw_bus.h> 54 #include <dev/ofw/ofw_bus_subr.h> 55 56 #include <dev/extres/regulator/regulator.h> 57 58 #include "gpio_if.h" 59 #include "iicbus_if.h" 60 #include "regdev_if.h" 61 62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 63 64 #define AXP_POWERSRC 0x00 65 #define AXP_POWERSRC_ACIN (1 << 7) 66 #define AXP_POWERSRC_VBUS (1 << 5) 67 #define AXP_POWERSRC_VBAT (1 << 3) 68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 69 #define AXP_POWERSRC_SHORTED (1 << 1) 70 #define AXP_POWERSRC_STARTUP (1 << 0) 71 #define AXP_POWERMODE 0x01 72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 74 #define AXP_POWERMODE_BAT_VALID (1 << 4) 75 #define AXP_ICTYPE 0x03 76 #define AXP_POWERCTL1 0x10 77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 78 #define AXP_POWERCTL1_DCDC6 (1 << 5) 79 #define AXP_POWERCTL1_DCDC5 (1 << 4) 80 #define AXP_POWERCTL1_DCDC4 (1 << 3) 81 #define AXP_POWERCTL1_DCDC3 (1 << 2) 82 #define AXP_POWERCTL1_DCDC2 (1 << 1) 83 #define AXP_POWERCTL1_DCDC1 (1 << 0) 84 #define AXP_POWERCTL2 0x12 85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 86 #define AXP_POWERCTL2_DLDO4 (1 << 6) 87 #define AXP_POWERCTL2_DLDO3 (1 << 5) 88 #define AXP_POWERCTL2_DLDO2 (1 << 4) 89 #define AXP_POWERCTL2_DLDO1 (1 << 3) 90 #define AXP_POWERCTL2_ELDO3 (1 << 2) 91 #define AXP_POWERCTL2_ELDO2 (1 << 1) 92 #define AXP_POWERCTL2_ELDO1 (1 << 0) 93 #define AXP_POWERCTL3 0x13 94 #define AXP_POWERCTL3_ALDO3 (1 << 7) 95 #define AXP_POWERCTL3_ALDO2 (1 << 6) 96 #define AXP_POWERCTL3_ALDO1 (1 << 5) 97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 98 #define AXP_POWERCTL3_FLDO2 (1 << 3) 99 #define AXP_POWERCTL3_FLDO1 (1 << 2) 100 #define AXP_VOLTCTL_DLDO1 0x15 101 #define AXP_VOLTCTL_DLDO2 0x16 102 #define AXP_VOLTCTL_DLDO3 0x17 103 #define AXP_VOLTCTL_DLDO4 0x18 104 #define AXP_VOLTCTL_ELDO1 0x19 105 #define AXP_VOLTCTL_ELDO2 0x1A 106 #define AXP_VOLTCTL_ELDO3 0x1B 107 #define AXP_VOLTCTL_FLDO1 0x1C 108 #define AXP_VOLTCTL_FLDO2 0x1D 109 #define AXP_VOLTCTL_DCDC1 0x20 110 #define AXP_VOLTCTL_DCDC2 0x21 111 #define AXP_VOLTCTL_DCDC3 0x22 112 #define AXP_VOLTCTL_DCDC4 0x23 113 #define AXP_VOLTCTL_DCDC5 0x24 114 #define AXP_VOLTCTL_DCDC6 0x25 115 #define AXP_VOLTCTL_DCDC7 0x26 116 #define AXP_VOLTCTL_ALDO1 0x28 117 #define AXP_VOLTCTL_ALDO2 0x29 118 #define AXP_VOLTCTL_ALDO3 0x2A 119 #define AXP_VOLTCTL_STATUS (1 << 7) 120 #define AXP_VOLTCTL_MASK 0x7f 121 #define AXP_POWERBAT 0x32 122 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 123 #define AXP_CHARGERCTL1 0x33 124 #define AXP_CHARGERCTL1_MIN 0 125 #define AXP_CHARGERCTL1_MAX 13 126 #define AXP_CHARGERCTL1_CMASK 0xf 127 #define AXP_IRQEN1 0x40 128 #define AXP_IRQEN1_ACIN_HI (1 << 6) 129 #define AXP_IRQEN1_ACIN_LO (1 << 5) 130 #define AXP_IRQEN1_VBUS_HI (1 << 3) 131 #define AXP_IRQEN1_VBUS_LO (1 << 2) 132 #define AXP_IRQEN2 0x41 133 #define AXP_IRQEN2_BAT_IN (1 << 7) 134 #define AXP_IRQEN2_BAT_NO (1 << 6) 135 #define AXP_IRQEN2_BATCHGC (1 << 3) 136 #define AXP_IRQEN2_BATCHGD (1 << 2) 137 #define AXP_IRQEN3 0x42 138 #define AXP_IRQEN4 0x43 139 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 140 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 141 #define AXP_IRQEN5 0x44 142 #define AXP_IRQEN5_POKSIRQ (1 << 4) 143 #define AXP_IRQEN5_POKLIRQ (1 << 3) 144 #define AXP_IRQEN6 0x45 145 #define AXP_IRQSTAT1 0x48 146 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 147 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 148 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 149 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 150 #define AXP_IRQSTAT2 0x49 151 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 152 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 153 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 154 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 155 #define AXP_IRQSTAT3 0x4a 156 #define AXP_IRQSTAT4 0x4b 157 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 158 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 159 #define AXP_IRQSTAT5 0x4c 160 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 161 #define AXP_IRQEN5_POKLIRQ (1 << 3) 162 #define AXP_IRQSTAT6 0x4d 163 #define AXP_BATSENSE_HI 0x78 164 #define AXP_BATSENSE_LO 0x79 165 #define AXP_BATCHG_HI 0x7a 166 #define AXP_BATCHG_LO 0x7b 167 #define AXP_BATDISCHG_HI 0x7c 168 #define AXP_BATDISCHG_LO 0x7d 169 #define AXP_GPIO0_CTRL 0x90 170 #define AXP_GPIO0LDO_CTRL 0x91 171 #define AXP_GPIO1_CTRL 0x92 172 #define AXP_GPIO1LDO_CTRL 0x93 173 #define AXP_GPIO_FUNC (0x7 << 0) 174 #define AXP_GPIO_FUNC_SHIFT 0 175 #define AXP_GPIO_FUNC_DRVLO 0 176 #define AXP_GPIO_FUNC_DRVHI 1 177 #define AXP_GPIO_FUNC_INPUT 2 178 #define AXP_GPIO_FUNC_LDO_ON 3 179 #define AXP_GPIO_FUNC_LDO_OFF 4 180 #define AXP_GPIO_SIGBIT 0x94 181 #define AXP_GPIO_PD 0x97 182 #define AXP_FUEL_GAUGECTL 0xb8 183 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 184 185 #define AXP_BAT_CAP 0xb9 186 #define AXP_BAT_CAP_VALID (1 << 7) 187 #define AXP_BAT_CAP_PERCENT 0x7f 188 189 #define AXP_BAT_MAX_CAP_HI 0xe0 190 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 191 #define AXP_BAT_MAX_CAP_LO 0xe1 192 193 #define AXP_BAT_COULOMB_HI 0xe2 194 #define AXP_BAT_COULOMB_VALID (1 << 7) 195 #define AXP_BAT_COULOMB_LO 0xe3 196 197 #define AXP_BAT_CAP_WARN 0xe6 198 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 199 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */ 200 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 201 202 /* Sensor conversion macros */ 203 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 204 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 205 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 206 207 static const struct { 208 const char *name; 209 uint8_t ctrl_reg; 210 } axp8xx_pins[] = { 211 { "GPIO0", AXP_GPIO0_CTRL }, 212 { "GPIO1", AXP_GPIO1_CTRL }, 213 }; 214 215 enum AXP8XX_TYPE { 216 AXP803 = 1, 217 AXP813, 218 }; 219 220 static struct ofw_compat_data compat_data[] = { 221 { "x-powers,axp803", AXP803 }, 222 { "x-powers,axp813", AXP813 }, 223 { "x-powers,axp818", AXP813 }, 224 { NULL, 0 } 225 }; 226 227 static struct resource_spec axp8xx_spec[] = { 228 { SYS_RES_IRQ, 0, RF_ACTIVE }, 229 { -1, 0 } 230 }; 231 232 struct axp8xx_regdef { 233 intptr_t id; 234 char *name; 235 char *supply_name; 236 uint8_t enable_reg; 237 uint8_t enable_mask; 238 uint8_t enable_value; 239 uint8_t disable_value; 240 uint8_t voltage_reg; 241 int voltage_min; 242 int voltage_max; 243 int voltage_step1; 244 int voltage_nstep1; 245 int voltage_step2; 246 int voltage_nstep2; 247 }; 248 249 enum axp8xx_reg_id { 250 AXP8XX_REG_ID_DCDC1 = 100, 251 AXP8XX_REG_ID_DCDC2, 252 AXP8XX_REG_ID_DCDC3, 253 AXP8XX_REG_ID_DCDC4, 254 AXP8XX_REG_ID_DCDC5, 255 AXP8XX_REG_ID_DCDC6, 256 AXP813_REG_ID_DCDC7, 257 AXP803_REG_ID_DC1SW, 258 AXP8XX_REG_ID_DLDO1, 259 AXP8XX_REG_ID_DLDO2, 260 AXP8XX_REG_ID_DLDO3, 261 AXP8XX_REG_ID_DLDO4, 262 AXP8XX_REG_ID_ELDO1, 263 AXP8XX_REG_ID_ELDO2, 264 AXP8XX_REG_ID_ELDO3, 265 AXP8XX_REG_ID_ALDO1, 266 AXP8XX_REG_ID_ALDO2, 267 AXP8XX_REG_ID_ALDO3, 268 AXP8XX_REG_ID_FLDO1, 269 AXP8XX_REG_ID_FLDO2, 270 AXP813_REG_ID_FLDO3, 271 AXP8XX_REG_ID_GPIO0_LDO, 272 AXP8XX_REG_ID_GPIO1_LDO, 273 }; 274 275 static struct axp8xx_regdef axp803_regdefs[] = { 276 { 277 .id = AXP803_REG_ID_DC1SW, 278 .name = "dc1sw", 279 .enable_reg = AXP_POWERCTL2, 280 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 281 .enable_value = AXP_POWERCTL2_DC1SW, 282 }, 283 }; 284 285 static struct axp8xx_regdef axp813_regdefs[] = { 286 { 287 .id = AXP813_REG_ID_DCDC7, 288 .name = "dcdc7", 289 .enable_reg = AXP_POWERCTL1, 290 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 291 .enable_value = AXP_POWERCTL1_DCDC7, 292 .voltage_reg = AXP_VOLTCTL_DCDC7, 293 .voltage_min = 600, 294 .voltage_max = 1520, 295 .voltage_step1 = 10, 296 .voltage_nstep1 = 50, 297 .voltage_step2 = 20, 298 .voltage_nstep2 = 21, 299 }, 300 }; 301 302 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 303 { 304 .id = AXP8XX_REG_ID_DCDC1, 305 .name = "dcdc1", 306 .enable_reg = AXP_POWERCTL1, 307 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 308 .enable_value = AXP_POWERCTL1_DCDC1, 309 .voltage_reg = AXP_VOLTCTL_DCDC1, 310 .voltage_min = 1600, 311 .voltage_max = 3400, 312 .voltage_step1 = 100, 313 .voltage_nstep1 = 18, 314 }, 315 { 316 .id = AXP8XX_REG_ID_DCDC2, 317 .name = "dcdc2", 318 .enable_reg = AXP_POWERCTL1, 319 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 320 .enable_value = AXP_POWERCTL1_DCDC2, 321 .voltage_reg = AXP_VOLTCTL_DCDC2, 322 .voltage_min = 500, 323 .voltage_max = 1300, 324 .voltage_step1 = 10, 325 .voltage_nstep1 = 70, 326 .voltage_step2 = 20, 327 .voltage_nstep2 = 5, 328 }, 329 { 330 .id = AXP8XX_REG_ID_DCDC3, 331 .name = "dcdc3", 332 .enable_reg = AXP_POWERCTL1, 333 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 334 .enable_value = AXP_POWERCTL1_DCDC3, 335 .voltage_reg = AXP_VOLTCTL_DCDC3, 336 .voltage_min = 500, 337 .voltage_max = 1300, 338 .voltage_step1 = 10, 339 .voltage_nstep1 = 70, 340 .voltage_step2 = 20, 341 .voltage_nstep2 = 5, 342 }, 343 { 344 .id = AXP8XX_REG_ID_DCDC4, 345 .name = "dcdc4", 346 .enable_reg = AXP_POWERCTL1, 347 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 348 .enable_value = AXP_POWERCTL1_DCDC4, 349 .voltage_reg = AXP_VOLTCTL_DCDC4, 350 .voltage_min = 500, 351 .voltage_max = 1300, 352 .voltage_step1 = 10, 353 .voltage_nstep1 = 70, 354 .voltage_step2 = 20, 355 .voltage_nstep2 = 5, 356 }, 357 { 358 .id = AXP8XX_REG_ID_DCDC5, 359 .name = "dcdc5", 360 .enable_reg = AXP_POWERCTL1, 361 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 362 .enable_value = AXP_POWERCTL1_DCDC5, 363 .voltage_reg = AXP_VOLTCTL_DCDC5, 364 .voltage_min = 800, 365 .voltage_max = 1840, 366 .voltage_step1 = 10, 367 .voltage_nstep1 = 42, 368 .voltage_step2 = 20, 369 .voltage_nstep2 = 36, 370 }, 371 { 372 .id = AXP8XX_REG_ID_DCDC6, 373 .name = "dcdc6", 374 .enable_reg = AXP_POWERCTL1, 375 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 376 .enable_value = AXP_POWERCTL1_DCDC6, 377 .voltage_reg = AXP_VOLTCTL_DCDC6, 378 .voltage_min = 600, 379 .voltage_max = 1520, 380 .voltage_step1 = 10, 381 .voltage_nstep1 = 50, 382 .voltage_step2 = 20, 383 .voltage_nstep2 = 21, 384 }, 385 { 386 .id = AXP8XX_REG_ID_DLDO1, 387 .name = "dldo1", 388 .enable_reg = AXP_POWERCTL2, 389 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 390 .enable_value = AXP_POWERCTL2_DLDO1, 391 .voltage_reg = AXP_VOLTCTL_DLDO1, 392 .voltage_min = 700, 393 .voltage_max = 3300, 394 .voltage_step1 = 100, 395 .voltage_nstep1 = 26, 396 }, 397 { 398 .id = AXP8XX_REG_ID_DLDO2, 399 .name = "dldo2", 400 .enable_reg = AXP_POWERCTL2, 401 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 402 .enable_value = AXP_POWERCTL2_DLDO2, 403 .voltage_reg = AXP_VOLTCTL_DLDO2, 404 .voltage_min = 700, 405 .voltage_max = 4200, 406 .voltage_step1 = 100, 407 .voltage_nstep1 = 27, 408 .voltage_step2 = 200, 409 .voltage_nstep2 = 4, 410 }, 411 { 412 .id = AXP8XX_REG_ID_DLDO3, 413 .name = "dldo3", 414 .enable_reg = AXP_POWERCTL2, 415 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 416 .enable_value = AXP_POWERCTL2_DLDO3, 417 .voltage_reg = AXP_VOLTCTL_DLDO3, 418 .voltage_min = 700, 419 .voltage_max = 3300, 420 .voltage_step1 = 100, 421 .voltage_nstep1 = 26, 422 }, 423 { 424 .id = AXP8XX_REG_ID_DLDO4, 425 .name = "dldo4", 426 .enable_reg = AXP_POWERCTL2, 427 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 428 .enable_value = AXP_POWERCTL2_DLDO4, 429 .voltage_reg = AXP_VOLTCTL_DLDO4, 430 .voltage_min = 700, 431 .voltage_max = 3300, 432 .voltage_step1 = 100, 433 .voltage_nstep1 = 26, 434 }, 435 { 436 .id = AXP8XX_REG_ID_ALDO1, 437 .name = "aldo1", 438 .enable_reg = AXP_POWERCTL3, 439 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 440 .enable_value = AXP_POWERCTL3_ALDO1, 441 .voltage_min = 700, 442 .voltage_max = 3300, 443 .voltage_step1 = 100, 444 .voltage_nstep1 = 26, 445 }, 446 { 447 .id = AXP8XX_REG_ID_ALDO2, 448 .name = "aldo2", 449 .enable_reg = AXP_POWERCTL3, 450 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 451 .enable_value = AXP_POWERCTL3_ALDO2, 452 .voltage_min = 700, 453 .voltage_max = 3300, 454 .voltage_step1 = 100, 455 .voltage_nstep1 = 26, 456 }, 457 { 458 .id = AXP8XX_REG_ID_ALDO3, 459 .name = "aldo3", 460 .enable_reg = AXP_POWERCTL3, 461 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 462 .enable_value = AXP_POWERCTL3_ALDO3, 463 .voltage_min = 700, 464 .voltage_max = 3300, 465 .voltage_step1 = 100, 466 .voltage_nstep1 = 26, 467 }, 468 { 469 .id = AXP8XX_REG_ID_ELDO1, 470 .name = "eldo1", 471 .enable_reg = AXP_POWERCTL2, 472 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 473 .enable_value = AXP_POWERCTL2_ELDO1, 474 .voltage_min = 700, 475 .voltage_max = 1900, 476 .voltage_step1 = 50, 477 .voltage_nstep1 = 24, 478 }, 479 { 480 .id = AXP8XX_REG_ID_ELDO2, 481 .name = "eldo2", 482 .enable_reg = AXP_POWERCTL2, 483 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 484 .enable_value = AXP_POWERCTL2_ELDO2, 485 .voltage_min = 700, 486 .voltage_max = 1900, 487 .voltage_step1 = 50, 488 .voltage_nstep1 = 24, 489 }, 490 { 491 .id = AXP8XX_REG_ID_ELDO3, 492 .name = "eldo3", 493 .enable_reg = AXP_POWERCTL2, 494 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 495 .enable_value = AXP_POWERCTL2_ELDO3, 496 .voltage_min = 700, 497 .voltage_max = 1900, 498 .voltage_step1 = 50, 499 .voltage_nstep1 = 24, 500 }, 501 { 502 .id = AXP8XX_REG_ID_FLDO1, 503 .name = "fldo1", 504 .enable_reg = AXP_POWERCTL3, 505 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 506 .enable_value = AXP_POWERCTL3_FLDO1, 507 .voltage_min = 700, 508 .voltage_max = 1450, 509 .voltage_step1 = 50, 510 .voltage_nstep1 = 15, 511 }, 512 { 513 .id = AXP8XX_REG_ID_FLDO2, 514 .name = "fldo2", 515 .enable_reg = AXP_POWERCTL3, 516 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 517 .enable_value = AXP_POWERCTL3_FLDO2, 518 .voltage_min = 700, 519 .voltage_max = 1450, 520 .voltage_step1 = 50, 521 .voltage_nstep1 = 15, 522 }, 523 { 524 .id = AXP8XX_REG_ID_GPIO0_LDO, 525 .name = "ldo-io0", 526 .enable_reg = AXP_GPIO0_CTRL, 527 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 528 .enable_value = AXP_GPIO_FUNC_LDO_ON, 529 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 530 .voltage_reg = AXP_GPIO0LDO_CTRL, 531 .voltage_min = 700, 532 .voltage_max = 3300, 533 .voltage_step1 = 100, 534 .voltage_nstep1 = 26, 535 }, 536 { 537 .id = AXP8XX_REG_ID_GPIO1_LDO, 538 .name = "ldo-io1", 539 .enable_reg = AXP_GPIO1_CTRL, 540 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 541 .enable_value = AXP_GPIO_FUNC_LDO_ON, 542 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 543 .voltage_reg = AXP_GPIO1LDO_CTRL, 544 .voltage_min = 700, 545 .voltage_max = 3300, 546 .voltage_step1 = 100, 547 .voltage_nstep1 = 26, 548 }, 549 }; 550 551 enum axp8xx_sensor { 552 AXP_SENSOR_ACIN_PRESENT, 553 AXP_SENSOR_VBUS_PRESENT, 554 AXP_SENSOR_BATT_PRESENT, 555 AXP_SENSOR_BATT_CHARGING, 556 AXP_SENSOR_BATT_CHARGE_STATE, 557 AXP_SENSOR_BATT_VOLTAGE, 558 AXP_SENSOR_BATT_CHARGE_CURRENT, 559 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 560 AXP_SENSOR_BATT_CAPACITY_PERCENT, 561 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 562 AXP_SENSOR_BATT_CURRENT_CAPACITY, 563 }; 564 565 enum battery_capacity_state { 566 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 567 BATT_CAPACITY_WARNING, /* warning cap in battery */ 568 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 569 BATT_CAPACITY_HIGH, /* high cap in battery */ 570 BATT_CAPACITY_MAX, /* maximum cap in battery */ 571 BATT_CAPACITY_LOW /* low cap in battery */ 572 }; 573 574 struct axp8xx_sensors { 575 int id; 576 const char *name; 577 const char *desc; 578 const char *format; 579 }; 580 581 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 582 { 583 .id = AXP_SENSOR_ACIN_PRESENT, 584 .name = "acin", 585 .format = "I", 586 .desc = "ACIN Present", 587 }, 588 { 589 .id = AXP_SENSOR_VBUS_PRESENT, 590 .name = "vbus", 591 .format = "I", 592 .desc = "VBUS Present", 593 }, 594 { 595 .id = AXP_SENSOR_BATT_PRESENT, 596 .name = "bat", 597 .format = "I", 598 .desc = "Battery Present", 599 }, 600 { 601 .id = AXP_SENSOR_BATT_CHARGING, 602 .name = "batcharging", 603 .format = "I", 604 .desc = "Battery Charging", 605 }, 606 { 607 .id = AXP_SENSOR_BATT_CHARGE_STATE, 608 .name = "batchargestate", 609 .format = "I", 610 .desc = "Battery Charge State", 611 }, 612 { 613 .id = AXP_SENSOR_BATT_VOLTAGE, 614 .name = "batvolt", 615 .format = "I", 616 .desc = "Battery Voltage", 617 }, 618 { 619 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 620 .name = "batchargecurrent", 621 .format = "I", 622 .desc = "Average Battery Charging Current", 623 }, 624 { 625 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 626 .name = "batdischargecurrent", 627 .format = "I", 628 .desc = "Average Battery Discharging Current", 629 }, 630 { 631 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 632 .name = "batcapacitypercent", 633 .format = "I", 634 .desc = "Battery Capacity Percentage", 635 }, 636 { 637 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 638 .name = "batmaxcapacity", 639 .format = "I", 640 .desc = "Battery Maximum Capacity", 641 }, 642 { 643 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 644 .name = "batcurrentcapacity", 645 .format = "I", 646 .desc = "Battery Current Capacity", 647 }, 648 }; 649 650 struct axp8xx_config { 651 const char *name; 652 int batsense_step; /* uV */ 653 int charge_step; /* uA */ 654 int discharge_step; /* uA */ 655 int maxcap_step; /* uAh */ 656 int coulomb_step; /* uAh */ 657 }; 658 659 static struct axp8xx_config axp803_config = { 660 .name = "AXP803", 661 .batsense_step = 1100, 662 .charge_step = 1000, 663 .discharge_step = 1000, 664 .maxcap_step = 1456, 665 .coulomb_step = 1456, 666 }; 667 668 struct axp8xx_softc; 669 670 struct axp8xx_reg_sc { 671 struct regnode *regnode; 672 device_t base_dev; 673 struct axp8xx_regdef *def; 674 phandle_t xref; 675 struct regnode_std_param *param; 676 }; 677 678 struct axp8xx_softc { 679 struct resource *res; 680 uint16_t addr; 681 void *ih; 682 device_t gpiodev; 683 struct mtx mtx; 684 int busy; 685 686 int type; 687 688 /* Configs */ 689 const struct axp8xx_config *config; 690 691 /* Sensors */ 692 const struct axp8xx_sensors *sensors; 693 int nsensors; 694 695 /* Regulators */ 696 struct axp8xx_reg_sc **regs; 697 int nregs; 698 699 /* Warning, shutdown thresholds */ 700 int warn_thres; 701 int shut_thres; 702 }; 703 704 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 705 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 706 707 static int 708 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 709 { 710 struct axp8xx_softc *sc; 711 struct iic_msg msg[2]; 712 713 sc = device_get_softc(dev); 714 715 msg[0].slave = sc->addr; 716 msg[0].flags = IIC_M_WR; 717 msg[0].len = 1; 718 msg[0].buf = ® 719 720 msg[1].slave = sc->addr; 721 msg[1].flags = IIC_M_RD; 722 msg[1].len = size; 723 msg[1].buf = data; 724 725 return (iicbus_transfer(dev, msg, 2)); 726 } 727 728 static int 729 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 730 { 731 struct axp8xx_softc *sc; 732 struct iic_msg msg[2]; 733 734 sc = device_get_softc(dev); 735 736 msg[0].slave = sc->addr; 737 msg[0].flags = IIC_M_WR; 738 msg[0].len = 1; 739 msg[0].buf = ® 740 741 msg[1].slave = sc->addr; 742 msg[1].flags = IIC_M_WR; 743 msg[1].len = 1; 744 msg[1].buf = &val; 745 746 return (iicbus_transfer(dev, msg, 2)); 747 } 748 749 static int 750 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 751 { 752 struct axp8xx_reg_sc *sc; 753 uint8_t val; 754 755 sc = regnode_get_softc(regnode); 756 757 if (bootverbose) 758 device_printf(sc->base_dev, "%sable %s (%s)\n", 759 enable ? "En" : "Dis", 760 regnode_get_name(regnode), 761 sc->def->name); 762 763 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 764 val &= ~sc->def->enable_mask; 765 if (enable) 766 val |= sc->def->enable_value; 767 else { 768 if (sc->def->disable_value) 769 val |= sc->def->disable_value; 770 else 771 val &= ~sc->def->enable_value; 772 } 773 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 774 775 *udelay = 0; 776 777 return (0); 778 } 779 780 static void 781 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 782 { 783 if (val < sc->def->voltage_nstep1) 784 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 785 else 786 *uv = sc->def->voltage_min + 787 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 788 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 789 *uv *= 1000; 790 } 791 792 static int 793 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 794 int max_uvolt, uint8_t *val) 795 { 796 uint8_t nval; 797 int nstep, uvolt; 798 799 nval = 0; 800 uvolt = sc->def->voltage_min * 1000; 801 802 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 803 nstep++) { 804 ++nval; 805 uvolt += (sc->def->voltage_step1 * 1000); 806 } 807 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 808 nstep++) { 809 ++nval; 810 uvolt += (sc->def->voltage_step2 * 1000); 811 } 812 if (uvolt > max_uvolt) 813 return (EINVAL); 814 815 *val = nval; 816 return (0); 817 } 818 819 static int 820 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 821 int max_uvolt, int *udelay) 822 { 823 struct axp8xx_reg_sc *sc; 824 uint8_t val; 825 826 sc = regnode_get_softc(regnode); 827 828 if (bootverbose) 829 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 830 regnode_get_name(regnode), 831 sc->def->name, 832 min_uvolt, max_uvolt); 833 834 if (sc->def->voltage_step1 == 0) 835 return (ENXIO); 836 837 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 838 return (ERANGE); 839 840 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 841 842 *udelay = 0; 843 844 return (0); 845 } 846 847 static int 848 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 849 { 850 struct axp8xx_reg_sc *sc; 851 uint8_t val; 852 853 sc = regnode_get_softc(regnode); 854 855 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 856 return (ENXIO); 857 858 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 859 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 860 861 return (0); 862 } 863 864 static regnode_method_t axp8xx_regnode_methods[] = { 865 /* Regulator interface */ 866 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 867 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 868 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 869 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage), 870 REGNODEMETHOD_END 871 }; 872 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 873 sizeof(struct axp8xx_reg_sc), regnode_class); 874 875 static void 876 axp8xx_shutdown(void *devp, int howto) 877 { 878 device_t dev; 879 880 if ((howto & RB_POWEROFF) == 0) 881 return; 882 883 dev = devp; 884 885 if (bootverbose) 886 device_printf(dev, "Shutdown Axp8xx\n"); 887 888 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 889 } 890 891 static int 892 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 893 { 894 device_t dev = arg1; 895 uint8_t data; 896 int val, error; 897 898 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 899 if (error != 0) 900 return (error); 901 902 if (bootverbose) 903 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 904 val = (data & AXP_CHARGERCTL1_CMASK); 905 error = sysctl_handle_int(oidp, &val, 0, req); 906 if (error || !req->newptr) /* error || read request */ 907 return (error); 908 909 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 910 return (EINVAL); 911 912 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 913 axp8xx_write(dev, AXP_CHARGERCTL1, val); 914 915 return (0); 916 } 917 918 static int 919 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 920 { 921 struct axp8xx_softc *sc; 922 device_t dev = arg1; 923 enum axp8xx_sensor sensor = arg2; 924 const struct axp8xx_config *c; 925 uint8_t data; 926 int val, i, found, batt_val; 927 uint8_t lo, hi; 928 929 sc = device_get_softc(dev); 930 c = sc->config; 931 932 for (found = 0, i = 0; i < sc->nsensors; i++) { 933 if (sc->sensors[i].id == sensor) { 934 found = 1; 935 break; 936 } 937 } 938 939 if (found == 0) 940 return (ENOENT); 941 942 switch (sensor) { 943 case AXP_SENSOR_ACIN_PRESENT: 944 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 945 val = !!(data & AXP_POWERSRC_ACIN); 946 break; 947 case AXP_SENSOR_VBUS_PRESENT: 948 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 949 val = !!(data & AXP_POWERSRC_VBUS); 950 break; 951 case AXP_SENSOR_BATT_PRESENT: 952 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 953 if (data & AXP_POWERMODE_BAT_VALID) 954 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 955 } 956 break; 957 case AXP_SENSOR_BATT_CHARGING: 958 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 959 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 960 break; 961 case AXP_SENSOR_BATT_CHARGE_STATE: 962 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 963 (data & AXP_BAT_CAP_VALID) != 0) { 964 batt_val = (data & AXP_BAT_CAP_PERCENT); 965 if (batt_val <= sc->shut_thres) 966 val = BATT_CAPACITY_CRITICAL; 967 else if (batt_val <= sc->warn_thres) 968 val = BATT_CAPACITY_WARNING; 969 else 970 val = BATT_CAPACITY_NORMAL; 971 } 972 break; 973 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 974 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 975 (data & AXP_BAT_CAP_VALID) != 0) 976 val = (data & AXP_BAT_CAP_PERCENT); 977 break; 978 case AXP_SENSOR_BATT_VOLTAGE: 979 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 980 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 981 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 982 val *= c->batsense_step; 983 } 984 break; 985 case AXP_SENSOR_BATT_CHARGE_CURRENT: 986 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 987 (data & AXP_POWERSRC_CHARING) != 0 && 988 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 989 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 990 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 991 val *= c->charge_step; 992 } 993 break; 994 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 995 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 996 (data & AXP_POWERSRC_CHARING) == 0 && 997 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 998 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 999 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1000 val *= c->discharge_step; 1001 } 1002 break; 1003 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1004 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1005 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1006 val = AXP_SENSOR_COULOMB(hi, lo); 1007 val *= c->maxcap_step; 1008 } 1009 break; 1010 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1011 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1012 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1013 val = AXP_SENSOR_COULOMB(hi, lo); 1014 val *= c->coulomb_step; 1015 } 1016 break; 1017 } 1018 1019 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1020 } 1021 1022 static void 1023 axp8xx_intr(void *arg) 1024 { 1025 device_t dev; 1026 uint8_t val; 1027 int error; 1028 1029 dev = arg; 1030 1031 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1032 if (error != 0) 1033 return; 1034 1035 if (val) { 1036 if (bootverbose) 1037 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1038 if (val & AXP_IRQSTAT1_ACIN_HI) 1039 devctl_notify("PMU", "AC", "plugged", NULL); 1040 if (val & AXP_IRQSTAT1_ACIN_LO) 1041 devctl_notify("PMU", "AC", "unplugged", NULL); 1042 if (val & AXP_IRQSTAT1_VBUS_HI) 1043 devctl_notify("PMU", "USB", "plugged", NULL); 1044 if (val & AXP_IRQSTAT1_VBUS_LO) 1045 devctl_notify("PMU", "USB", "unplugged", NULL); 1046 /* Acknowledge */ 1047 axp8xx_write(dev, AXP_IRQSTAT1, val); 1048 } 1049 1050 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1051 if (error != 0) 1052 return; 1053 1054 if (val) { 1055 if (bootverbose) 1056 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1057 if (val & AXP_IRQSTAT2_BATCHGD) 1058 devctl_notify("PMU", "Battery", "charged", NULL); 1059 if (val & AXP_IRQSTAT2_BATCHGC) 1060 devctl_notify("PMU", "Battery", "charging", NULL); 1061 if (val & AXP_IRQSTAT2_BAT_NO) 1062 devctl_notify("PMU", "Battery", "absent", NULL); 1063 if (val & AXP_IRQSTAT2_BAT_IN) 1064 devctl_notify("PMU", "Battery", "plugged", NULL); 1065 /* Acknowledge */ 1066 axp8xx_write(dev, AXP_IRQSTAT2, val); 1067 } 1068 1069 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1070 if (error != 0) 1071 return; 1072 1073 if (val) { 1074 /* Acknowledge */ 1075 axp8xx_write(dev, AXP_IRQSTAT3, val); 1076 } 1077 1078 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1079 if (error != 0) 1080 return; 1081 1082 if (val) { 1083 if (bootverbose) 1084 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1085 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1086 devctl_notify("PMU", "Battery", "shutdown threshold", NULL); 1087 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1088 devctl_notify("PMU", "Battery", "warning threshold", NULL); 1089 /* Acknowledge */ 1090 axp8xx_write(dev, AXP_IRQSTAT4, val); 1091 } 1092 1093 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1094 if (error != 0) 1095 return; 1096 1097 if (val != 0) { 1098 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1099 if (bootverbose) 1100 device_printf(dev, "Power button pressed\n"); 1101 shutdown_nice(RB_POWEROFF); 1102 } 1103 /* Acknowledge */ 1104 axp8xx_write(dev, AXP_IRQSTAT5, val); 1105 } 1106 1107 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1108 if (error != 0) 1109 return; 1110 1111 if (val) { 1112 /* Acknowledge */ 1113 axp8xx_write(dev, AXP_IRQSTAT6, val); 1114 } 1115 } 1116 1117 static device_t 1118 axp8xx_gpio_get_bus(device_t dev) 1119 { 1120 struct axp8xx_softc *sc; 1121 1122 sc = device_get_softc(dev); 1123 1124 return (sc->gpiodev); 1125 } 1126 1127 static int 1128 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1129 { 1130 *maxpin = nitems(axp8xx_pins) - 1; 1131 1132 return (0); 1133 } 1134 1135 static int 1136 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1137 { 1138 if (pin >= nitems(axp8xx_pins)) 1139 return (EINVAL); 1140 1141 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1142 1143 return (0); 1144 } 1145 1146 static int 1147 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1148 { 1149 if (pin >= nitems(axp8xx_pins)) 1150 return (EINVAL); 1151 1152 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1153 1154 return (0); 1155 } 1156 1157 static int 1158 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1159 { 1160 struct axp8xx_softc *sc; 1161 uint8_t data, func; 1162 int error; 1163 1164 if (pin >= nitems(axp8xx_pins)) 1165 return (EINVAL); 1166 1167 sc = device_get_softc(dev); 1168 1169 AXP_LOCK(sc); 1170 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1171 if (error == 0) { 1172 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1173 if (func == AXP_GPIO_FUNC_INPUT) 1174 *flags = GPIO_PIN_INPUT; 1175 else if (func == AXP_GPIO_FUNC_DRVLO || 1176 func == AXP_GPIO_FUNC_DRVHI) 1177 *flags = GPIO_PIN_OUTPUT; 1178 else 1179 *flags = 0; 1180 } 1181 AXP_UNLOCK(sc); 1182 1183 return (error); 1184 } 1185 1186 static int 1187 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1188 { 1189 struct axp8xx_softc *sc; 1190 uint8_t data; 1191 int error; 1192 1193 if (pin >= nitems(axp8xx_pins)) 1194 return (EINVAL); 1195 1196 sc = device_get_softc(dev); 1197 1198 AXP_LOCK(sc); 1199 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1200 if (error == 0) { 1201 data &= ~AXP_GPIO_FUNC; 1202 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1203 if ((flags & GPIO_PIN_OUTPUT) == 0) 1204 data |= AXP_GPIO_FUNC_INPUT; 1205 } 1206 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1207 } 1208 AXP_UNLOCK(sc); 1209 1210 return (error); 1211 } 1212 1213 static int 1214 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1215 { 1216 struct axp8xx_softc *sc; 1217 uint8_t data, func; 1218 int error; 1219 1220 if (pin >= nitems(axp8xx_pins)) 1221 return (EINVAL); 1222 1223 sc = device_get_softc(dev); 1224 1225 AXP_LOCK(sc); 1226 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1227 if (error == 0) { 1228 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1229 switch (func) { 1230 case AXP_GPIO_FUNC_DRVLO: 1231 *val = 0; 1232 break; 1233 case AXP_GPIO_FUNC_DRVHI: 1234 *val = 1; 1235 break; 1236 case AXP_GPIO_FUNC_INPUT: 1237 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1238 if (error == 0) 1239 *val = (data & (1 << pin)) ? 1 : 0; 1240 break; 1241 default: 1242 error = EIO; 1243 break; 1244 } 1245 } 1246 AXP_UNLOCK(sc); 1247 1248 return (error); 1249 } 1250 1251 static int 1252 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1253 { 1254 struct axp8xx_softc *sc; 1255 uint8_t data, func; 1256 int error; 1257 1258 if (pin >= nitems(axp8xx_pins)) 1259 return (EINVAL); 1260 1261 sc = device_get_softc(dev); 1262 1263 AXP_LOCK(sc); 1264 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1265 if (error == 0) { 1266 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1267 switch (func) { 1268 case AXP_GPIO_FUNC_DRVLO: 1269 case AXP_GPIO_FUNC_DRVHI: 1270 data &= ~AXP_GPIO_FUNC; 1271 data |= (val << AXP_GPIO_FUNC_SHIFT); 1272 break; 1273 default: 1274 error = EIO; 1275 break; 1276 } 1277 } 1278 if (error == 0) 1279 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1280 AXP_UNLOCK(sc); 1281 1282 return (error); 1283 } 1284 1285 1286 static int 1287 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1288 { 1289 struct axp8xx_softc *sc; 1290 uint8_t data, func; 1291 int error; 1292 1293 if (pin >= nitems(axp8xx_pins)) 1294 return (EINVAL); 1295 1296 sc = device_get_softc(dev); 1297 1298 AXP_LOCK(sc); 1299 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1300 if (error == 0) { 1301 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1302 switch (func) { 1303 case AXP_GPIO_FUNC_DRVLO: 1304 data &= ~AXP_GPIO_FUNC; 1305 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1306 break; 1307 case AXP_GPIO_FUNC_DRVHI: 1308 data &= ~AXP_GPIO_FUNC; 1309 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1310 break; 1311 default: 1312 error = EIO; 1313 break; 1314 } 1315 } 1316 if (error == 0) 1317 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1318 AXP_UNLOCK(sc); 1319 1320 return (error); 1321 } 1322 1323 static int 1324 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1325 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1326 { 1327 if (gpios[0] >= nitems(axp8xx_pins)) 1328 return (EINVAL); 1329 1330 *pin = gpios[0]; 1331 *flags = gpios[1]; 1332 1333 return (0); 1334 } 1335 1336 static phandle_t 1337 axp8xx_get_node(device_t dev, device_t bus) 1338 { 1339 return (ofw_bus_get_node(dev)); 1340 } 1341 1342 static struct axp8xx_reg_sc * 1343 axp8xx_reg_attach(device_t dev, phandle_t node, 1344 struct axp8xx_regdef *def) 1345 { 1346 struct axp8xx_reg_sc *reg_sc; 1347 struct regnode_init_def initdef; 1348 struct regnode *regnode; 1349 1350 memset(&initdef, 0, sizeof(initdef)); 1351 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1352 return (NULL); 1353 if (initdef.std_param.min_uvolt == 0) 1354 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1355 if (initdef.std_param.max_uvolt == 0) 1356 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1357 initdef.id = def->id; 1358 initdef.ofw_node = node; 1359 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1360 if (regnode == NULL) { 1361 device_printf(dev, "cannot create regulator\n"); 1362 return (NULL); 1363 } 1364 1365 reg_sc = regnode_get_softc(regnode); 1366 reg_sc->regnode = regnode; 1367 reg_sc->base_dev = dev; 1368 reg_sc->def = def; 1369 reg_sc->xref = OF_xref_from_node(node); 1370 reg_sc->param = regnode_get_stdparam(regnode); 1371 1372 regnode_register(regnode); 1373 1374 return (reg_sc); 1375 } 1376 1377 static int 1378 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1379 intptr_t *num) 1380 { 1381 struct axp8xx_softc *sc; 1382 int i; 1383 1384 sc = device_get_softc(dev); 1385 for (i = 0; i < sc->nregs; i++) { 1386 if (sc->regs[i] == NULL) 1387 continue; 1388 if (sc->regs[i]->xref == xref) { 1389 *num = sc->regs[i]->def->id; 1390 return (0); 1391 } 1392 } 1393 1394 return (ENXIO); 1395 } 1396 1397 static int 1398 axp8xx_probe(device_t dev) 1399 { 1400 if (!ofw_bus_status_okay(dev)) 1401 return (ENXIO); 1402 1403 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1404 { 1405 case AXP803: 1406 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1407 break; 1408 case AXP813: 1409 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1410 break; 1411 default: 1412 return (ENXIO); 1413 } 1414 1415 return (BUS_PROBE_DEFAULT); 1416 } 1417 1418 static int 1419 axp8xx_attach(device_t dev) 1420 { 1421 struct axp8xx_softc *sc; 1422 struct axp8xx_reg_sc *reg; 1423 uint8_t chip_id, val; 1424 phandle_t rnode, child; 1425 int error, i; 1426 1427 sc = device_get_softc(dev); 1428 1429 sc->addr = iicbus_get_addr(dev); 1430 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1431 1432 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1433 if (error != 0) { 1434 device_printf(dev, "cannot allocate resources for device\n"); 1435 return (error); 1436 } 1437 1438 if (bootverbose) { 1439 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1440 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1441 } 1442 1443 sc->nregs = nitems(axp8xx_common_regdefs); 1444 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1445 switch (sc->type) { 1446 case AXP803: 1447 sc->nregs += nitems(axp803_regdefs); 1448 break; 1449 case AXP813: 1450 sc->nregs += nitems(axp813_regdefs); 1451 break; 1452 } 1453 sc->config = &axp803_config; 1454 sc->sensors = axp8xx_common_sensors; 1455 sc->nsensors = nitems(axp8xx_common_sensors); 1456 1457 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1458 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1459 1460 /* Attach known regulators that exist in the DT */ 1461 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1462 if (rnode > 0) { 1463 for (i = 0; i < sc->nregs; i++) { 1464 char *regname; 1465 struct axp8xx_regdef *regdef; 1466 1467 if (i <= nitems(axp8xx_common_regdefs)) { 1468 regname = axp8xx_common_regdefs[i].name; 1469 regdef = &axp8xx_common_regdefs[i]; 1470 } else { 1471 int off; 1472 1473 off = i - nitems(axp8xx_common_regdefs); 1474 switch (sc->type) { 1475 case AXP803: 1476 regname = axp803_regdefs[off].name; 1477 regdef = &axp803_regdefs[off]; 1478 break; 1479 case AXP813: 1480 regname = axp813_regdefs[off].name; 1481 regdef = &axp813_regdefs[off]; 1482 break; 1483 } 1484 } 1485 child = ofw_bus_find_child(rnode, 1486 regname); 1487 if (child == 0) 1488 continue; 1489 reg = axp8xx_reg_attach(dev, child, 1490 regdef); 1491 if (reg == NULL) { 1492 device_printf(dev, 1493 "cannot attach regulator %s\n", 1494 regname); 1495 continue; 1496 } 1497 sc->regs[i] = reg; 1498 } 1499 } 1500 1501 /* Add sensors */ 1502 for (i = 0; i < sc->nsensors; i++) { 1503 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1504 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1505 OID_AUTO, sc->sensors[i].name, 1506 CTLTYPE_INT | CTLFLAG_RD, 1507 dev, sc->sensors[i].id, axp8xx_sysctl, 1508 sc->sensors[i].format, 1509 sc->sensors[i].desc); 1510 } 1511 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1512 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1513 OID_AUTO, "batchargecurrentstep", 1514 CTLTYPE_INT | CTLFLAG_RW, 1515 dev, 0, axp8xx_sysctl_chargecurrent, 1516 "I", "Battery Charging Current Step, " 1517 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1518 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1519 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1520 "12: 2600mA, 13: 2800mA"); 1521 1522 /* Get thresholds */ 1523 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1524 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1525 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE; 1526 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1527 if (bootverbose) { 1528 device_printf(dev, 1529 "Raw reg val: 0x%02x\n", val); 1530 device_printf(dev, 1531 "Warning threshold: 0x%02x\n", sc->warn_thres); 1532 device_printf(dev, 1533 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1534 } 1535 } 1536 1537 /* Enable interrupts */ 1538 axp8xx_write(dev, AXP_IRQEN1, 1539 AXP_IRQEN1_VBUS_LO | 1540 AXP_IRQEN1_VBUS_HI | 1541 AXP_IRQEN1_ACIN_LO | 1542 AXP_IRQEN1_ACIN_HI); 1543 axp8xx_write(dev, AXP_IRQEN2, 1544 AXP_IRQEN2_BATCHGD | 1545 AXP_IRQEN2_BATCHGC | 1546 AXP_IRQEN2_BAT_NO | 1547 AXP_IRQEN2_BAT_IN); 1548 axp8xx_write(dev, AXP_IRQEN3, 0); 1549 axp8xx_write(dev, AXP_IRQEN4, 1550 AXP_IRQEN4_BATLVL_LO0 | 1551 AXP_IRQEN4_BATLVL_LO1); 1552 axp8xx_write(dev, AXP_IRQEN5, 1553 AXP_IRQEN5_POKSIRQ | 1554 AXP_IRQEN5_POKLIRQ); 1555 axp8xx_write(dev, AXP_IRQEN6, 0); 1556 1557 /* Install interrupt handler */ 1558 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1559 NULL, axp8xx_intr, dev, &sc->ih); 1560 if (error != 0) { 1561 device_printf(dev, "cannot setup interrupt handler\n"); 1562 return (error); 1563 } 1564 1565 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1566 SHUTDOWN_PRI_LAST); 1567 1568 sc->gpiodev = gpiobus_attach_bus(dev); 1569 1570 return (0); 1571 } 1572 1573 static device_method_t axp8xx_methods[] = { 1574 /* Device interface */ 1575 DEVMETHOD(device_probe, axp8xx_probe), 1576 DEVMETHOD(device_attach, axp8xx_attach), 1577 1578 /* GPIO interface */ 1579 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1580 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1581 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1582 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1583 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1584 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1585 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1586 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1587 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1588 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1589 1590 /* Regdev interface */ 1591 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1592 1593 /* OFW bus interface */ 1594 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1595 1596 DEVMETHOD_END 1597 }; 1598 1599 static driver_t axp8xx_driver = { 1600 "axp8xx_pmu", 1601 axp8xx_methods, 1602 sizeof(struct axp8xx_softc), 1603 }; 1604 1605 static devclass_t axp8xx_devclass; 1606 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 1607 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1608 1609 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0, 1610 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1611 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 1612 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1613 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0); 1614 MODULE_VERSION(axp8xx, 1); 1615 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1616 SIMPLEBUS_PNP_INFO(compat_data); 1617