1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 32 */ 33 34 #include <sys/cdefs.h> 35 __FBSDID("$FreeBSD$"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/eventhandler.h> 40 #include <sys/bus.h> 41 #include <sys/rman.h> 42 #include <sys/kernel.h> 43 #include <sys/reboot.h> 44 #include <sys/gpio.h> 45 #include <sys/module.h> 46 #include <machine/bus.h> 47 48 #include <dev/iicbus/iicbus.h> 49 #include <dev/iicbus/iiconf.h> 50 51 #include <dev/gpio/gpiobusvar.h> 52 53 #include <dev/ofw/ofw_bus.h> 54 #include <dev/ofw/ofw_bus_subr.h> 55 56 #include <dev/extres/regulator/regulator.h> 57 58 #include "gpio_if.h" 59 #include "iicbus_if.h" 60 #include "regdev_if.h" 61 62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 63 64 #define AXP_POWERSRC 0x00 65 #define AXP_POWERSRC_ACIN (1 << 7) 66 #define AXP_POWERSRC_VBUS (1 << 5) 67 #define AXP_POWERSRC_VBAT (1 << 3) 68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 69 #define AXP_POWERSRC_SHORTED (1 << 1) 70 #define AXP_POWERSRC_STARTUP (1 << 0) 71 #define AXP_POWERMODE 0x01 72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 74 #define AXP_POWERMODE_BAT_VALID (1 << 4) 75 #define AXP_ICTYPE 0x03 76 #define AXP_POWERCTL1 0x10 77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 78 #define AXP_POWERCTL1_DCDC6 (1 << 5) 79 #define AXP_POWERCTL1_DCDC5 (1 << 4) 80 #define AXP_POWERCTL1_DCDC4 (1 << 3) 81 #define AXP_POWERCTL1_DCDC3 (1 << 2) 82 #define AXP_POWERCTL1_DCDC2 (1 << 1) 83 #define AXP_POWERCTL1_DCDC1 (1 << 0) 84 #define AXP_POWERCTL2 0x12 85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 86 #define AXP_POWERCTL2_DLDO4 (1 << 6) 87 #define AXP_POWERCTL2_DLDO3 (1 << 5) 88 #define AXP_POWERCTL2_DLDO2 (1 << 4) 89 #define AXP_POWERCTL2_DLDO1 (1 << 3) 90 #define AXP_POWERCTL2_ELDO3 (1 << 2) 91 #define AXP_POWERCTL2_ELDO2 (1 << 1) 92 #define AXP_POWERCTL2_ELDO1 (1 << 0) 93 #define AXP_POWERCTL3 0x13 94 #define AXP_POWERCTL3_ALDO3 (1 << 7) 95 #define AXP_POWERCTL3_ALDO2 (1 << 6) 96 #define AXP_POWERCTL3_ALDO1 (1 << 5) 97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 98 #define AXP_POWERCTL3_FLDO2 (1 << 3) 99 #define AXP_POWERCTL3_FLDO1 (1 << 2) 100 #define AXP_VOLTCTL_DLDO1 0x15 101 #define AXP_VOLTCTL_DLDO2 0x16 102 #define AXP_VOLTCTL_DLDO3 0x17 103 #define AXP_VOLTCTL_DLDO4 0x18 104 #define AXP_VOLTCTL_ELDO1 0x19 105 #define AXP_VOLTCTL_ELDO2 0x1A 106 #define AXP_VOLTCTL_ELDO3 0x1B 107 #define AXP_VOLTCTL_FLDO1 0x1C 108 #define AXP_VOLTCTL_FLDO2 0x1D 109 #define AXP_VOLTCTL_DCDC1 0x20 110 #define AXP_VOLTCTL_DCDC2 0x21 111 #define AXP_VOLTCTL_DCDC3 0x22 112 #define AXP_VOLTCTL_DCDC4 0x23 113 #define AXP_VOLTCTL_DCDC5 0x24 114 #define AXP_VOLTCTL_DCDC6 0x25 115 #define AXP_VOLTCTL_DCDC7 0x26 116 #define AXP_VOLTCTL_ALDO1 0x28 117 #define AXP_VOLTCTL_ALDO2 0x29 118 #define AXP_VOLTCTL_ALDO3 0x2A 119 #define AXP_VOLTCTL_STATUS (1 << 7) 120 #define AXP_VOLTCTL_MASK 0x7f 121 #define AXP_POWERBAT 0x32 122 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 123 #define AXP_CHARGERCTL1 0x33 124 #define AXP_CHARGERCTL1_MIN 0 125 #define AXP_CHARGERCTL1_MAX 13 126 #define AXP_CHARGERCTL1_CMASK 0xf 127 #define AXP_IRQEN1 0x40 128 #define AXP_IRQEN1_ACIN_HI (1 << 6) 129 #define AXP_IRQEN1_ACIN_LO (1 << 5) 130 #define AXP_IRQEN1_VBUS_HI (1 << 3) 131 #define AXP_IRQEN1_VBUS_LO (1 << 2) 132 #define AXP_IRQEN2 0x41 133 #define AXP_IRQEN2_BAT_IN (1 << 7) 134 #define AXP_IRQEN2_BAT_NO (1 << 6) 135 #define AXP_IRQEN2_BATCHGC (1 << 3) 136 #define AXP_IRQEN2_BATCHGD (1 << 2) 137 #define AXP_IRQEN3 0x42 138 #define AXP_IRQEN4 0x43 139 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 140 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 141 #define AXP_IRQEN5 0x44 142 #define AXP_IRQEN5_POKSIRQ (1 << 4) 143 #define AXP_IRQEN5_POKLIRQ (1 << 3) 144 #define AXP_IRQEN6 0x45 145 #define AXP_IRQSTAT1 0x48 146 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 147 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 148 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 149 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 150 #define AXP_IRQSTAT2 0x49 151 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 152 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 153 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 154 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 155 #define AXP_IRQSTAT3 0x4a 156 #define AXP_IRQSTAT4 0x4b 157 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 158 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 159 #define AXP_IRQSTAT5 0x4c 160 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 161 #define AXP_IRQEN5_POKLIRQ (1 << 3) 162 #define AXP_IRQSTAT6 0x4d 163 #define AXP_BATSENSE_HI 0x78 164 #define AXP_BATSENSE_LO 0x79 165 #define AXP_BATCHG_HI 0x7a 166 #define AXP_BATCHG_LO 0x7b 167 #define AXP_BATDISCHG_HI 0x7c 168 #define AXP_BATDISCHG_LO 0x7d 169 #define AXP_GPIO0_CTRL 0x90 170 #define AXP_GPIO0LDO_CTRL 0x91 171 #define AXP_GPIO1_CTRL 0x92 172 #define AXP_GPIO1LDO_CTRL 0x93 173 #define AXP_GPIO_FUNC (0x7 << 0) 174 #define AXP_GPIO_FUNC_SHIFT 0 175 #define AXP_GPIO_FUNC_DRVLO 0 176 #define AXP_GPIO_FUNC_DRVHI 1 177 #define AXP_GPIO_FUNC_INPUT 2 178 #define AXP_GPIO_FUNC_LDO_ON 3 179 #define AXP_GPIO_FUNC_LDO_OFF 4 180 #define AXP_GPIO_SIGBIT 0x94 181 #define AXP_GPIO_PD 0x97 182 #define AXP_FUEL_GAUGECTL 0xb8 183 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 184 185 #define AXP_BAT_CAP 0xb9 186 #define AXP_BAT_CAP_VALID (1 << 7) 187 #define AXP_BAT_CAP_PERCENT 0x7f 188 189 #define AXP_BAT_MAX_CAP_HI 0xe0 190 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 191 #define AXP_BAT_MAX_CAP_LO 0xe1 192 193 #define AXP_BAT_COULOMB_HI 0xe2 194 #define AXP_BAT_COULOMB_VALID (1 << 7) 195 #define AXP_BAT_COULOMB_LO 0xe3 196 197 #define AXP_BAT_CAP_WARN 0xe6 198 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 199 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 200 201 /* Sensor conversion macros */ 202 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 203 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 204 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 205 206 static const struct { 207 const char *name; 208 uint8_t ctrl_reg; 209 } axp8xx_pins[] = { 210 { "GPIO0", AXP_GPIO0_CTRL }, 211 { "GPIO1", AXP_GPIO1_CTRL }, 212 }; 213 214 enum AXP8XX_TYPE { 215 AXP803 = 1, 216 AXP813, 217 }; 218 219 static struct ofw_compat_data compat_data[] = { 220 { "x-powers,axp803", AXP803 }, 221 { "x-powers,axp813", AXP813 }, 222 { "x-powers,axp818", AXP813 }, 223 { NULL, 0 } 224 }; 225 226 static struct resource_spec axp8xx_spec[] = { 227 { SYS_RES_IRQ, 0, RF_ACTIVE }, 228 { -1, 0 } 229 }; 230 231 struct axp8xx_regdef { 232 intptr_t id; 233 char *name; 234 char *supply_name; 235 uint8_t enable_reg; 236 uint8_t enable_mask; 237 uint8_t enable_value; 238 uint8_t disable_value; 239 uint8_t voltage_reg; 240 int voltage_min; 241 int voltage_max; 242 int voltage_step1; 243 int voltage_nstep1; 244 int voltage_step2; 245 int voltage_nstep2; 246 }; 247 248 enum axp8xx_reg_id { 249 AXP8XX_REG_ID_DCDC1 = 100, 250 AXP8XX_REG_ID_DCDC2, 251 AXP8XX_REG_ID_DCDC3, 252 AXP8XX_REG_ID_DCDC4, 253 AXP8XX_REG_ID_DCDC5, 254 AXP8XX_REG_ID_DCDC6, 255 AXP813_REG_ID_DCDC7, 256 AXP803_REG_ID_DC1SW, 257 AXP8XX_REG_ID_DLDO1, 258 AXP8XX_REG_ID_DLDO2, 259 AXP8XX_REG_ID_DLDO3, 260 AXP8XX_REG_ID_DLDO4, 261 AXP8XX_REG_ID_ELDO1, 262 AXP8XX_REG_ID_ELDO2, 263 AXP8XX_REG_ID_ELDO3, 264 AXP8XX_REG_ID_ALDO1, 265 AXP8XX_REG_ID_ALDO2, 266 AXP8XX_REG_ID_ALDO3, 267 AXP8XX_REG_ID_FLDO1, 268 AXP8XX_REG_ID_FLDO2, 269 AXP813_REG_ID_FLDO3, 270 AXP8XX_REG_ID_GPIO0_LDO, 271 AXP8XX_REG_ID_GPIO1_LDO, 272 }; 273 274 static struct axp8xx_regdef axp803_regdefs[] = { 275 { 276 .id = AXP803_REG_ID_DC1SW, 277 .name = "dc1sw", 278 .enable_reg = AXP_POWERCTL2, 279 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 280 .enable_value = AXP_POWERCTL2_DC1SW, 281 }, 282 }; 283 284 static struct axp8xx_regdef axp813_regdefs[] = { 285 { 286 .id = AXP813_REG_ID_DCDC7, 287 .name = "dcdc7", 288 .enable_reg = AXP_POWERCTL1, 289 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 290 .enable_value = AXP_POWERCTL1_DCDC7, 291 .voltage_reg = AXP_VOLTCTL_DCDC7, 292 .voltage_min = 600, 293 .voltage_max = 1520, 294 .voltage_step1 = 10, 295 .voltage_nstep1 = 50, 296 .voltage_step2 = 20, 297 .voltage_nstep2 = 21, 298 }, 299 }; 300 301 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 302 { 303 .id = AXP8XX_REG_ID_DCDC1, 304 .name = "dcdc1", 305 .enable_reg = AXP_POWERCTL1, 306 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 307 .enable_value = AXP_POWERCTL1_DCDC1, 308 .voltage_reg = AXP_VOLTCTL_DCDC1, 309 .voltage_min = 1600, 310 .voltage_max = 3400, 311 .voltage_step1 = 100, 312 .voltage_nstep1 = 18, 313 }, 314 { 315 .id = AXP8XX_REG_ID_DCDC2, 316 .name = "dcdc2", 317 .enable_reg = AXP_POWERCTL1, 318 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 319 .enable_value = AXP_POWERCTL1_DCDC2, 320 .voltage_reg = AXP_VOLTCTL_DCDC2, 321 .voltage_min = 500, 322 .voltage_max = 1300, 323 .voltage_step1 = 10, 324 .voltage_nstep1 = 70, 325 .voltage_step2 = 20, 326 .voltage_nstep2 = 5, 327 }, 328 { 329 .id = AXP8XX_REG_ID_DCDC3, 330 .name = "dcdc3", 331 .enable_reg = AXP_POWERCTL1, 332 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 333 .enable_value = AXP_POWERCTL1_DCDC3, 334 .voltage_reg = AXP_VOLTCTL_DCDC3, 335 .voltage_min = 500, 336 .voltage_max = 1300, 337 .voltage_step1 = 10, 338 .voltage_nstep1 = 70, 339 .voltage_step2 = 20, 340 .voltage_nstep2 = 5, 341 }, 342 { 343 .id = AXP8XX_REG_ID_DCDC4, 344 .name = "dcdc4", 345 .enable_reg = AXP_POWERCTL1, 346 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 347 .enable_value = AXP_POWERCTL1_DCDC4, 348 .voltage_reg = AXP_VOLTCTL_DCDC4, 349 .voltage_min = 500, 350 .voltage_max = 1300, 351 .voltage_step1 = 10, 352 .voltage_nstep1 = 70, 353 .voltage_step2 = 20, 354 .voltage_nstep2 = 5, 355 }, 356 { 357 .id = AXP8XX_REG_ID_DCDC5, 358 .name = "dcdc5", 359 .enable_reg = AXP_POWERCTL1, 360 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 361 .enable_value = AXP_POWERCTL1_DCDC5, 362 .voltage_reg = AXP_VOLTCTL_DCDC5, 363 .voltage_min = 800, 364 .voltage_max = 1840, 365 .voltage_step1 = 10, 366 .voltage_nstep1 = 42, 367 .voltage_step2 = 20, 368 .voltage_nstep2 = 36, 369 }, 370 { 371 .id = AXP8XX_REG_ID_DCDC6, 372 .name = "dcdc6", 373 .enable_reg = AXP_POWERCTL1, 374 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 375 .enable_value = AXP_POWERCTL1_DCDC6, 376 .voltage_reg = AXP_VOLTCTL_DCDC6, 377 .voltage_min = 600, 378 .voltage_max = 1520, 379 .voltage_step1 = 10, 380 .voltage_nstep1 = 50, 381 .voltage_step2 = 20, 382 .voltage_nstep2 = 21, 383 }, 384 { 385 .id = AXP8XX_REG_ID_DLDO1, 386 .name = "dldo1", 387 .enable_reg = AXP_POWERCTL2, 388 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 389 .enable_value = AXP_POWERCTL2_DLDO1, 390 .voltage_reg = AXP_VOLTCTL_DLDO1, 391 .voltage_min = 700, 392 .voltage_max = 3300, 393 .voltage_step1 = 100, 394 .voltage_nstep1 = 26, 395 }, 396 { 397 .id = AXP8XX_REG_ID_DLDO2, 398 .name = "dldo2", 399 .enable_reg = AXP_POWERCTL2, 400 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 401 .enable_value = AXP_POWERCTL2_DLDO2, 402 .voltage_reg = AXP_VOLTCTL_DLDO2, 403 .voltage_min = 700, 404 .voltage_max = 4200, 405 .voltage_step1 = 100, 406 .voltage_nstep1 = 27, 407 .voltage_step2 = 200, 408 .voltage_nstep2 = 4, 409 }, 410 { 411 .id = AXP8XX_REG_ID_DLDO3, 412 .name = "dldo3", 413 .enable_reg = AXP_POWERCTL2, 414 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 415 .enable_value = AXP_POWERCTL2_DLDO3, 416 .voltage_reg = AXP_VOLTCTL_DLDO3, 417 .voltage_min = 700, 418 .voltage_max = 3300, 419 .voltage_step1 = 100, 420 .voltage_nstep1 = 26, 421 }, 422 { 423 .id = AXP8XX_REG_ID_DLDO4, 424 .name = "dldo4", 425 .enable_reg = AXP_POWERCTL2, 426 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 427 .enable_value = AXP_POWERCTL2_DLDO4, 428 .voltage_reg = AXP_VOLTCTL_DLDO4, 429 .voltage_min = 700, 430 .voltage_max = 3300, 431 .voltage_step1 = 100, 432 .voltage_nstep1 = 26, 433 }, 434 { 435 .id = AXP8XX_REG_ID_ALDO1, 436 .name = "aldo1", 437 .enable_reg = AXP_POWERCTL3, 438 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 439 .enable_value = AXP_POWERCTL3_ALDO1, 440 .voltage_min = 700, 441 .voltage_max = 3300, 442 .voltage_step1 = 100, 443 .voltage_nstep1 = 26, 444 }, 445 { 446 .id = AXP8XX_REG_ID_ALDO2, 447 .name = "aldo2", 448 .enable_reg = AXP_POWERCTL3, 449 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 450 .enable_value = AXP_POWERCTL3_ALDO2, 451 .voltage_min = 700, 452 .voltage_max = 3300, 453 .voltage_step1 = 100, 454 .voltage_nstep1 = 26, 455 }, 456 { 457 .id = AXP8XX_REG_ID_ALDO3, 458 .name = "aldo3", 459 .enable_reg = AXP_POWERCTL3, 460 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 461 .enable_value = AXP_POWERCTL3_ALDO3, 462 .voltage_min = 700, 463 .voltage_max = 3300, 464 .voltage_step1 = 100, 465 .voltage_nstep1 = 26, 466 }, 467 { 468 .id = AXP8XX_REG_ID_ELDO1, 469 .name = "eldo1", 470 .enable_reg = AXP_POWERCTL2, 471 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 472 .enable_value = AXP_POWERCTL2_ELDO1, 473 .voltage_min = 700, 474 .voltage_max = 1900, 475 .voltage_step1 = 50, 476 .voltage_nstep1 = 24, 477 }, 478 { 479 .id = AXP8XX_REG_ID_ELDO2, 480 .name = "eldo2", 481 .enable_reg = AXP_POWERCTL2, 482 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 483 .enable_value = AXP_POWERCTL2_ELDO2, 484 .voltage_min = 700, 485 .voltage_max = 1900, 486 .voltage_step1 = 50, 487 .voltage_nstep1 = 24, 488 }, 489 { 490 .id = AXP8XX_REG_ID_ELDO3, 491 .name = "eldo3", 492 .enable_reg = AXP_POWERCTL2, 493 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 494 .enable_value = AXP_POWERCTL2_ELDO3, 495 .voltage_min = 700, 496 .voltage_max = 1900, 497 .voltage_step1 = 50, 498 .voltage_nstep1 = 24, 499 }, 500 { 501 .id = AXP8XX_REG_ID_FLDO1, 502 .name = "fldo1", 503 .enable_reg = AXP_POWERCTL3, 504 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 505 .enable_value = AXP_POWERCTL3_FLDO1, 506 .voltage_min = 700, 507 .voltage_max = 1450, 508 .voltage_step1 = 50, 509 .voltage_nstep1 = 15, 510 }, 511 { 512 .id = AXP8XX_REG_ID_FLDO2, 513 .name = "fldo2", 514 .enable_reg = AXP_POWERCTL3, 515 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 516 .enable_value = AXP_POWERCTL3_FLDO2, 517 .voltage_min = 700, 518 .voltage_max = 1450, 519 .voltage_step1 = 50, 520 .voltage_nstep1 = 15, 521 }, 522 { 523 .id = AXP8XX_REG_ID_GPIO0_LDO, 524 .name = "ldo-io0", 525 .enable_reg = AXP_GPIO0_CTRL, 526 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 527 .enable_value = AXP_GPIO_FUNC_LDO_ON, 528 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 529 .voltage_reg = AXP_GPIO0LDO_CTRL, 530 .voltage_min = 700, 531 .voltage_max = 3300, 532 .voltage_step1 = 100, 533 .voltage_nstep1 = 26, 534 }, 535 { 536 .id = AXP8XX_REG_ID_GPIO1_LDO, 537 .name = "ldo-io1", 538 .enable_reg = AXP_GPIO1_CTRL, 539 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 540 .enable_value = AXP_GPIO_FUNC_LDO_ON, 541 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 542 .voltage_reg = AXP_GPIO1LDO_CTRL, 543 .voltage_min = 700, 544 .voltage_max = 3300, 545 .voltage_step1 = 100, 546 .voltage_nstep1 = 26, 547 }, 548 }; 549 550 enum axp8xx_sensor { 551 AXP_SENSOR_ACIN_PRESENT, 552 AXP_SENSOR_VBUS_PRESENT, 553 AXP_SENSOR_BATT_PRESENT, 554 AXP_SENSOR_BATT_CHARGING, 555 AXP_SENSOR_BATT_CHARGE_STATE, 556 AXP_SENSOR_BATT_VOLTAGE, 557 AXP_SENSOR_BATT_CHARGE_CURRENT, 558 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 559 AXP_SENSOR_BATT_CAPACITY_PERCENT, 560 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 561 AXP_SENSOR_BATT_CURRENT_CAPACITY, 562 }; 563 564 enum battery_capacity_state { 565 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 566 BATT_CAPACITY_WARNING, /* warning cap in battery */ 567 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 568 BATT_CAPACITY_HIGH, /* high cap in battery */ 569 BATT_CAPACITY_MAX, /* maximum cap in battery */ 570 BATT_CAPACITY_LOW /* low cap in battery */ 571 }; 572 573 struct axp8xx_sensors { 574 int id; 575 const char *name; 576 const char *desc; 577 const char *format; 578 }; 579 580 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 581 { 582 .id = AXP_SENSOR_ACIN_PRESENT, 583 .name = "acin", 584 .format = "I", 585 .desc = "ACIN Present", 586 }, 587 { 588 .id = AXP_SENSOR_VBUS_PRESENT, 589 .name = "vbus", 590 .format = "I", 591 .desc = "VBUS Present", 592 }, 593 { 594 .id = AXP_SENSOR_BATT_PRESENT, 595 .name = "bat", 596 .format = "I", 597 .desc = "Battery Present", 598 }, 599 { 600 .id = AXP_SENSOR_BATT_CHARGING, 601 .name = "batcharging", 602 .format = "I", 603 .desc = "Battery Charging", 604 }, 605 { 606 .id = AXP_SENSOR_BATT_CHARGE_STATE, 607 .name = "batchargestate", 608 .format = "I", 609 .desc = "Battery Charge State", 610 }, 611 { 612 .id = AXP_SENSOR_BATT_VOLTAGE, 613 .name = "batvolt", 614 .format = "I", 615 .desc = "Battery Voltage", 616 }, 617 { 618 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 619 .name = "batchargecurrent", 620 .format = "I", 621 .desc = "Average Battery Charging Current", 622 }, 623 { 624 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 625 .name = "batdischargecurrent", 626 .format = "I", 627 .desc = "Average Battery Discharging Current", 628 }, 629 { 630 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 631 .name = "batcapacitypercent", 632 .format = "I", 633 .desc = "Battery Capacity Percentage", 634 }, 635 { 636 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 637 .name = "batmaxcapacity", 638 .format = "I", 639 .desc = "Battery Maximum Capacity", 640 }, 641 { 642 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 643 .name = "batcurrentcapacity", 644 .format = "I", 645 .desc = "Battery Current Capacity", 646 }, 647 }; 648 649 struct axp8xx_config { 650 const char *name; 651 int batsense_step; /* uV */ 652 int charge_step; /* uA */ 653 int discharge_step; /* uA */ 654 int maxcap_step; /* uAh */ 655 int coulomb_step; /* uAh */ 656 }; 657 658 static struct axp8xx_config axp803_config = { 659 .name = "AXP803", 660 .batsense_step = 1100, 661 .charge_step = 1000, 662 .discharge_step = 1000, 663 .maxcap_step = 1456, 664 .coulomb_step = 1456, 665 }; 666 667 struct axp8xx_softc; 668 669 struct axp8xx_reg_sc { 670 struct regnode *regnode; 671 device_t base_dev; 672 struct axp8xx_regdef *def; 673 phandle_t xref; 674 struct regnode_std_param *param; 675 }; 676 677 struct axp8xx_softc { 678 struct resource *res; 679 uint16_t addr; 680 void *ih; 681 device_t gpiodev; 682 struct mtx mtx; 683 int busy; 684 685 int type; 686 687 /* Configs */ 688 const struct axp8xx_config *config; 689 690 /* Sensors */ 691 const struct axp8xx_sensors *sensors; 692 int nsensors; 693 694 /* Regulators */ 695 struct axp8xx_reg_sc **regs; 696 int nregs; 697 698 /* Warning, shutdown thresholds */ 699 int warn_thres; 700 int shut_thres; 701 }; 702 703 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 704 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 705 706 static int 707 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 708 { 709 struct axp8xx_softc *sc; 710 struct iic_msg msg[2]; 711 712 sc = device_get_softc(dev); 713 714 msg[0].slave = sc->addr; 715 msg[0].flags = IIC_M_WR; 716 msg[0].len = 1; 717 msg[0].buf = ® 718 719 msg[1].slave = sc->addr; 720 msg[1].flags = IIC_M_RD; 721 msg[1].len = size; 722 msg[1].buf = data; 723 724 return (iicbus_transfer(dev, msg, 2)); 725 } 726 727 static int 728 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 729 { 730 struct axp8xx_softc *sc; 731 struct iic_msg msg[2]; 732 733 sc = device_get_softc(dev); 734 735 msg[0].slave = sc->addr; 736 msg[0].flags = IIC_M_WR; 737 msg[0].len = 1; 738 msg[0].buf = ® 739 740 msg[1].slave = sc->addr; 741 msg[1].flags = IIC_M_WR; 742 msg[1].len = 1; 743 msg[1].buf = &val; 744 745 return (iicbus_transfer(dev, msg, 2)); 746 } 747 748 static int 749 axp8xx_regnode_init(struct regnode *regnode) 750 { 751 return (0); 752 } 753 754 static int 755 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 756 { 757 struct axp8xx_reg_sc *sc; 758 uint8_t val; 759 760 sc = regnode_get_softc(regnode); 761 762 if (bootverbose) 763 device_printf(sc->base_dev, "%sable %s (%s)\n", 764 enable ? "En" : "Dis", 765 regnode_get_name(regnode), 766 sc->def->name); 767 768 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 769 val &= ~sc->def->enable_mask; 770 if (enable) 771 val |= sc->def->enable_value; 772 else { 773 if (sc->def->disable_value) 774 val |= sc->def->disable_value; 775 else 776 val &= ~sc->def->enable_value; 777 } 778 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 779 780 *udelay = 0; 781 782 return (0); 783 } 784 785 static void 786 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 787 { 788 if (val < sc->def->voltage_nstep1) 789 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 790 else 791 *uv = sc->def->voltage_min + 792 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 793 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 794 *uv *= 1000; 795 } 796 797 static int 798 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 799 int max_uvolt, uint8_t *val) 800 { 801 uint8_t nval; 802 int nstep, uvolt; 803 804 nval = 0; 805 uvolt = sc->def->voltage_min * 1000; 806 807 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 808 nstep++) { 809 ++nval; 810 uvolt += (sc->def->voltage_step1 * 1000); 811 } 812 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 813 nstep++) { 814 ++nval; 815 uvolt += (sc->def->voltage_step2 * 1000); 816 } 817 if (uvolt > max_uvolt) 818 return (EINVAL); 819 820 *val = nval; 821 return (0); 822 } 823 824 static int 825 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 826 int max_uvolt, int *udelay) 827 { 828 struct axp8xx_reg_sc *sc; 829 uint8_t val; 830 831 sc = regnode_get_softc(regnode); 832 833 if (bootverbose) 834 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 835 regnode_get_name(regnode), 836 sc->def->name, 837 min_uvolt, max_uvolt); 838 839 if (sc->def->voltage_step1 == 0) 840 return (ENXIO); 841 842 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 843 return (ERANGE); 844 845 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 846 847 *udelay = 0; 848 849 return (0); 850 } 851 852 static int 853 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 854 { 855 struct axp8xx_reg_sc *sc; 856 uint8_t val; 857 858 sc = regnode_get_softc(regnode); 859 860 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 861 return (ENXIO); 862 863 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 864 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 865 866 return (0); 867 } 868 869 static regnode_method_t axp8xx_regnode_methods[] = { 870 /* Regulator interface */ 871 REGNODEMETHOD(regnode_init, axp8xx_regnode_init), 872 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 873 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 874 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 875 REGNODEMETHOD_END 876 }; 877 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 878 sizeof(struct axp8xx_reg_sc), regnode_class); 879 880 static void 881 axp8xx_shutdown(void *devp, int howto) 882 { 883 device_t dev; 884 885 if ((howto & RB_POWEROFF) == 0) 886 return; 887 888 dev = devp; 889 890 if (bootverbose) 891 device_printf(dev, "Shutdown Axp8xx\n"); 892 893 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 894 } 895 896 static int 897 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 898 { 899 device_t dev = arg1; 900 uint8_t data; 901 int val, error; 902 903 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 904 if (error != 0) 905 return (error); 906 907 if (bootverbose) 908 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 909 val = (data & AXP_CHARGERCTL1_CMASK); 910 error = sysctl_handle_int(oidp, &val, 0, req); 911 if (error || !req->newptr) /* error || read request */ 912 return (error); 913 914 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 915 return (EINVAL); 916 917 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 918 axp8xx_write(dev, AXP_CHARGERCTL1, val); 919 920 return (0); 921 } 922 923 static int 924 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 925 { 926 struct axp8xx_softc *sc; 927 device_t dev = arg1; 928 enum axp8xx_sensor sensor = arg2; 929 const struct axp8xx_config *c; 930 uint8_t data; 931 int val, i, found, batt_val; 932 uint8_t lo, hi; 933 934 sc = device_get_softc(dev); 935 c = sc->config; 936 937 for (found = 0, i = 0; i < sc->nsensors; i++) { 938 if (sc->sensors[i].id == sensor) { 939 found = 1; 940 break; 941 } 942 } 943 944 if (found == 0) 945 return (ENOENT); 946 947 switch (sensor) { 948 case AXP_SENSOR_ACIN_PRESENT: 949 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 950 val = !!(data & AXP_POWERSRC_ACIN); 951 break; 952 case AXP_SENSOR_VBUS_PRESENT: 953 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 954 val = !!(data & AXP_POWERSRC_VBUS); 955 break; 956 case AXP_SENSOR_BATT_PRESENT: 957 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 958 if (data & AXP_POWERMODE_BAT_VALID) 959 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 960 } 961 break; 962 case AXP_SENSOR_BATT_CHARGING: 963 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 964 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 965 break; 966 case AXP_SENSOR_BATT_CHARGE_STATE: 967 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 968 (data & AXP_BAT_CAP_VALID) != 0) { 969 batt_val = (data & AXP_BAT_CAP_PERCENT); 970 if (batt_val <= sc->shut_thres) 971 val = BATT_CAPACITY_CRITICAL; 972 else if (batt_val <= sc->warn_thres) 973 val = BATT_CAPACITY_WARNING; 974 else 975 val = BATT_CAPACITY_NORMAL; 976 } 977 break; 978 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 979 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 980 (data & AXP_BAT_CAP_VALID) != 0) 981 val = (data & AXP_BAT_CAP_PERCENT); 982 break; 983 case AXP_SENSOR_BATT_VOLTAGE: 984 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 985 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 986 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 987 val *= c->batsense_step; 988 } 989 break; 990 case AXP_SENSOR_BATT_CHARGE_CURRENT: 991 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 992 (data & AXP_POWERSRC_CHARING) != 0 && 993 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 994 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 995 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 996 val *= c->charge_step; 997 } 998 break; 999 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 1000 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1001 (data & AXP_POWERSRC_CHARING) == 0 && 1002 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 1003 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 1004 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1005 val *= c->discharge_step; 1006 } 1007 break; 1008 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1009 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1010 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1011 val = AXP_SENSOR_COULOMB(hi, lo); 1012 val *= c->maxcap_step; 1013 } 1014 break; 1015 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1016 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1017 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1018 val = AXP_SENSOR_COULOMB(hi, lo); 1019 val *= c->coulomb_step; 1020 } 1021 break; 1022 } 1023 1024 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1025 } 1026 1027 static void 1028 axp8xx_intr(void *arg) 1029 { 1030 device_t dev; 1031 uint8_t val; 1032 int error; 1033 1034 dev = arg; 1035 1036 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1037 if (error != 0) 1038 return; 1039 1040 if (val) { 1041 if (bootverbose) 1042 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1043 if (val & AXP_IRQSTAT1_ACIN_HI) 1044 devctl_notify("PMU", "AC", "plugged", NULL); 1045 if (val & AXP_IRQSTAT1_ACIN_LO) 1046 devctl_notify("PMU", "AC", "unplugged", NULL); 1047 if (val & AXP_IRQSTAT1_VBUS_HI) 1048 devctl_notify("PMU", "USB", "plugged", NULL); 1049 if (val & AXP_IRQSTAT1_VBUS_LO) 1050 devctl_notify("PMU", "USB", "unplugged", NULL); 1051 /* Acknowledge */ 1052 axp8xx_write(dev, AXP_IRQSTAT1, val); 1053 } 1054 1055 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1056 if (error != 0) 1057 return; 1058 1059 if (val) { 1060 if (bootverbose) 1061 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1062 if (val & AXP_IRQSTAT2_BATCHGD) 1063 devctl_notify("PMU", "Battery", "charged", NULL); 1064 if (val & AXP_IRQSTAT2_BATCHGC) 1065 devctl_notify("PMU", "Battery", "charging", NULL); 1066 if (val & AXP_IRQSTAT2_BAT_NO) 1067 devctl_notify("PMU", "Battery", "absent", NULL); 1068 if (val & AXP_IRQSTAT2_BAT_IN) 1069 devctl_notify("PMU", "Battery", "plugged", NULL); 1070 /* Acknowledge */ 1071 axp8xx_write(dev, AXP_IRQSTAT2, val); 1072 } 1073 1074 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1075 if (error != 0) 1076 return; 1077 1078 if (val) { 1079 /* Acknowledge */ 1080 axp8xx_write(dev, AXP_IRQSTAT3, val); 1081 } 1082 1083 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1084 if (error != 0) 1085 return; 1086 1087 if (val) { 1088 if (bootverbose) 1089 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1090 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1091 devctl_notify("PMU", "Battery", "lower than level 2", NULL); 1092 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1093 devctl_notify("PMU", "Battery", "lower than level 1", NULL); 1094 /* Acknowledge */ 1095 axp8xx_write(dev, AXP_IRQSTAT4, val); 1096 } 1097 1098 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1099 if (error != 0) 1100 return; 1101 1102 if (val != 0) { 1103 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1104 if (bootverbose) 1105 device_printf(dev, "Power button pressed\n"); 1106 shutdown_nice(RB_POWEROFF); 1107 } 1108 /* Acknowledge */ 1109 axp8xx_write(dev, AXP_IRQSTAT5, val); 1110 } 1111 1112 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1113 if (error != 0) 1114 return; 1115 1116 if (val) { 1117 /* Acknowledge */ 1118 axp8xx_write(dev, AXP_IRQSTAT6, val); 1119 } 1120 } 1121 1122 static device_t 1123 axp8xx_gpio_get_bus(device_t dev) 1124 { 1125 struct axp8xx_softc *sc; 1126 1127 sc = device_get_softc(dev); 1128 1129 return (sc->gpiodev); 1130 } 1131 1132 static int 1133 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1134 { 1135 *maxpin = nitems(axp8xx_pins) - 1; 1136 1137 return (0); 1138 } 1139 1140 static int 1141 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1142 { 1143 if (pin >= nitems(axp8xx_pins)) 1144 return (EINVAL); 1145 1146 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1147 1148 return (0); 1149 } 1150 1151 static int 1152 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1153 { 1154 if (pin >= nitems(axp8xx_pins)) 1155 return (EINVAL); 1156 1157 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1158 1159 return (0); 1160 } 1161 1162 static int 1163 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1164 { 1165 struct axp8xx_softc *sc; 1166 uint8_t data, func; 1167 int error; 1168 1169 if (pin >= nitems(axp8xx_pins)) 1170 return (EINVAL); 1171 1172 sc = device_get_softc(dev); 1173 1174 AXP_LOCK(sc); 1175 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1176 if (error == 0) { 1177 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1178 if (func == AXP_GPIO_FUNC_INPUT) 1179 *flags = GPIO_PIN_INPUT; 1180 else if (func == AXP_GPIO_FUNC_DRVLO || 1181 func == AXP_GPIO_FUNC_DRVHI) 1182 *flags = GPIO_PIN_OUTPUT; 1183 else 1184 *flags = 0; 1185 } 1186 AXP_UNLOCK(sc); 1187 1188 return (error); 1189 } 1190 1191 static int 1192 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1193 { 1194 struct axp8xx_softc *sc; 1195 uint8_t data; 1196 int error; 1197 1198 if (pin >= nitems(axp8xx_pins)) 1199 return (EINVAL); 1200 1201 sc = device_get_softc(dev); 1202 1203 AXP_LOCK(sc); 1204 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1205 if (error == 0) { 1206 data &= ~AXP_GPIO_FUNC; 1207 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1208 if ((flags & GPIO_PIN_OUTPUT) == 0) 1209 data |= AXP_GPIO_FUNC_INPUT; 1210 } 1211 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1212 } 1213 AXP_UNLOCK(sc); 1214 1215 return (error); 1216 } 1217 1218 static int 1219 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1220 { 1221 struct axp8xx_softc *sc; 1222 uint8_t data, func; 1223 int error; 1224 1225 if (pin >= nitems(axp8xx_pins)) 1226 return (EINVAL); 1227 1228 sc = device_get_softc(dev); 1229 1230 AXP_LOCK(sc); 1231 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1232 if (error == 0) { 1233 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1234 switch (func) { 1235 case AXP_GPIO_FUNC_DRVLO: 1236 *val = 0; 1237 break; 1238 case AXP_GPIO_FUNC_DRVHI: 1239 *val = 1; 1240 break; 1241 case AXP_GPIO_FUNC_INPUT: 1242 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1243 if (error == 0) 1244 *val = (data & (1 << pin)) ? 1 : 0; 1245 break; 1246 default: 1247 error = EIO; 1248 break; 1249 } 1250 } 1251 AXP_UNLOCK(sc); 1252 1253 return (error); 1254 } 1255 1256 static int 1257 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1258 { 1259 struct axp8xx_softc *sc; 1260 uint8_t data, func; 1261 int error; 1262 1263 if (pin >= nitems(axp8xx_pins)) 1264 return (EINVAL); 1265 1266 sc = device_get_softc(dev); 1267 1268 AXP_LOCK(sc); 1269 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1270 if (error == 0) { 1271 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1272 switch (func) { 1273 case AXP_GPIO_FUNC_DRVLO: 1274 case AXP_GPIO_FUNC_DRVHI: 1275 data &= ~AXP_GPIO_FUNC; 1276 data |= (val << AXP_GPIO_FUNC_SHIFT); 1277 break; 1278 default: 1279 error = EIO; 1280 break; 1281 } 1282 } 1283 if (error == 0) 1284 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1285 AXP_UNLOCK(sc); 1286 1287 return (error); 1288 } 1289 1290 1291 static int 1292 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1293 { 1294 struct axp8xx_softc *sc; 1295 uint8_t data, func; 1296 int error; 1297 1298 if (pin >= nitems(axp8xx_pins)) 1299 return (EINVAL); 1300 1301 sc = device_get_softc(dev); 1302 1303 AXP_LOCK(sc); 1304 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1305 if (error == 0) { 1306 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1307 switch (func) { 1308 case AXP_GPIO_FUNC_DRVLO: 1309 data &= ~AXP_GPIO_FUNC; 1310 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1311 break; 1312 case AXP_GPIO_FUNC_DRVHI: 1313 data &= ~AXP_GPIO_FUNC; 1314 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1315 break; 1316 default: 1317 error = EIO; 1318 break; 1319 } 1320 } 1321 if (error == 0) 1322 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1323 AXP_UNLOCK(sc); 1324 1325 return (error); 1326 } 1327 1328 static int 1329 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1330 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1331 { 1332 if (gpios[0] >= nitems(axp8xx_pins)) 1333 return (EINVAL); 1334 1335 *pin = gpios[0]; 1336 *flags = gpios[1]; 1337 1338 return (0); 1339 } 1340 1341 static phandle_t 1342 axp8xx_get_node(device_t dev, device_t bus) 1343 { 1344 return (ofw_bus_get_node(dev)); 1345 } 1346 1347 static struct axp8xx_reg_sc * 1348 axp8xx_reg_attach(device_t dev, phandle_t node, 1349 struct axp8xx_regdef *def) 1350 { 1351 struct axp8xx_reg_sc *reg_sc; 1352 struct regnode_init_def initdef; 1353 struct regnode *regnode; 1354 1355 memset(&initdef, 0, sizeof(initdef)); 1356 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1357 return (NULL); 1358 if (initdef.std_param.min_uvolt == 0) 1359 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1360 if (initdef.std_param.max_uvolt == 0) 1361 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1362 initdef.id = def->id; 1363 initdef.ofw_node = node; 1364 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1365 if (regnode == NULL) { 1366 device_printf(dev, "cannot create regulator\n"); 1367 return (NULL); 1368 } 1369 1370 reg_sc = regnode_get_softc(regnode); 1371 reg_sc->regnode = regnode; 1372 reg_sc->base_dev = dev; 1373 reg_sc->def = def; 1374 reg_sc->xref = OF_xref_from_node(node); 1375 reg_sc->param = regnode_get_stdparam(regnode); 1376 1377 regnode_register(regnode); 1378 1379 return (reg_sc); 1380 } 1381 1382 static int 1383 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1384 intptr_t *num) 1385 { 1386 struct axp8xx_softc *sc; 1387 int i; 1388 1389 sc = device_get_softc(dev); 1390 for (i = 0; i < sc->nregs; i++) { 1391 if (sc->regs[i] == NULL) 1392 continue; 1393 if (sc->regs[i]->xref == xref) { 1394 *num = sc->regs[i]->def->id; 1395 return (0); 1396 } 1397 } 1398 1399 return (ENXIO); 1400 } 1401 1402 static int 1403 axp8xx_probe(device_t dev) 1404 { 1405 if (!ofw_bus_status_okay(dev)) 1406 return (ENXIO); 1407 1408 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1409 { 1410 case AXP803: 1411 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1412 break; 1413 case AXP813: 1414 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1415 break; 1416 default: 1417 return (ENXIO); 1418 } 1419 1420 return (BUS_PROBE_DEFAULT); 1421 } 1422 1423 static int 1424 axp8xx_attach(device_t dev) 1425 { 1426 struct axp8xx_softc *sc; 1427 struct axp8xx_reg_sc *reg; 1428 uint8_t chip_id, val; 1429 phandle_t rnode, child; 1430 int error, i; 1431 1432 sc = device_get_softc(dev); 1433 1434 sc->addr = iicbus_get_addr(dev); 1435 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1436 1437 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1438 if (error != 0) { 1439 device_printf(dev, "cannot allocate resources for device\n"); 1440 return (error); 1441 } 1442 1443 if (bootverbose) { 1444 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1445 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1446 } 1447 1448 sc->nregs = nitems(axp8xx_common_regdefs); 1449 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1450 switch (sc->type) { 1451 case AXP803: 1452 sc->nregs += nitems(axp803_regdefs); 1453 break; 1454 case AXP813: 1455 sc->nregs += nitems(axp813_regdefs); 1456 break; 1457 } 1458 sc->config = &axp803_config; 1459 sc->sensors = axp8xx_common_sensors; 1460 sc->nsensors = nitems(axp8xx_common_sensors); 1461 1462 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1463 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1464 1465 /* Attach known regulators that exist in the DT */ 1466 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1467 if (rnode > 0) { 1468 for (i = 0; i < sc->nregs; i++) { 1469 char *regname; 1470 struct axp8xx_regdef *regdef; 1471 1472 if (i <= nitems(axp8xx_common_regdefs)) { 1473 regname = axp8xx_common_regdefs[i].name; 1474 regdef = &axp8xx_common_regdefs[i]; 1475 } else { 1476 int off; 1477 1478 off = i - nitems(axp8xx_common_regdefs); 1479 switch (sc->type) { 1480 case AXP803: 1481 regname = axp803_regdefs[off].name; 1482 regdef = &axp803_regdefs[off]; 1483 break; 1484 case AXP813: 1485 regname = axp813_regdefs[off].name; 1486 regdef = &axp813_regdefs[off]; 1487 break; 1488 } 1489 } 1490 child = ofw_bus_find_child(rnode, 1491 regname); 1492 if (child == 0) 1493 continue; 1494 reg = axp8xx_reg_attach(dev, child, 1495 regdef); 1496 if (reg == NULL) { 1497 device_printf(dev, 1498 "cannot attach regulator %s\n", 1499 regname); 1500 continue; 1501 } 1502 sc->regs[i] = reg; 1503 } 1504 } 1505 1506 /* Add sensors */ 1507 for (i = 0; i < sc->nsensors; i++) { 1508 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1509 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1510 OID_AUTO, sc->sensors[i].name, 1511 CTLTYPE_INT | CTLFLAG_RD, 1512 dev, sc->sensors[i].id, axp8xx_sysctl, 1513 sc->sensors[i].format, 1514 sc->sensors[i].desc); 1515 } 1516 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1517 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1518 OID_AUTO, "batchargecurrentstep", 1519 CTLTYPE_INT | CTLFLAG_RW, 1520 dev, 0, axp8xx_sysctl_chargecurrent, 1521 "I", "Battery Charging Current Step, " 1522 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1523 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1524 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1525 "12: 2600mA, 13: 2800mA"); 1526 1527 /* Get thresholds */ 1528 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1529 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1530 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1531 if (bootverbose) { 1532 device_printf(dev, 1533 "Raw reg val: 0x%02x\n", val); 1534 device_printf(dev, 1535 "Warning threshold: 0x%02x\n", sc->warn_thres); 1536 device_printf(dev, 1537 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1538 } 1539 } 1540 1541 /* Enable interrupts */ 1542 axp8xx_write(dev, AXP_IRQEN1, 1543 AXP_IRQEN1_VBUS_LO | 1544 AXP_IRQEN1_VBUS_HI | 1545 AXP_IRQEN1_ACIN_LO | 1546 AXP_IRQEN1_ACIN_HI); 1547 axp8xx_write(dev, AXP_IRQEN2, 1548 AXP_IRQEN2_BATCHGD | 1549 AXP_IRQEN2_BATCHGC | 1550 AXP_IRQEN2_BAT_NO | 1551 AXP_IRQEN2_BAT_IN); 1552 axp8xx_write(dev, AXP_IRQEN3, 0); 1553 axp8xx_write(dev, AXP_IRQEN4, 1554 AXP_IRQEN4_BATLVL_LO0 | 1555 AXP_IRQEN4_BATLVL_LO1); 1556 axp8xx_write(dev, AXP_IRQEN5, 1557 AXP_IRQEN5_POKSIRQ | 1558 AXP_IRQEN5_POKLIRQ); 1559 axp8xx_write(dev, AXP_IRQEN6, 0); 1560 1561 /* Install interrupt handler */ 1562 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1563 NULL, axp8xx_intr, dev, &sc->ih); 1564 if (error != 0) { 1565 device_printf(dev, "cannot setup interrupt handler\n"); 1566 return (error); 1567 } 1568 1569 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1570 SHUTDOWN_PRI_LAST); 1571 1572 sc->gpiodev = gpiobus_attach_bus(dev); 1573 1574 return (0); 1575 } 1576 1577 static device_method_t axp8xx_methods[] = { 1578 /* Device interface */ 1579 DEVMETHOD(device_probe, axp8xx_probe), 1580 DEVMETHOD(device_attach, axp8xx_attach), 1581 1582 /* GPIO interface */ 1583 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1584 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1585 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1586 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1587 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1588 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1589 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1590 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1591 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1592 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1593 1594 /* Regdev interface */ 1595 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1596 1597 /* OFW bus interface */ 1598 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1599 1600 DEVMETHOD_END 1601 }; 1602 1603 static driver_t axp8xx_driver = { 1604 "axp8xx_pmu", 1605 axp8xx_methods, 1606 sizeof(struct axp8xx_softc), 1607 }; 1608 1609 static devclass_t axp8xx_devclass; 1610 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 1611 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1612 1613 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0, 1614 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1615 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 1616 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1617 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0); 1618 MODULE_VERSION(axp8xx, 1); 1619 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1620