1 /*- 2 * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org> 4 * Copyright (c) 2022 Julien Cassette <julien.cassette@gmail.com> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/eventhandler.h> 31 #include <sys/systm.h> 32 #include <sys/watchdog.h> 33 #include <sys/reboot.h> 34 #include <sys/bus.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/module.h> 38 #include <sys/mutex.h> 39 #include <sys/rman.h> 40 41 #include <dev/ofw/openfirm.h> 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 45 #include <machine/bus.h> 46 47 #include <arm/allwinner/aw_wdog.h> 48 49 #define READ(_sc, _r) bus_read_4((_sc)->res, (_r)) 50 #define WRITE(_sc, _r, _v) bus_write_4((_sc)->res, (_r), (_v)) 51 52 #define A10_WDOG_CTRL 0x00 53 #define A31_WDOG_CTRL 0x10 54 #define D1_WDOG_CTRL 0x10 55 #define WDOG_CTRL_RESTART (1 << 0) 56 #define A31_WDOG_CTRL_KEY (0xa57 << 1) 57 #define D1_WDOG_CTRL_KEY (0xa57 << 1) 58 #define A10_WDOG_MODE 0x04 59 #define A31_WDOG_MODE 0x18 60 #define D1_WDOG_MODE 0x18 61 #define D1_WDOG_MODE_KEY (0x16AA << 16) 62 #define A10_WDOG_MODE_INTVL_SHIFT 3 63 #define A31_WDOG_MODE_INTVL_SHIFT 4 64 #define D1_WDOG_MODE_INTVL_SHIFT 4 65 #define A10_WDOG_MODE_RST_EN (1 << 1) 66 #define WDOG_MODE_EN (1 << 0) 67 #define A31_WDOG_CONFIG 0x14 68 #define D1_WDOG_CONFIG 0x14 69 #define A31_WDOG_CONFIG_RST_EN_SYSTEM (1 << 0) 70 #define A31_WDOG_CONFIG_RST_EN_INT (2 << 0) 71 #define D1_WDOG_CONFIG_KEY (0x16AA << 16) 72 #define D1_WDOG_CONFIG_RST_EN_SYSTEM (1 << 0) 73 #define D1_WDOG_CONFIG_RST_EN_INT (2 << 0) 74 75 struct aw_wdog_interval { 76 uint64_t milliseconds; 77 unsigned int value; 78 }; 79 80 struct aw_wdog_interval wd_intervals[] = { 81 { 500, 0 }, 82 { 1000, 1 }, 83 { 2000, 2 }, 84 { 3000, 3 }, 85 { 4000, 4 }, 86 { 5000, 5 }, 87 { 6000, 6 }, 88 { 8000, 7 }, 89 { 10000, 8 }, 90 { 12000, 9 }, 91 { 14000, 10 }, 92 { 16000, 11 }, 93 { 0, 0 } /* sentinel */ 94 }; 95 96 static struct aw_wdog_softc *aw_wdog_sc = NULL; 97 98 struct aw_wdog_softc { 99 device_t dev; 100 struct resource * res; 101 struct mtx mtx; 102 uint8_t wdog_ctrl; 103 uint32_t wdog_ctrl_key; 104 uint8_t wdog_mode; 105 uint32_t wdog_mode_key; 106 uint8_t wdog_mode_intvl_shift; 107 uint8_t wdog_mode_en; 108 uint8_t wdog_config; 109 uint32_t wdog_config_value; 110 }; 111 112 #define A10_WATCHDOG 1 113 #define A31_WATCHDOG 2 114 #define D1_WATCHDOG 3 115 116 static struct ofw_compat_data compat_data[] = { 117 {"allwinner,sun4i-a10-wdt", A10_WATCHDOG}, 118 {"allwinner,sun6i-a31-wdt", A31_WATCHDOG}, 119 {"allwinner,sun20i-d1-wdt", D1_WATCHDOG}, 120 {NULL, 0} 121 }; 122 123 static void aw_wdog_watchdog_fn(void *, u_int, int *); 124 static void aw_wdog_shutdown_fn(void *, int); 125 126 static int 127 aw_wdog_probe(device_t dev) 128 { 129 130 if (!ofw_bus_status_okay(dev)) 131 return (ENXIO); 132 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { 133 case A10_WATCHDOG: 134 device_set_desc(dev, "Allwinner A10 Watchdog"); 135 return (BUS_PROBE_DEFAULT); 136 case A31_WATCHDOG: 137 device_set_desc(dev, "Allwinner A31 Watchdog"); 138 return (BUS_PROBE_DEFAULT); 139 case D1_WATCHDOG: 140 device_set_desc(dev, "Allwinner D1 Watchdog"); 141 return (BUS_PROBE_DEFAULT); 142 } 143 return (ENXIO); 144 } 145 146 static int 147 aw_wdog_attach(device_t dev) 148 { 149 struct aw_wdog_softc *sc; 150 int rid; 151 152 if (aw_wdog_sc != NULL) 153 return (ENXIO); 154 155 sc = device_get_softc(dev); 156 sc->dev = dev; 157 158 rid = 0; 159 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 160 if (sc->res == NULL) { 161 device_printf(dev, "could not allocate memory resource\n"); 162 return (ENXIO); 163 } 164 165 aw_wdog_sc = sc; 166 167 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { 168 case A10_WATCHDOG: 169 sc->wdog_ctrl = A10_WDOG_CTRL; 170 sc->wdog_mode = A10_WDOG_MODE; 171 sc->wdog_mode_key = 0; 172 sc->wdog_mode_intvl_shift = A10_WDOG_MODE_INTVL_SHIFT; 173 sc->wdog_mode_en = A10_WDOG_MODE_RST_EN | WDOG_MODE_EN; 174 break; 175 case A31_WATCHDOG: 176 sc->wdog_ctrl = A31_WDOG_CTRL; 177 sc->wdog_ctrl_key = A31_WDOG_CTRL_KEY; 178 sc->wdog_mode = A31_WDOG_MODE; 179 sc->wdog_mode_key = 0; 180 sc->wdog_mode_intvl_shift = A31_WDOG_MODE_INTVL_SHIFT; 181 sc->wdog_mode_en = WDOG_MODE_EN; 182 sc->wdog_config = A31_WDOG_CONFIG; 183 sc->wdog_config_value = A31_WDOG_CONFIG_RST_EN_SYSTEM; 184 break; 185 case D1_WATCHDOG: 186 sc->wdog_ctrl = D1_WDOG_CTRL; 187 sc->wdog_ctrl_key = D1_WDOG_CTRL_KEY; 188 sc->wdog_mode = D1_WDOG_MODE; 189 sc->wdog_mode_key = D1_WDOG_MODE_KEY; 190 sc->wdog_mode_intvl_shift = D1_WDOG_MODE_INTVL_SHIFT; 191 sc->wdog_mode_en = WDOG_MODE_EN; 192 sc->wdog_config = D1_WDOG_CONFIG; 193 sc->wdog_config_value = D1_WDOG_CONFIG_KEY | D1_WDOG_CONFIG_RST_EN_SYSTEM; 194 break; 195 default: 196 bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->res); 197 return (ENXIO); 198 } 199 200 mtx_init(&sc->mtx, "AW Watchdog", "aw_wdog", MTX_DEF); 201 EVENTHANDLER_REGISTER(watchdog_list, aw_wdog_watchdog_fn, sc, 0); 202 EVENTHANDLER_REGISTER(shutdown_final, aw_wdog_shutdown_fn, sc, 203 SHUTDOWN_PRI_LAST - 1); 204 205 return (0); 206 } 207 208 static void 209 aw_wdog_watchdog_fn(void *private, u_int cmd, int *error) 210 { 211 struct aw_wdog_softc *sc; 212 uint64_t ms; 213 int i; 214 215 sc = private; 216 mtx_lock(&sc->mtx); 217 218 cmd &= WD_INTERVAL; 219 220 if (cmd > 0) { 221 ms = ((uint64_t)1 << (cmd & WD_INTERVAL)) / 1000000; 222 i = 0; 223 while (wd_intervals[i].milliseconds && 224 (ms > wd_intervals[i].milliseconds)) 225 i++; 226 if (wd_intervals[i].milliseconds) { 227 WRITE(sc, sc->wdog_mode, sc->wdog_mode_key | 228 (wd_intervals[i].value << sc->wdog_mode_intvl_shift) | 229 sc->wdog_mode_en); 230 WRITE(sc, sc->wdog_ctrl, 231 WDOG_CTRL_RESTART | sc->wdog_ctrl_key); 232 if (sc->wdog_config) 233 WRITE(sc, sc->wdog_config, 234 sc->wdog_config_value); 235 *error = 0; 236 } 237 else { 238 /* 239 * Can't arm 240 * disable watchdog as watchdog(9) requires 241 */ 242 device_printf(sc->dev, 243 "Can't arm, timeout is more than 16 sec\n"); 244 mtx_unlock(&sc->mtx); 245 WRITE(sc, sc->wdog_mode, sc->wdog_mode_key); 246 return; 247 } 248 } 249 else 250 WRITE(sc, sc->wdog_mode, sc->wdog_mode_key); 251 252 mtx_unlock(&sc->mtx); 253 } 254 255 static void 256 aw_wdog_shutdown_fn(void *private, int howto) 257 { 258 if ((howto & (RB_POWEROFF|RB_HALT)) == 0) 259 aw_wdog_watchdog_reset(); 260 } 261 262 void 263 aw_wdog_watchdog_reset(void) 264 { 265 266 if (aw_wdog_sc == NULL) { 267 printf("Reset: watchdog device has not been initialized\n"); 268 return; 269 } 270 271 WRITE(aw_wdog_sc, aw_wdog_sc->wdog_mode, aw_wdog_sc->wdog_mode_key | 272 (wd_intervals[0].value << aw_wdog_sc->wdog_mode_intvl_shift) | 273 aw_wdog_sc->wdog_mode_en); 274 if (aw_wdog_sc->wdog_config) 275 WRITE(aw_wdog_sc, aw_wdog_sc->wdog_config, 276 aw_wdog_sc->wdog_config_value); 277 WRITE(aw_wdog_sc, aw_wdog_sc->wdog_ctrl, 278 WDOG_CTRL_RESTART | aw_wdog_sc->wdog_ctrl_key); 279 while(1) 280 ; 281 282 } 283 284 static device_method_t aw_wdog_methods[] = { 285 DEVMETHOD(device_probe, aw_wdog_probe), 286 DEVMETHOD(device_attach, aw_wdog_attach), 287 288 DEVMETHOD_END 289 }; 290 291 static driver_t aw_wdog_driver = { 292 "aw_wdog", 293 aw_wdog_methods, 294 sizeof(struct aw_wdog_softc), 295 }; 296 297 DRIVER_MODULE(aw_wdog, simplebus, aw_wdog_driver, 0, 0); 298