1 /*- 2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 /* 27 * Allwinner USB PHY 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/rman.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/gpio.h> 40 #include <machine/bus.h> 41 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 #include <dev/gpio/gpiobusvar.h> 45 46 #include <dev/extres/clk/clk.h> 47 #include <dev/extres/hwreset/hwreset.h> 48 #include <dev/extres/regulator/regulator.h> 49 #include <dev/extres/phy/phy_usb.h> 50 51 #include "phynode_if.h" 52 53 enum awusbphy_type { 54 AWUSBPHY_TYPE_A10 = 1, 55 AWUSBPHY_TYPE_A13, 56 AWUSBPHY_TYPE_A20, 57 AWUSBPHY_TYPE_A31, 58 AWUSBPHY_TYPE_H3, 59 AWUSBPHY_TYPE_A64, 60 AWUSBPHY_TYPE_A83T, 61 AWUSBPHY_TYPE_H6, 62 }; 63 64 struct aw_usbphy_conf { 65 int num_phys; 66 enum awusbphy_type phy_type; 67 bool pmu_unk1; 68 bool phy0_route; 69 }; 70 71 static const struct aw_usbphy_conf a10_usbphy_conf = { 72 .num_phys = 3, 73 .phy_type = AWUSBPHY_TYPE_A10, 74 .pmu_unk1 = false, 75 .phy0_route = false, 76 }; 77 78 static const struct aw_usbphy_conf a13_usbphy_conf = { 79 .num_phys = 2, 80 .phy_type = AWUSBPHY_TYPE_A13, 81 .pmu_unk1 = false, 82 .phy0_route = false, 83 }; 84 85 static const struct aw_usbphy_conf a20_usbphy_conf = { 86 .num_phys = 3, 87 .phy_type = AWUSBPHY_TYPE_A20, 88 .pmu_unk1 = false, 89 .phy0_route = false, 90 }; 91 92 static const struct aw_usbphy_conf a31_usbphy_conf = { 93 .num_phys = 3, 94 .phy_type = AWUSBPHY_TYPE_A31, 95 .pmu_unk1 = false, 96 .phy0_route = false, 97 }; 98 99 static const struct aw_usbphy_conf h3_usbphy_conf = { 100 .num_phys = 4, 101 .phy_type = AWUSBPHY_TYPE_H3, 102 .pmu_unk1 = true, 103 .phy0_route = true, 104 }; 105 106 static const struct aw_usbphy_conf a64_usbphy_conf = { 107 .num_phys = 2, 108 .phy_type = AWUSBPHY_TYPE_A64, 109 .pmu_unk1 = true, 110 .phy0_route = true, 111 }; 112 113 static const struct aw_usbphy_conf a83t_usbphy_conf = { 114 .num_phys = 3, 115 .phy_type = AWUSBPHY_TYPE_A83T, 116 .pmu_unk1 = false, 117 .phy0_route = false, 118 }; 119 120 static const struct aw_usbphy_conf h6_usbphy_conf = { 121 .num_phys = 4, 122 .phy_type = AWUSBPHY_TYPE_H6, 123 .pmu_unk1 = false, 124 .phy0_route = true, 125 }; 126 127 static struct ofw_compat_data compat_data[] = { 128 { "allwinner,sun4i-a10-usb-phy", (uintptr_t)&a10_usbphy_conf }, 129 { "allwinner,sun5i-a13-usb-phy", (uintptr_t)&a13_usbphy_conf }, 130 { "allwinner,sun6i-a31-usb-phy", (uintptr_t)&a31_usbphy_conf }, 131 { "allwinner,sun7i-a20-usb-phy", (uintptr_t)&a20_usbphy_conf }, 132 { "allwinner,sun8i-h3-usb-phy", (uintptr_t)&h3_usbphy_conf }, 133 { "allwinner,sun50i-a64-usb-phy", (uintptr_t)&a64_usbphy_conf }, 134 { "allwinner,sun8i-a83t-usb-phy", (uintptr_t)&a83t_usbphy_conf }, 135 { "allwinner,sun50i-h6-usb-phy", (uintptr_t)&h6_usbphy_conf }, 136 { NULL, 0 } 137 }; 138 139 struct awusbphy_softc { 140 struct resource * phy_ctrl; 141 struct resource ** pmu; 142 regulator_t * reg; 143 gpio_pin_t id_det_pin; 144 int id_det_valid; 145 gpio_pin_t vbus_det_pin; 146 int vbus_det_valid; 147 struct aw_usbphy_conf *phy_conf; 148 int mode; 149 }; 150 151 /* Phy class and methods. */ 152 static int awusbphy_phy_enable(struct phynode *phy, bool enable); 153 static int awusbphy_get_mode(struct phynode *phy, int *mode); 154 static int awusbphy_set_mode(struct phynode *phy, int mode); 155 static phynode_usb_method_t awusbphy_phynode_methods[] = { 156 PHYNODEMETHOD(phynode_enable, awusbphy_phy_enable), 157 PHYNODEMETHOD(phynode_usb_get_mode, awusbphy_get_mode), 158 PHYNODEMETHOD(phynode_usb_set_mode, awusbphy_set_mode), 159 160 PHYNODEMETHOD_END 161 }; 162 DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods, 163 sizeof(struct phynode_usb_sc), phynode_usb_class); 164 165 #define RD4(res, o) bus_read_4(res, (o)) 166 #define WR4(res, o, v) bus_write_4(res, (o), (v)) 167 #define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m)) 168 #define SET4(res, o, m) WR4(res, o, RD4(res, o) | (m)) 169 170 #define PHY_CSR 0x00 171 #define ID_PULLUP_EN (1 << 17) 172 #define DPDM_PULLUP_EN (1 << 16) 173 #define FORCE_ID (0x3 << 14) 174 #define FORCE_ID_SHIFT 14 175 #define FORCE_ID_LOW 2 176 #define FORCE_ID_HIGH 3 177 #define FORCE_VBUS_VALID (0x3 << 12) 178 #define FORCE_VBUS_VALID_SHIFT 12 179 #define FORCE_VBUS_VALID_LOW 2 180 #define FORCE_VBUS_VALID_HIGH 3 181 #define VBUS_CHANGE_DET (1 << 6) 182 #define ID_CHANGE_DET (1 << 5) 183 #define DPDM_CHANGE_DET (1 << 4) 184 #define OTG_PHY_CFG 0x20 185 #define OTG_PHY_ROUTE_OTG (1 << 0) 186 #define PMU_IRQ_ENABLE 0x00 187 #define PMU_AHB_INCR8 (1 << 10) 188 #define PMU_AHB_INCR4 (1 << 9) 189 #define PMU_AHB_INCRX_ALIGN (1 << 8) 190 #define PMU_ULPI_BYPASS (1 << 0) 191 #define PMU_UNK_H3 0x10 192 #define PMU_UNK_H3_CLR 0x2 193 194 static void 195 awusbphy_configure(device_t dev, int phyno) 196 { 197 struct awusbphy_softc *sc; 198 199 sc = device_get_softc(dev); 200 201 if (sc->pmu[phyno] == NULL) 202 return; 203 204 if (sc->phy_conf->pmu_unk1 == true) 205 CLR4(sc->pmu[phyno], PMU_UNK_H3, PMU_UNK_H3_CLR); 206 207 SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS | 208 PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN); 209 } 210 211 static int 212 awusbphy_init(device_t dev) 213 { 214 struct awusbphy_softc *sc; 215 phandle_t node; 216 char pname[20]; 217 uint32_t val; 218 int error, off, rid; 219 regulator_t reg; 220 hwreset_t rst; 221 clk_t clk; 222 223 sc = device_get_softc(dev); 224 node = ofw_bus_get_node(dev); 225 226 sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; 227 228 /* Get phy_ctrl region */ 229 if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) { 230 device_printf(dev, "Cannot locate phy control resource\n"); 231 return (ENXIO); 232 } 233 sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 234 RF_ACTIVE); 235 if (sc->phy_ctrl == NULL) { 236 device_printf(dev, "Cannot allocate resource\n"); 237 return (ENXIO); 238 } 239 240 /* Enable clocks */ 241 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) { 242 error = clk_enable(clk); 243 if (error != 0) { 244 device_printf(dev, "couldn't enable clock %s\n", 245 clk_get_name(clk)); 246 return (error); 247 } 248 } 249 250 /* De-assert resets */ 251 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) { 252 error = hwreset_deassert(rst); 253 if (error != 0) { 254 device_printf(dev, "couldn't de-assert reset %d\n", 255 off); 256 return (error); 257 } 258 } 259 260 /* Get GPIOs */ 261 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios", 262 &sc->id_det_pin); 263 if (error == 0) 264 sc->id_det_valid = 1; 265 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios", 266 &sc->vbus_det_pin); 267 if (error == 0) 268 sc->vbus_det_valid = 1; 269 270 sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF, 271 M_WAITOK | M_ZERO); 272 sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF, 273 M_WAITOK | M_ZERO); 274 /* Get regulators */ 275 for (off = 0; off < sc->phy_conf->num_phys; off++) { 276 snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off); 277 if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0) 278 sc->reg[off] = reg; 279 280 snprintf(pname, sizeof(pname), "pmu%d", off); 281 if (ofw_bus_find_string_index(node, "reg-names", 282 pname, &rid) != 0) 283 continue; 284 285 sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 286 RF_ACTIVE); 287 if (sc->pmu[off] == NULL) { 288 device_printf(dev, "Cannot allocate resource\n"); 289 return (ENXIO); 290 } 291 } 292 293 /* Enable OTG PHY for host mode */ 294 val = bus_read_4(sc->phy_ctrl, PHY_CSR); 295 val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET); 296 val |= (ID_PULLUP_EN | DPDM_PULLUP_EN); 297 val &= ~FORCE_ID; 298 val |= (FORCE_ID_LOW << FORCE_ID_SHIFT); 299 val &= ~FORCE_VBUS_VALID; 300 val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT); 301 bus_write_4(sc->phy_ctrl, PHY_CSR, val); 302 303 return (0); 304 } 305 306 static int 307 awusbphy_vbus_detect(device_t dev, int *val) 308 { 309 struct awusbphy_softc *sc; 310 bool active; 311 int error; 312 313 sc = device_get_softc(dev); 314 315 if (sc->vbus_det_valid) { 316 error = gpio_pin_is_active(sc->vbus_det_pin, &active); 317 if (error != 0) { 318 device_printf(dev, "Cannot get status of id pin %d\n", 319 error); 320 return (error); 321 } 322 *val = active; 323 return (0); 324 } 325 326 /* TODO check vbus_power-supply. */ 327 328 /* 329 * If there is no way to detect, assume present. 330 */ 331 *val = 1; 332 return (0); 333 } 334 335 static int 336 awusbphy_phy_enable(struct phynode *phynode, bool enable) 337 { 338 device_t dev; 339 intptr_t phy; 340 struct awusbphy_softc *sc; 341 regulator_t reg; 342 int error, vbus_det; 343 344 dev = phynode_get_device(phynode); 345 phy = phynode_get_id(phynode); 346 sc = device_get_softc(dev); 347 348 if (phy < 0 || phy >= sc->phy_conf->num_phys) 349 return (ERANGE); 350 351 /* Configure PHY */ 352 awusbphy_configure(dev, phy); 353 354 /* Regulators are optional. If not found, return success. */ 355 reg = sc->reg[phy]; 356 if (reg == NULL) 357 return (0); 358 359 if (phy == 0) { 360 /* If an external vbus is detected, do not enable phy 0 */ 361 error = awusbphy_vbus_detect(dev, &vbus_det); 362 if (error) 363 goto out; 364 365 /* TODO check vbus_power-supply as well. */ 366 if (sc->vbus_det_valid && vbus_det == 1) { 367 if (bootverbose) 368 device_printf(dev, "External VBUS detected, " 369 "not enabling the regulator\n"); 370 return (0); 371 } 372 } 373 if (enable) { 374 /* Depending on the PHY we need to route OTG to OHCI/EHCI */ 375 error = regulator_enable(reg); 376 } else 377 error = regulator_disable(reg); 378 379 out: 380 if (error != 0) { 381 device_printf(dev, 382 "couldn't %s regulator for phy %jd\n", 383 enable ? "enable" : "disable", (intmax_t)phy); 384 return (error); 385 } 386 387 return (0); 388 } 389 390 static int 391 awusbphy_get_mode(struct phynode *phynode, int *mode) 392 { 393 struct awusbphy_softc *sc; 394 device_t dev; 395 396 dev = phynode_get_device(phynode); 397 sc = device_get_softc(dev); 398 399 *mode = sc->mode; 400 401 return (0); 402 } 403 404 static int 405 awusbphy_set_mode(struct phynode *phynode, int mode) 406 { 407 device_t dev; 408 intptr_t phy; 409 struct awusbphy_softc *sc; 410 uint32_t val; 411 int error, vbus_det; 412 413 dev = phynode_get_device(phynode); 414 phy = phynode_get_id(phynode); 415 sc = device_get_softc(dev); 416 417 if (phy != 0) { 418 if (mode != PHY_USB_MODE_HOST) 419 return (EINVAL); 420 return (0); 421 } 422 423 if (sc->mode == mode) 424 return (0); 425 if (mode == PHY_USB_MODE_OTG) /* TODO */ 426 return (EOPNOTSUPP); 427 428 error = awusbphy_vbus_detect(dev, &vbus_det); 429 if (error != 0) 430 return (error); 431 432 val = bus_read_4(sc->phy_ctrl, PHY_CSR); 433 val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET); 434 val |= (ID_PULLUP_EN | DPDM_PULLUP_EN); 435 val &= ~FORCE_VBUS_VALID; 436 val |= (vbus_det ? FORCE_VBUS_VALID_HIGH : FORCE_VBUS_VALID_LOW) << 437 FORCE_VBUS_VALID_SHIFT; 438 val &= ~FORCE_ID; 439 440 switch (mode) { 441 case PHY_USB_MODE_HOST: 442 val |= (FORCE_ID_LOW << FORCE_ID_SHIFT); 443 if (sc->phy_conf->phy0_route) 444 CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 445 break; 446 case PHY_USB_MODE_DEVICE: 447 val |= (FORCE_ID_HIGH << FORCE_ID_SHIFT); 448 if (sc->phy_conf->phy0_route) 449 SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 450 break; 451 default: 452 return (EINVAL); 453 } 454 455 bus_write_4(sc->phy_ctrl, PHY_CSR, val); 456 sc->mode = mode; 457 return (0); 458 } 459 460 static int 461 awusbphy_probe(device_t dev) 462 { 463 if (!ofw_bus_status_okay(dev)) 464 return (ENXIO); 465 466 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 467 return (ENXIO); 468 469 device_set_desc(dev, "Allwinner USB PHY"); 470 return (BUS_PROBE_DEFAULT); 471 } 472 473 static int 474 awusbphy_attach(device_t dev) 475 { 476 int error; 477 struct phynode *phynode; 478 struct phynode_init_def phy_init; 479 struct awusbphy_softc *sc; 480 int i; 481 482 sc = device_get_softc(dev); 483 error = awusbphy_init(dev); 484 if (error) { 485 device_printf(dev, "failed to initialize USB PHY, error %d\n", 486 error); 487 return (error); 488 } 489 490 /* Create and register phys. */ 491 for (i = 0; i < sc->phy_conf->num_phys; i++) { 492 bzero(&phy_init, sizeof(phy_init)); 493 phy_init.id = i; 494 phy_init.ofw_node = ofw_bus_get_node(dev); 495 phynode = phynode_create(dev, &awusbphy_phynode_class, 496 &phy_init); 497 if (phynode == NULL) { 498 device_printf(dev, "failed to create USB PHY\n"); 499 return (ENXIO); 500 } 501 if (phynode_register(phynode) == NULL) { 502 device_printf(dev, "failed to create USB PHY\n"); 503 return (ENXIO); 504 } 505 } 506 507 return (error); 508 } 509 510 static device_method_t awusbphy_methods[] = { 511 /* Device interface */ 512 DEVMETHOD(device_probe, awusbphy_probe), 513 DEVMETHOD(device_attach, awusbphy_attach), 514 515 DEVMETHOD_END 516 }; 517 518 static driver_t awusbphy_driver = { 519 "awusbphy", 520 awusbphy_methods, 521 sizeof(struct awusbphy_softc) 522 }; 523 524 /* aw_usbphy needs to come up after regulators/gpio/etc, but before ehci/ohci */ 525 EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, 0, 0, 526 BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE); 527 MODULE_VERSION(awusbphy, 1); 528