1 /*- 2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * Allwinner USB PHY 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/rman.h> 40 #include <sys/kernel.h> 41 #include <sys/module.h> 42 #include <sys/gpio.h> 43 #include <machine/bus.h> 44 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 #include <dev/gpio/gpiobusvar.h> 48 49 #include <dev/extres/clk/clk.h> 50 #include <dev/extres/hwreset/hwreset.h> 51 #include <dev/extres/regulator/regulator.h> 52 #include <dev/extres/phy/phy.h> 53 54 #include "phy_if.h" 55 56 #define USBPHY_NPHYS 4 57 #define USBPHY_NRES USBPHY_NPHYS 58 59 enum awusbphy_type { 60 AWUSBPHY_TYPE_A10 = 1, 61 AWUSBPHY_TYPE_A13, 62 AWUSBPHY_TYPE_A20, 63 AWUSBPHY_TYPE_A31, 64 AWUSBPHY_TYPE_A83T, 65 AWUSBPHY_TYPE_H3, 66 AWUSBPHY_TYPE_A64 67 }; 68 69 static struct ofw_compat_data compat_data[] = { 70 { "allwinner,sun4i-a10-usb-phy", AWUSBPHY_TYPE_A10 }, 71 { "allwinner,sun5i-a13-usb-phy", AWUSBPHY_TYPE_A13 }, 72 { "allwinner,sun6i-a31-usb-phy", AWUSBPHY_TYPE_A31 }, 73 { "allwinner,sun7i-a20-usb-phy", AWUSBPHY_TYPE_A20 }, 74 { "allwinner,sun8i-a83t-usb-phy", AWUSBPHY_TYPE_A83T }, 75 { "allwinner,sun8i-h3-usb-phy", AWUSBPHY_TYPE_H3 }, 76 { "allwinner,sun50i-a64-usb-phy", AWUSBPHY_TYPE_A64 }, 77 { NULL, 0 } 78 }; 79 80 struct awusbphy_softc { 81 struct resource * res[USBPHY_NRES]; 82 regulator_t reg[USBPHY_NPHYS]; 83 gpio_pin_t id_det_pin; 84 int id_det_valid; 85 gpio_pin_t vbus_det_pin; 86 int vbus_det_valid; 87 enum awusbphy_type phy_type; 88 }; 89 90 static struct resource_spec awusbphy_spec[] = { 91 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 92 { SYS_RES_MEMORY, 1, RF_ACTIVE }, 93 { SYS_RES_MEMORY, 2, RF_ACTIVE | RF_OPTIONAL }, 94 { SYS_RES_MEMORY, 3, RF_ACTIVE | RF_OPTIONAL }, 95 { -1, 0 } 96 }; 97 98 #define RD4(sc, i, o) bus_read_4((sc)->res[(i)], (o)) 99 #define WR4(sc, i, o, v) bus_write_4((sc)->res[(i)], (o), (v)) 100 #define CLR4(sc, i, o, m) WR4(sc, i, o, RD4(sc, i, o) & ~(m)) 101 #define SET4(sc, i, o, m) WR4(sc, i, o, RD4(sc, i, o) | (m)) 102 103 #define OTG_PHY_CFG 0x20 104 #define OTG_PHY_ROUTE_OTG (1 << 0) 105 #define PMU_IRQ_ENABLE 0x00 106 #define PMU_AHB_INCR8 (1 << 10) 107 #define PMU_AHB_INCR4 (1 << 9) 108 #define PMU_AHB_INCRX_ALIGN (1 << 8) 109 #define PMU_ULPI_BYPASS (1 << 0) 110 #define PMU_UNK_H3 0x10 111 #define PMU_UNK_H3_CLR 0x2 112 113 static void 114 awusbphy_configure(device_t dev, int phyno) 115 { 116 struct awusbphy_softc *sc; 117 118 sc = device_get_softc(dev); 119 120 if (sc->res[phyno] == NULL) 121 return; 122 123 if (sc->phy_type == AWUSBPHY_TYPE_A64) { 124 CLR4(sc, phyno, PMU_UNK_H3, PMU_UNK_H3_CLR); 125 126 /* EHCI0 and OTG share a PHY */ 127 if (phyno == 0) 128 SET4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 129 else if (phyno == 1) 130 CLR4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 131 } 132 133 if (phyno > 0) { 134 /* Enable passby */ 135 SET4(sc, phyno, PMU_IRQ_ENABLE, PMU_ULPI_BYPASS | 136 PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN); 137 } 138 } 139 140 static int 141 awusbphy_init(device_t dev) 142 { 143 struct awusbphy_softc *sc; 144 phandle_t node; 145 char pname[20]; 146 int error, off; 147 regulator_t reg; 148 hwreset_t rst; 149 clk_t clk; 150 151 sc = device_get_softc(dev); 152 node = ofw_bus_get_node(dev); 153 154 sc->phy_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 155 156 /* Enable clocks */ 157 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) { 158 error = clk_enable(clk); 159 if (error != 0) { 160 device_printf(dev, "couldn't enable clock %s\n", 161 clk_get_name(clk)); 162 return (error); 163 } 164 } 165 166 /* De-assert resets */ 167 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) { 168 error = hwreset_deassert(rst); 169 if (error != 0) { 170 device_printf(dev, "couldn't de-assert reset %d\n", 171 off); 172 return (error); 173 } 174 } 175 176 /* Get regulators */ 177 for (off = 0; off < USBPHY_NPHYS; off++) { 178 snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off); 179 if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0) 180 sc->reg[off] = reg; 181 } 182 183 /* Get GPIOs */ 184 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios", 185 &sc->id_det_pin); 186 if (error == 0) 187 sc->id_det_valid = 1; 188 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios", 189 &sc->vbus_det_pin); 190 if (error == 0) 191 sc->vbus_det_valid = 1; 192 193 /* Allocate resources */ 194 if (bus_alloc_resources(dev, awusbphy_spec, sc->res) != 0) 195 device_printf(dev, "couldn't allocate resources\n"); 196 197 return (0); 198 } 199 200 static int 201 awusbphy_vbus_detect(device_t dev, int *val) 202 { 203 struct awusbphy_softc *sc; 204 bool active; 205 int error; 206 207 sc = device_get_softc(dev); 208 209 if (sc->vbus_det_valid) { 210 error = gpio_pin_is_active(sc->vbus_det_pin, &active); 211 if (error != 0) 212 return (error); 213 *val = active; 214 return (0); 215 } 216 217 *val = 1; 218 return (0); 219 } 220 221 static int 222 awusbphy_phy_enable(device_t dev, intptr_t phy, bool enable) 223 { 224 struct awusbphy_softc *sc; 225 regulator_t reg; 226 int error, vbus_det; 227 228 if (phy < 0 || phy >= USBPHY_NPHYS) 229 return (ERANGE); 230 231 sc = device_get_softc(dev); 232 233 /* Configure PHY */ 234 awusbphy_configure(dev, phy); 235 236 /* Regulators are optional. If not found, return success. */ 237 reg = sc->reg[phy]; 238 if (reg == NULL) 239 return (0); 240 241 if (enable) { 242 /* If an external vbus is detected, do not enable phy 0 */ 243 if (phy == 0) { 244 error = awusbphy_vbus_detect(dev, &vbus_det); 245 if (error == 0 && vbus_det == 1) 246 return (0); 247 } else 248 error = 0; 249 if (error == 0) 250 error = regulator_enable(reg); 251 } else 252 error = regulator_disable(reg); 253 if (error != 0) { 254 device_printf(dev, 255 "couldn't %s regulator for phy %jd\n", 256 enable ? "enable" : "disable", (intmax_t)phy); 257 return (error); 258 } 259 260 return (0); 261 } 262 263 static int 264 awusbphy_probe(device_t dev) 265 { 266 if (!ofw_bus_status_okay(dev)) 267 return (ENXIO); 268 269 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 270 return (ENXIO); 271 272 device_set_desc(dev, "Allwinner USB PHY"); 273 return (BUS_PROBE_DEFAULT); 274 } 275 276 static int 277 awusbphy_attach(device_t dev) 278 { 279 int error; 280 281 error = awusbphy_init(dev); 282 if (error) { 283 device_printf(dev, "failed to initialize USB PHY, error %d\n", 284 error); 285 return (error); 286 } 287 288 phy_register_provider(dev); 289 290 return (error); 291 } 292 293 static device_method_t awusbphy_methods[] = { 294 /* Device interface */ 295 DEVMETHOD(device_probe, awusbphy_probe), 296 DEVMETHOD(device_attach, awusbphy_attach), 297 298 /* PHY interface */ 299 DEVMETHOD(phy_enable, awusbphy_phy_enable), 300 301 DEVMETHOD_END 302 }; 303 304 static driver_t awusbphy_driver = { 305 "awusbphy", 306 awusbphy_methods, 307 sizeof(struct awusbphy_softc) 308 }; 309 310 static devclass_t awusbphy_devclass; 311 312 EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, awusbphy_devclass, 313 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); 314 MODULE_VERSION(awusbphy, 1); 315