1 /*- 2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 /* 27 * Allwinner USB PHY 28 */ 29 30 #include <sys/cdefs.h> 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bus.h> 34 #include <sys/rman.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/gpio.h> 38 #include <machine/bus.h> 39 40 #include <dev/ofw/ofw_bus.h> 41 #include <dev/ofw/ofw_bus_subr.h> 42 #include <dev/gpio/gpiobusvar.h> 43 44 #include <dev/extres/clk/clk.h> 45 #include <dev/extres/hwreset/hwreset.h> 46 #include <dev/extres/regulator/regulator.h> 47 #include <dev/extres/phy/phy_usb.h> 48 49 #include "phynode_if.h" 50 51 enum awusbphy_type { 52 AWUSBPHY_TYPE_A10 = 1, 53 AWUSBPHY_TYPE_A13, 54 AWUSBPHY_TYPE_A20, 55 AWUSBPHY_TYPE_A31, 56 AWUSBPHY_TYPE_H3, 57 AWUSBPHY_TYPE_A64, 58 AWUSBPHY_TYPE_A83T, 59 AWUSBPHY_TYPE_H6, 60 }; 61 62 struct aw_usbphy_conf { 63 int num_phys; 64 enum awusbphy_type phy_type; 65 bool pmu_unk1; 66 bool phy0_route; 67 }; 68 69 static const struct aw_usbphy_conf a10_usbphy_conf = { 70 .num_phys = 3, 71 .phy_type = AWUSBPHY_TYPE_A10, 72 .pmu_unk1 = false, 73 .phy0_route = false, 74 }; 75 76 static const struct aw_usbphy_conf a13_usbphy_conf = { 77 .num_phys = 2, 78 .phy_type = AWUSBPHY_TYPE_A13, 79 .pmu_unk1 = false, 80 .phy0_route = false, 81 }; 82 83 static const struct aw_usbphy_conf a20_usbphy_conf = { 84 .num_phys = 3, 85 .phy_type = AWUSBPHY_TYPE_A20, 86 .pmu_unk1 = false, 87 .phy0_route = false, 88 }; 89 90 static const struct aw_usbphy_conf a31_usbphy_conf = { 91 .num_phys = 3, 92 .phy_type = AWUSBPHY_TYPE_A31, 93 .pmu_unk1 = false, 94 .phy0_route = false, 95 }; 96 97 static const struct aw_usbphy_conf h3_usbphy_conf = { 98 .num_phys = 4, 99 .phy_type = AWUSBPHY_TYPE_H3, 100 .pmu_unk1 = true, 101 .phy0_route = true, 102 }; 103 104 static const struct aw_usbphy_conf a64_usbphy_conf = { 105 .num_phys = 2, 106 .phy_type = AWUSBPHY_TYPE_A64, 107 .pmu_unk1 = true, 108 .phy0_route = true, 109 }; 110 111 static const struct aw_usbphy_conf a83t_usbphy_conf = { 112 .num_phys = 3, 113 .phy_type = AWUSBPHY_TYPE_A83T, 114 .pmu_unk1 = false, 115 .phy0_route = false, 116 }; 117 118 static const struct aw_usbphy_conf h6_usbphy_conf = { 119 .num_phys = 4, 120 .phy_type = AWUSBPHY_TYPE_H6, 121 .pmu_unk1 = false, 122 .phy0_route = true, 123 }; 124 125 static struct ofw_compat_data compat_data[] = { 126 { "allwinner,sun4i-a10-usb-phy", (uintptr_t)&a10_usbphy_conf }, 127 { "allwinner,sun5i-a13-usb-phy", (uintptr_t)&a13_usbphy_conf }, 128 { "allwinner,sun6i-a31-usb-phy", (uintptr_t)&a31_usbphy_conf }, 129 { "allwinner,sun7i-a20-usb-phy", (uintptr_t)&a20_usbphy_conf }, 130 { "allwinner,sun8i-h3-usb-phy", (uintptr_t)&h3_usbphy_conf }, 131 { "allwinner,sun50i-a64-usb-phy", (uintptr_t)&a64_usbphy_conf }, 132 { "allwinner,sun8i-a83t-usb-phy", (uintptr_t)&a83t_usbphy_conf }, 133 { "allwinner,sun50i-h6-usb-phy", (uintptr_t)&h6_usbphy_conf }, 134 { NULL, 0 } 135 }; 136 137 struct awusbphy_softc { 138 struct resource * phy_ctrl; 139 struct resource ** pmu; 140 regulator_t * reg; 141 gpio_pin_t id_det_pin; 142 int id_det_valid; 143 gpio_pin_t vbus_det_pin; 144 int vbus_det_valid; 145 struct aw_usbphy_conf *phy_conf; 146 int mode; 147 }; 148 149 /* Phy class and methods. */ 150 static int awusbphy_phy_enable(struct phynode *phy, bool enable); 151 static int awusbphy_get_mode(struct phynode *phy, int *mode); 152 static int awusbphy_set_mode(struct phynode *phy, int mode); 153 static phynode_usb_method_t awusbphy_phynode_methods[] = { 154 PHYNODEMETHOD(phynode_enable, awusbphy_phy_enable), 155 PHYNODEMETHOD(phynode_usb_get_mode, awusbphy_get_mode), 156 PHYNODEMETHOD(phynode_usb_set_mode, awusbphy_set_mode), 157 158 PHYNODEMETHOD_END 159 }; 160 DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods, 161 sizeof(struct phynode_usb_sc), phynode_usb_class); 162 163 #define RD4(res, o) bus_read_4(res, (o)) 164 #define WR4(res, o, v) bus_write_4(res, (o), (v)) 165 #define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m)) 166 #define SET4(res, o, m) WR4(res, o, RD4(res, o) | (m)) 167 168 #define PHY_CSR 0x00 169 #define ID_PULLUP_EN (1 << 17) 170 #define DPDM_PULLUP_EN (1 << 16) 171 #define FORCE_ID (0x3 << 14) 172 #define FORCE_ID_SHIFT 14 173 #define FORCE_ID_LOW 2 174 #define FORCE_ID_HIGH 3 175 #define FORCE_VBUS_VALID (0x3 << 12) 176 #define FORCE_VBUS_VALID_SHIFT 12 177 #define FORCE_VBUS_VALID_LOW 2 178 #define FORCE_VBUS_VALID_HIGH 3 179 #define VBUS_CHANGE_DET (1 << 6) 180 #define ID_CHANGE_DET (1 << 5) 181 #define DPDM_CHANGE_DET (1 << 4) 182 #define OTG_PHY_CFG 0x20 183 #define OTG_PHY_ROUTE_OTG (1 << 0) 184 #define PMU_IRQ_ENABLE 0x00 185 #define PMU_AHB_INCR8 (1 << 10) 186 #define PMU_AHB_INCR4 (1 << 9) 187 #define PMU_AHB_INCRX_ALIGN (1 << 8) 188 #define PMU_ULPI_BYPASS (1 << 0) 189 #define PMU_UNK_H3 0x10 190 #define PMU_UNK_H3_CLR 0x2 191 192 static void 193 awusbphy_configure(device_t dev, int phyno) 194 { 195 struct awusbphy_softc *sc; 196 197 sc = device_get_softc(dev); 198 199 if (sc->pmu[phyno] == NULL) 200 return; 201 202 if (sc->phy_conf->pmu_unk1 == true) 203 CLR4(sc->pmu[phyno], PMU_UNK_H3, PMU_UNK_H3_CLR); 204 205 SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS | 206 PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN); 207 } 208 209 static int 210 awusbphy_init(device_t dev) 211 { 212 struct awusbphy_softc *sc; 213 phandle_t node; 214 char pname[20]; 215 uint32_t val; 216 int error, off, rid; 217 regulator_t reg; 218 hwreset_t rst; 219 clk_t clk; 220 221 sc = device_get_softc(dev); 222 node = ofw_bus_get_node(dev); 223 224 sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; 225 226 /* Get phy_ctrl region */ 227 if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) { 228 device_printf(dev, "Cannot locate phy control resource\n"); 229 return (ENXIO); 230 } 231 sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 232 RF_ACTIVE); 233 if (sc->phy_ctrl == NULL) { 234 device_printf(dev, "Cannot allocate resource\n"); 235 return (ENXIO); 236 } 237 238 /* Enable clocks */ 239 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) { 240 error = clk_enable(clk); 241 if (error != 0) { 242 device_printf(dev, "couldn't enable clock %s\n", 243 clk_get_name(clk)); 244 return (error); 245 } 246 } 247 248 /* De-assert resets */ 249 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) { 250 error = hwreset_deassert(rst); 251 if (error != 0) { 252 device_printf(dev, "couldn't de-assert reset %d\n", 253 off); 254 return (error); 255 } 256 } 257 258 /* Get GPIOs */ 259 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios", 260 &sc->id_det_pin); 261 if (error == 0) 262 sc->id_det_valid = 1; 263 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios", 264 &sc->vbus_det_pin); 265 if (error == 0) 266 sc->vbus_det_valid = 1; 267 268 sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF, 269 M_WAITOK | M_ZERO); 270 sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF, 271 M_WAITOK | M_ZERO); 272 /* Get regulators */ 273 for (off = 0; off < sc->phy_conf->num_phys; off++) { 274 snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off); 275 if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0) 276 sc->reg[off] = reg; 277 278 snprintf(pname, sizeof(pname), "pmu%d", off); 279 if (ofw_bus_find_string_index(node, "reg-names", 280 pname, &rid) != 0) 281 continue; 282 283 sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 284 RF_ACTIVE); 285 if (sc->pmu[off] == NULL) { 286 device_printf(dev, "Cannot allocate resource\n"); 287 return (ENXIO); 288 } 289 } 290 291 /* Enable OTG PHY for host mode */ 292 val = bus_read_4(sc->phy_ctrl, PHY_CSR); 293 val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET); 294 val |= (ID_PULLUP_EN | DPDM_PULLUP_EN); 295 val &= ~FORCE_ID; 296 val |= (FORCE_ID_LOW << FORCE_ID_SHIFT); 297 val &= ~FORCE_VBUS_VALID; 298 val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT); 299 bus_write_4(sc->phy_ctrl, PHY_CSR, val); 300 301 return (0); 302 } 303 304 static int 305 awusbphy_vbus_detect(device_t dev, int *val) 306 { 307 struct awusbphy_softc *sc; 308 bool active; 309 int error; 310 311 sc = device_get_softc(dev); 312 313 if (sc->vbus_det_valid) { 314 error = gpio_pin_is_active(sc->vbus_det_pin, &active); 315 if (error != 0) { 316 device_printf(dev, "Cannot get status of id pin %d\n", 317 error); 318 return (error); 319 } 320 *val = active; 321 return (0); 322 } 323 324 /* TODO check vbus_power-supply. */ 325 326 /* 327 * If there is no way to detect, assume present. 328 */ 329 *val = 1; 330 return (0); 331 } 332 333 static int 334 awusbphy_phy_enable(struct phynode *phynode, bool enable) 335 { 336 device_t dev; 337 intptr_t phy; 338 struct awusbphy_softc *sc; 339 regulator_t reg; 340 int error, vbus_det; 341 342 dev = phynode_get_device(phynode); 343 phy = phynode_get_id(phynode); 344 sc = device_get_softc(dev); 345 346 if (phy < 0 || phy >= sc->phy_conf->num_phys) 347 return (ERANGE); 348 349 /* Configure PHY */ 350 awusbphy_configure(dev, phy); 351 352 /* Regulators are optional. If not found, return success. */ 353 reg = sc->reg[phy]; 354 if (reg == NULL) 355 return (0); 356 357 if (phy == 0) { 358 /* If an external vbus is detected, do not enable phy 0 */ 359 error = awusbphy_vbus_detect(dev, &vbus_det); 360 if (error) 361 goto out; 362 363 /* TODO check vbus_power-supply as well. */ 364 if (sc->vbus_det_valid && vbus_det == 1) { 365 if (bootverbose) 366 device_printf(dev, "External VBUS detected, " 367 "not enabling the regulator\n"); 368 return (0); 369 } 370 } 371 if (enable) { 372 /* Depending on the PHY we need to route OTG to OHCI/EHCI */ 373 error = regulator_enable(reg); 374 } else 375 error = regulator_disable(reg); 376 377 out: 378 if (error != 0) { 379 device_printf(dev, 380 "couldn't %s regulator for phy %jd\n", 381 enable ? "enable" : "disable", (intmax_t)phy); 382 return (error); 383 } 384 385 return (0); 386 } 387 388 static int 389 awusbphy_get_mode(struct phynode *phynode, int *mode) 390 { 391 struct awusbphy_softc *sc; 392 device_t dev; 393 394 dev = phynode_get_device(phynode); 395 sc = device_get_softc(dev); 396 397 *mode = sc->mode; 398 399 return (0); 400 } 401 402 static int 403 awusbphy_set_mode(struct phynode *phynode, int mode) 404 { 405 device_t dev; 406 intptr_t phy; 407 struct awusbphy_softc *sc; 408 uint32_t val; 409 int error, vbus_det; 410 411 dev = phynode_get_device(phynode); 412 phy = phynode_get_id(phynode); 413 sc = device_get_softc(dev); 414 415 if (phy != 0) { 416 if (mode != PHY_USB_MODE_HOST) 417 return (EINVAL); 418 return (0); 419 } 420 421 if (sc->mode == mode) 422 return (0); 423 if (mode == PHY_USB_MODE_OTG) /* TODO */ 424 return (EOPNOTSUPP); 425 426 error = awusbphy_vbus_detect(dev, &vbus_det); 427 if (error != 0) 428 return (error); 429 430 val = bus_read_4(sc->phy_ctrl, PHY_CSR); 431 val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET); 432 val |= (ID_PULLUP_EN | DPDM_PULLUP_EN); 433 val &= ~FORCE_VBUS_VALID; 434 val |= (vbus_det ? FORCE_VBUS_VALID_HIGH : FORCE_VBUS_VALID_LOW) << 435 FORCE_VBUS_VALID_SHIFT; 436 val &= ~FORCE_ID; 437 438 switch (mode) { 439 case PHY_USB_MODE_HOST: 440 val |= (FORCE_ID_LOW << FORCE_ID_SHIFT); 441 if (sc->phy_conf->phy0_route) 442 CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 443 break; 444 case PHY_USB_MODE_DEVICE: 445 val |= (FORCE_ID_HIGH << FORCE_ID_SHIFT); 446 if (sc->phy_conf->phy0_route) 447 SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 448 break; 449 default: 450 return (EINVAL); 451 } 452 453 bus_write_4(sc->phy_ctrl, PHY_CSR, val); 454 sc->mode = mode; 455 return (0); 456 } 457 458 static int 459 awusbphy_probe(device_t dev) 460 { 461 if (!ofw_bus_status_okay(dev)) 462 return (ENXIO); 463 464 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 465 return (ENXIO); 466 467 device_set_desc(dev, "Allwinner USB PHY"); 468 return (BUS_PROBE_DEFAULT); 469 } 470 471 static int 472 awusbphy_attach(device_t dev) 473 { 474 int error; 475 struct phynode *phynode; 476 struct phynode_init_def phy_init; 477 struct awusbphy_softc *sc; 478 int i; 479 480 sc = device_get_softc(dev); 481 error = awusbphy_init(dev); 482 if (error) { 483 device_printf(dev, "failed to initialize USB PHY, error %d\n", 484 error); 485 return (error); 486 } 487 488 /* Create and register phys. */ 489 for (i = 0; i < sc->phy_conf->num_phys; i++) { 490 bzero(&phy_init, sizeof(phy_init)); 491 phy_init.id = i; 492 phy_init.ofw_node = ofw_bus_get_node(dev); 493 phynode = phynode_create(dev, &awusbphy_phynode_class, 494 &phy_init); 495 if (phynode == NULL) { 496 device_printf(dev, "failed to create USB PHY\n"); 497 return (ENXIO); 498 } 499 if (phynode_register(phynode) == NULL) { 500 device_printf(dev, "failed to create USB PHY\n"); 501 return (ENXIO); 502 } 503 } 504 505 return (error); 506 } 507 508 static device_method_t awusbphy_methods[] = { 509 /* Device interface */ 510 DEVMETHOD(device_probe, awusbphy_probe), 511 DEVMETHOD(device_attach, awusbphy_attach), 512 513 DEVMETHOD_END 514 }; 515 516 static driver_t awusbphy_driver = { 517 "awusbphy", 518 awusbphy_methods, 519 sizeof(struct awusbphy_softc) 520 }; 521 522 /* aw_usbphy needs to come up after regulators/gpio/etc, but before ehci/ohci */ 523 EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, 0, 0, 524 BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE); 525 MODULE_VERSION(awusbphy, 1); 526