1 /*- 2 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * Allwinner USB PHY 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/rman.h> 40 #include <sys/kernel.h> 41 #include <sys/module.h> 42 #include <sys/gpio.h> 43 #include <machine/bus.h> 44 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 #include <dev/gpio/gpiobusvar.h> 48 49 #include <dev/extres/clk/clk.h> 50 #include <dev/extres/hwreset/hwreset.h> 51 #include <dev/extres/regulator/regulator.h> 52 #include <dev/extres/phy/phy.h> 53 54 #include "phy_if.h" 55 56 enum awusbphy_type { 57 AWUSBPHY_TYPE_A10 = 1, 58 AWUSBPHY_TYPE_A13, 59 AWUSBPHY_TYPE_A20, 60 AWUSBPHY_TYPE_A31, 61 AWUSBPHY_TYPE_H3, 62 AWUSBPHY_TYPE_A64 63 }; 64 65 struct aw_usbphy_conf { 66 int num_phys; 67 enum awusbphy_type phy_type; 68 bool pmu_unk1; 69 bool phy0_route; 70 }; 71 72 static const struct aw_usbphy_conf a10_usbphy_conf = { 73 .num_phys = 3, 74 .phy_type = AWUSBPHY_TYPE_A10, 75 .pmu_unk1 = false, 76 .phy0_route = false, 77 }; 78 79 static const struct aw_usbphy_conf a13_usbphy_conf = { 80 .num_phys = 2, 81 .phy_type = AWUSBPHY_TYPE_A13, 82 .pmu_unk1 = false, 83 .phy0_route = false, 84 }; 85 86 static const struct aw_usbphy_conf a20_usbphy_conf = { 87 .num_phys = 3, 88 .phy_type = AWUSBPHY_TYPE_A20, 89 .pmu_unk1 = false, 90 .phy0_route = false, 91 }; 92 93 static const struct aw_usbphy_conf a31_usbphy_conf = { 94 .num_phys = 3, 95 .phy_type = AWUSBPHY_TYPE_A31, 96 .pmu_unk1 = false, 97 .phy0_route = false, 98 }; 99 100 static const struct aw_usbphy_conf h3_usbphy_conf = { 101 .num_phys = 4, 102 .phy_type = AWUSBPHY_TYPE_H3, 103 .pmu_unk1 = true, 104 .phy0_route = false, 105 }; 106 107 static const struct aw_usbphy_conf a64_usbphy_conf = { 108 .num_phys = 2, 109 .phy_type = AWUSBPHY_TYPE_A64, 110 .pmu_unk1 = true, 111 .phy0_route = true, 112 }; 113 114 static struct ofw_compat_data compat_data[] = { 115 { "allwinner,sun4i-a10-usb-phy", (uintptr_t)&a10_usbphy_conf }, 116 { "allwinner,sun5i-a13-usb-phy", (uintptr_t)&a13_usbphy_conf }, 117 { "allwinner,sun6i-a31-usb-phy", (uintptr_t)&a31_usbphy_conf }, 118 { "allwinner,sun7i-a20-usb-phy", (uintptr_t)&a20_usbphy_conf }, 119 { "allwinner,sun8i-h3-usb-phy", (uintptr_t)&h3_usbphy_conf }, 120 { "allwinner,sun50i-a64-usb-phy", (uintptr_t)&a64_usbphy_conf }, 121 { NULL, 0 } 122 }; 123 124 struct awusbphy_softc { 125 struct resource * phy_ctrl; 126 struct resource ** pmu; 127 regulator_t * reg; 128 gpio_pin_t id_det_pin; 129 int id_det_valid; 130 gpio_pin_t vbus_det_pin; 131 int vbus_det_valid; 132 struct aw_usbphy_conf *phy_conf; 133 }; 134 135 #define RD4(res, o) bus_read_4(res, (o)) 136 #define WR4(res, o, v) bus_write_4(res, (o), (v)) 137 #define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m)) 138 #define SET4(res, o, m) WR4(res, o, RD4(res, o) | (m)) 139 140 #define OTG_PHY_CFG 0x20 141 #define OTG_PHY_ROUTE_OTG (1 << 0) 142 #define PMU_IRQ_ENABLE 0x00 143 #define PMU_AHB_INCR8 (1 << 10) 144 #define PMU_AHB_INCR4 (1 << 9) 145 #define PMU_AHB_INCRX_ALIGN (1 << 8) 146 #define PMU_ULPI_BYPASS (1 << 0) 147 #define PMU_UNK_H3 0x10 148 #define PMU_UNK_H3_CLR 0x2 149 150 static void 151 awusbphy_configure(device_t dev, int phyno) 152 { 153 struct awusbphy_softc *sc; 154 155 sc = device_get_softc(dev); 156 157 if (sc->pmu[phyno] == NULL) 158 return; 159 160 if (sc->phy_conf->pmu_unk1 == true) 161 CLR4(sc->pmu[phyno], PMU_UNK_H3, PMU_UNK_H3_CLR); 162 163 if (sc->phy_conf->phy0_route == true) { 164 if (phyno == 0) 165 SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 166 else 167 CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); 168 } 169 170 SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS | 171 PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN); 172 } 173 174 static int 175 awusbphy_init(device_t dev) 176 { 177 struct awusbphy_softc *sc; 178 phandle_t node; 179 char pname[20]; 180 int error, off, rid; 181 regulator_t reg; 182 hwreset_t rst; 183 clk_t clk; 184 185 sc = device_get_softc(dev); 186 node = ofw_bus_get_node(dev); 187 188 sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; 189 190 /* Get phy_ctrl region */ 191 if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) { 192 device_printf(dev, "Cannot locate phy control resource\n"); 193 return (ENXIO); 194 } 195 sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 196 RF_ACTIVE); 197 if (sc->phy_ctrl == NULL) { 198 device_printf(dev, "Cannot allocate resource\n"); 199 return (ENXIO); 200 } 201 202 /* Enable clocks */ 203 for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) { 204 error = clk_enable(clk); 205 if (error != 0) { 206 device_printf(dev, "couldn't enable clock %s\n", 207 clk_get_name(clk)); 208 return (error); 209 } 210 } 211 212 /* De-assert resets */ 213 for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) { 214 error = hwreset_deassert(rst); 215 if (error != 0) { 216 device_printf(dev, "couldn't de-assert reset %d\n", 217 off); 218 return (error); 219 } 220 } 221 222 /* Get GPIOs */ 223 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios", 224 &sc->id_det_pin); 225 if (error == 0) 226 sc->id_det_valid = 1; 227 error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios", 228 &sc->vbus_det_pin); 229 if (error == 0) 230 sc->vbus_det_valid = 1; 231 232 sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF, 233 M_WAITOK | M_ZERO); 234 sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF, 235 M_WAITOK | M_ZERO); 236 /* Get regulators */ 237 for (off = 0; off < sc->phy_conf->num_phys; off++) { 238 snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off); 239 if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0) 240 sc->reg[off] = reg; 241 242 snprintf(pname, sizeof(pname), "pmu%d", off); 243 if (ofw_bus_find_string_index(node, "reg-names", 244 pname, &rid) != 0) 245 continue; 246 247 sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 248 RF_ACTIVE); 249 if (sc->pmu[off] == NULL) { 250 device_printf(dev, "Cannot allocate resource\n"); 251 return (ENXIO); 252 } 253 } 254 255 return (0); 256 } 257 258 static int 259 awusbphy_vbus_detect(device_t dev, int *val) 260 { 261 struct awusbphy_softc *sc; 262 bool active; 263 int error; 264 265 sc = device_get_softc(dev); 266 267 if (sc->vbus_det_valid) { 268 error = gpio_pin_is_active(sc->vbus_det_pin, &active); 269 if (error != 0) 270 return (error); 271 *val = active; 272 return (0); 273 } 274 275 *val = 1; 276 return (0); 277 } 278 279 static int 280 awusbphy_phy_enable(device_t dev, intptr_t phy, bool enable) 281 { 282 struct awusbphy_softc *sc; 283 regulator_t reg; 284 int error, vbus_det; 285 286 sc = device_get_softc(dev); 287 288 if (phy < 0 || phy >= sc->phy_conf->num_phys) 289 return (ERANGE); 290 291 /* Configure PHY */ 292 awusbphy_configure(dev, phy); 293 294 /* Regulators are optional. If not found, return success. */ 295 reg = sc->reg[phy]; 296 if (reg == NULL) 297 return (0); 298 299 if (enable) { 300 /* If an external vbus is detected, do not enable phy 0 */ 301 if (phy == 0) { 302 error = awusbphy_vbus_detect(dev, &vbus_det); 303 if (error == 0 && vbus_det == 1) 304 return (0); 305 } else 306 error = 0; 307 if (error == 0) 308 error = regulator_enable(reg); 309 } else 310 error = regulator_disable(reg); 311 if (error != 0) { 312 device_printf(dev, 313 "couldn't %s regulator for phy %jd\n", 314 enable ? "enable" : "disable", (intmax_t)phy); 315 return (error); 316 } 317 318 return (0); 319 } 320 321 static int 322 awusbphy_probe(device_t dev) 323 { 324 if (!ofw_bus_status_okay(dev)) 325 return (ENXIO); 326 327 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 328 return (ENXIO); 329 330 device_set_desc(dev, "Allwinner USB PHY"); 331 return (BUS_PROBE_DEFAULT); 332 } 333 334 static int 335 awusbphy_attach(device_t dev) 336 { 337 int error; 338 339 error = awusbphy_init(dev); 340 if (error) { 341 device_printf(dev, "failed to initialize USB PHY, error %d\n", 342 error); 343 return (error); 344 } 345 346 phy_register_provider(dev); 347 348 return (error); 349 } 350 351 static device_method_t awusbphy_methods[] = { 352 /* Device interface */ 353 DEVMETHOD(device_probe, awusbphy_probe), 354 DEVMETHOD(device_attach, awusbphy_attach), 355 356 /* PHY interface */ 357 DEVMETHOD(phy_enable, awusbphy_phy_enable), 358 359 DEVMETHOD_END 360 }; 361 362 static driver_t awusbphy_driver = { 363 "awusbphy", 364 awusbphy_methods, 365 sizeof(struct awusbphy_softc) 366 }; 367 368 static devclass_t awusbphy_devclass; 369 370 EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, awusbphy_devclass, 371 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); 372 MODULE_VERSION(awusbphy, 1); 373