xref: /freebsd/sys/arm/allwinner/aw_usbphy.c (revision 126700faec5ce890f9212fca52dd63fb68aac987)
1 /*-
2  * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 /*
30  * Allwinner USB PHY
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/rman.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
42 #include <sys/gpio.h>
43 #include <machine/bus.h>
44 
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 #include <dev/gpio/gpiobusvar.h>
48 
49 #include <dev/extres/clk/clk.h>
50 #include <dev/extres/hwreset/hwreset.h>
51 #include <dev/extres/regulator/regulator.h>
52 #include <dev/extres/phy/phy_usb.h>
53 
54 #include "phynode_if.h"
55 
56 enum awusbphy_type {
57 	AWUSBPHY_TYPE_A10 = 1,
58 	AWUSBPHY_TYPE_A13,
59 	AWUSBPHY_TYPE_A20,
60 	AWUSBPHY_TYPE_A31,
61 	AWUSBPHY_TYPE_H3,
62 	AWUSBPHY_TYPE_A64,
63 	AWUSBPHY_TYPE_A83T,
64 	AWUSBPHY_TYPE_H6,
65 };
66 
67 struct aw_usbphy_conf {
68 	int			num_phys;
69 	enum awusbphy_type	phy_type;
70 	bool			pmu_unk1;
71 	bool			phy0_route;
72 };
73 
74 static const struct aw_usbphy_conf a10_usbphy_conf = {
75 	.num_phys = 3,
76 	.phy_type = AWUSBPHY_TYPE_A10,
77 	.pmu_unk1 = false,
78 	.phy0_route = false,
79 };
80 
81 static const struct aw_usbphy_conf a13_usbphy_conf = {
82 	.num_phys = 2,
83 	.phy_type = AWUSBPHY_TYPE_A13,
84 	.pmu_unk1 = false,
85 	.phy0_route = false,
86 };
87 
88 static const struct aw_usbphy_conf a20_usbphy_conf = {
89 	.num_phys = 3,
90 	.phy_type = AWUSBPHY_TYPE_A20,
91 	.pmu_unk1 = false,
92 	.phy0_route = false,
93 };
94 
95 static const struct aw_usbphy_conf a31_usbphy_conf = {
96 	.num_phys = 3,
97 	.phy_type = AWUSBPHY_TYPE_A31,
98 	.pmu_unk1 = false,
99 	.phy0_route = false,
100 };
101 
102 static const struct aw_usbphy_conf h3_usbphy_conf = {
103 	.num_phys = 4,
104 	.phy_type = AWUSBPHY_TYPE_H3,
105 	.pmu_unk1 = true,
106 	.phy0_route = false,
107 };
108 
109 static const struct aw_usbphy_conf a64_usbphy_conf = {
110 	.num_phys = 2,
111 	.phy_type = AWUSBPHY_TYPE_A64,
112 	.pmu_unk1 = true,
113 	.phy0_route = true,
114 };
115 
116 static const struct aw_usbphy_conf a83t_usbphy_conf = {
117 	.num_phys = 3,
118 	.phy_type = AWUSBPHY_TYPE_A83T,
119 	.pmu_unk1 = false,
120 	.phy0_route = false,
121 };
122 
123 static const struct aw_usbphy_conf h6_usbphy_conf = {
124 	.num_phys = 4,
125 	.phy_type = AWUSBPHY_TYPE_H6,
126 	.pmu_unk1 = false,
127 	.phy0_route = true,
128 };
129 
130 static struct ofw_compat_data compat_data[] = {
131 	{ "allwinner,sun4i-a10-usb-phy",	(uintptr_t)&a10_usbphy_conf },
132 	{ "allwinner,sun5i-a13-usb-phy",	(uintptr_t)&a13_usbphy_conf },
133 	{ "allwinner,sun6i-a31-usb-phy",	(uintptr_t)&a31_usbphy_conf },
134 	{ "allwinner,sun7i-a20-usb-phy",	(uintptr_t)&a20_usbphy_conf },
135 	{ "allwinner,sun8i-h3-usb-phy",		(uintptr_t)&h3_usbphy_conf },
136 	{ "allwinner,sun50i-a64-usb-phy",	(uintptr_t)&a64_usbphy_conf },
137 	{ "allwinner,sun8i-a83t-usb-phy",	(uintptr_t)&a83t_usbphy_conf },
138 	{ "allwinner,sun50i-h6-usb-phy",	(uintptr_t)&h6_usbphy_conf },
139 	{ NULL,					0 }
140 };
141 
142 struct awusbphy_softc {
143 	struct resource *	phy_ctrl;
144 	struct resource **	pmu;
145 	regulator_t *		reg;
146 	gpio_pin_t		id_det_pin;
147 	int			id_det_valid;
148 	gpio_pin_t		vbus_det_pin;
149 	int			vbus_det_valid;
150 	struct aw_usbphy_conf	*phy_conf;
151 	int			mode;
152 };
153 
154  /* Phy class and methods. */
155 static int awusbphy_phy_enable(struct phynode *phy, bool enable);
156 static int awusbphy_get_mode(struct phynode *phy, int *mode);
157 static int awusbphy_set_mode(struct phynode *phy, int mode);
158 static phynode_usb_method_t awusbphy_phynode_methods[] = {
159 	PHYNODEMETHOD(phynode_enable, awusbphy_phy_enable),
160 	PHYNODEMETHOD(phynode_usb_get_mode, awusbphy_get_mode),
161 	PHYNODEMETHOD(phynode_usb_set_mode, awusbphy_set_mode),
162 
163 	PHYNODEMETHOD_END
164 };
165 DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods,
166   sizeof(struct phynode_usb_sc), phynode_usb_class);
167 
168 #define	RD4(res, o)	bus_read_4(res, (o))
169 #define	WR4(res, o, v)	bus_write_4(res, (o), (v))
170 #define	CLR4(res, o, m)	WR4(res, o, RD4(res, o) & ~(m))
171 #define	SET4(res, o, m)	WR4(res, o, RD4(res, o) | (m))
172 
173 #define	OTG_PHY_CFG	0x20
174 #define	 OTG_PHY_ROUTE_OTG	(1 << 0)
175 #define	PMU_IRQ_ENABLE	0x00
176 #define	 PMU_AHB_INCR8		(1 << 10)
177 #define	 PMU_AHB_INCR4		(1 << 9)
178 #define	 PMU_AHB_INCRX_ALIGN	(1 << 8)
179 #define	 PMU_ULPI_BYPASS	(1 << 0)
180 #define	PMU_UNK_H3	0x10
181 #define	 PMU_UNK_H3_CLR		0x2
182 #define	PHY_CSR		0x00
183 #define	 ID_PULLUP_EN		(1 << 17)
184 #define	 DPDM_PULLUP_EN		(1 << 16)
185 #define	 FORCE_ID		(0x3 << 14)
186 #define	 FORCE_ID_SHIFT		14
187 #define	 FORCE_ID_LOW		2
188 #define	 FORCE_VBUS_VALID	(0x3 << 12)
189 #define	 FORCE_VBUS_VALID_SHIFT	12
190 #define	 FORCE_VBUS_VALID_HIGH	3
191 #define	 VBUS_CHANGE_DET	(1 << 6)
192 #define	 ID_CHANGE_DET		(1 << 5)
193 #define	 DPDM_CHANGE_DET	(1 << 4)
194 
195 static void
196 awusbphy_configure(device_t dev, int phyno)
197 {
198 	struct awusbphy_softc *sc;
199 
200 	sc = device_get_softc(dev);
201 
202 	if (sc->pmu[phyno] == NULL)
203 		return;
204 
205 	if (sc->phy_conf->pmu_unk1 == true)
206 		CLR4(sc->pmu[phyno], PMU_UNK_H3, PMU_UNK_H3_CLR);
207 
208 	SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS |
209 	    PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN);
210 }
211 
212 static int
213 awusbphy_init(device_t dev)
214 {
215 	struct awusbphy_softc *sc;
216 	phandle_t node;
217 	char pname[20];
218 	int error, off, rid;
219 	regulator_t reg;
220 	hwreset_t rst;
221 	clk_t clk;
222 
223 	sc = device_get_softc(dev);
224 	node = ofw_bus_get_node(dev);
225 
226 	sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
227 
228 	/* Get phy_ctrl region */
229 	if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) {
230 		device_printf(dev, "Cannot locate phy control resource\n");
231 		return (ENXIO);
232 	}
233 	sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
234 	    RF_ACTIVE);
235 	if (sc->phy_ctrl == NULL) {
236 		device_printf(dev, "Cannot allocate resource\n");
237 		return (ENXIO);
238 	}
239 
240 	/* Enable clocks */
241 	for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
242 		error = clk_enable(clk);
243 		if (error != 0) {
244 			device_printf(dev, "couldn't enable clock %s\n",
245 			    clk_get_name(clk));
246 			return (error);
247 		}
248 	}
249 
250 	/* De-assert resets */
251 	for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) {
252 		error = hwreset_deassert(rst);
253 		if (error != 0) {
254 			device_printf(dev, "couldn't de-assert reset %d\n",
255 			    off);
256 			return (error);
257 		}
258 	}
259 
260 	/* Get GPIOs */
261 	error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios",
262 	    &sc->id_det_pin);
263 	if (error == 0)
264 		sc->id_det_valid = 1;
265 	error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios",
266 	    &sc->vbus_det_pin);
267 	if (error == 0)
268 		sc->vbus_det_valid = 1;
269 
270 	sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF,
271 	    M_WAITOK | M_ZERO);
272 	sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF,
273 	    M_WAITOK | M_ZERO);
274 	/* Get regulators */
275 	for (off = 0; off < sc->phy_conf->num_phys; off++) {
276 		snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
277 		if (regulator_get_by_ofw_property(dev, 0, pname, &reg) == 0)
278 			sc->reg[off] = reg;
279 
280 		snprintf(pname, sizeof(pname), "pmu%d", off);
281 		if (ofw_bus_find_string_index(node, "reg-names",
282 		    pname, &rid) != 0)
283 			continue;
284 
285 		sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
286 		    RF_ACTIVE);
287 		if (sc->pmu[off] == NULL) {
288 			device_printf(dev, "Cannot allocate resource\n");
289 			return (ENXIO);
290 		}
291 	}
292 
293 	return (0);
294 }
295 
296 static int
297 awusbphy_vbus_detect(device_t dev, int *val)
298 {
299 	struct awusbphy_softc *sc;
300 	bool active;
301 	int error;
302 
303 	sc = device_get_softc(dev);
304 
305 	if (sc->vbus_det_valid) {
306 		error = gpio_pin_is_active(sc->vbus_det_pin, &active);
307 		if (error != 0) {
308 			device_printf(dev, "Cannot get status of id pin %d\n",
309 			    error);
310 			return (error);
311 		}
312 		*val = active;
313 		return (0);
314 	}
315 
316 	*val = 0;
317 	return (0);
318 }
319 
320 static int
321 awusbphy_phy_enable(struct phynode *phynode, bool enable)
322 {
323 	device_t dev;
324 	intptr_t phy;
325 	struct awusbphy_softc *sc;
326 	regulator_t reg;
327 	int error, vbus_det;
328 
329 	dev = phynode_get_device(phynode);
330 	phy = phynode_get_id(phynode);
331 	sc = device_get_softc(dev);
332 
333 	if (phy < 0 || phy >= sc->phy_conf->num_phys)
334 		return (ERANGE);
335 
336 	/* Configure PHY */
337 	awusbphy_configure(dev, phy);
338 
339 	/* Regulators are optional. If not found, return success. */
340 	reg = sc->reg[phy];
341 	if (reg == NULL)
342 		return (0);
343 
344 	if (phy == 0) {
345 		/* If an external vbus is detected, do not enable phy 0 */
346 		error = awusbphy_vbus_detect(dev, &vbus_det);
347 		if (error)
348 			goto out;
349 
350 		if (vbus_det == 1) {
351 			if (bootverbose)
352 				device_printf(dev, "External VBUS detected, not enabling the regulator\n");
353 
354 			return (0);
355 		}
356 	}
357 	if (enable) {
358 		/* Depending on the PHY we need to route OTG to OHCI/EHCI */
359 		error = regulator_enable(reg);
360 	} else
361 		error = regulator_disable(reg);
362 
363 out:
364 	if (error != 0) {
365 		device_printf(dev,
366 		    "couldn't %s regulator for phy %jd\n",
367 		    enable ? "enable" : "disable", (intmax_t)phy);
368 		return (error);
369 	}
370 
371 	return (0);
372 }
373 
374 static int
375 awusbphy_get_mode(struct phynode *phynode, int *mode)
376 {
377 	struct awusbphy_softc *sc;
378 	device_t dev;
379 
380 	dev = phynode_get_device(phynode);
381 	sc = device_get_softc(dev);
382 
383 	*mode = sc->mode;
384 
385 	return (0);
386 }
387 
388 static int
389 awusbphy_set_mode(struct phynode *phynode, int mode)
390 {
391 	device_t dev;
392 	intptr_t phy;
393 	struct awusbphy_softc *sc;
394 	uint32_t val;
395 	int error, vbus_det;
396 
397 	dev = phynode_get_device(phynode);
398 	phy = phynode_get_id(phynode);
399 	sc = device_get_softc(dev);
400 
401 	if (phy != 0) {
402 		if (mode != PHY_USB_MODE_HOST)
403 			return (EINVAL);
404 		return (0);
405 	}
406 
407 	switch (mode) {
408 	case PHY_USB_MODE_HOST:
409 		val = bus_read_4(sc->phy_ctrl, PHY_CSR);
410 		val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
411 		val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
412 		val &= ~FORCE_ID;
413 		val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
414 		val &= ~FORCE_VBUS_VALID;
415 		val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT);
416 		bus_write_4(sc->phy_ctrl, PHY_CSR, val);
417 		if (sc->phy_conf->phy0_route == true) {
418 			error = awusbphy_vbus_detect(dev, &vbus_det);
419 			if (error)
420 				goto out;
421 			if (vbus_det == 0)
422 				CLR4(sc->phy_ctrl, OTG_PHY_CFG,
423 				  OTG_PHY_ROUTE_OTG);
424 			else
425 				SET4(sc->phy_ctrl, OTG_PHY_CFG,
426 				  OTG_PHY_ROUTE_OTG);
427 		}
428 		break;
429 	case PHY_USB_MODE_OTG:
430 		/* TODO */
431 		break;
432 	}
433 
434 	sc->mode = mode;
435 
436 
437 out:
438 	return (0);
439 }
440 
441 static int
442 awusbphy_probe(device_t dev)
443 {
444 	if (!ofw_bus_status_okay(dev))
445 		return (ENXIO);
446 
447 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
448 		return (ENXIO);
449 
450 	device_set_desc(dev, "Allwinner USB PHY");
451 	return (BUS_PROBE_DEFAULT);
452 }
453 
454 static int
455 awusbphy_attach(device_t dev)
456 {
457 	int error;
458 	struct phynode *phynode;
459 	struct phynode_init_def phy_init;
460 	struct awusbphy_softc *sc;
461 	int i;
462 
463 	sc = device_get_softc(dev);
464 	error = awusbphy_init(dev);
465 	if (error) {
466 		device_printf(dev, "failed to initialize USB PHY, error %d\n",
467 		    error);
468 		return (error);
469 	}
470 
471 	/* Create and register phys. */
472 	for (i = 0; i < sc->phy_conf->num_phys; i++) {
473 		bzero(&phy_init, sizeof(phy_init));
474 		phy_init.id = i;
475 		phy_init.ofw_node = ofw_bus_get_node(dev);
476 		phynode = phynode_create(dev, &awusbphy_phynode_class,
477 		    &phy_init);
478 		if (phynode == NULL) {
479 			device_printf(dev, "failed to create USB PHY\n");
480 			return (ENXIO);
481 		}
482 		if (phynode_register(phynode) == NULL) {
483 			device_printf(dev, "failed to create USB PHY\n");
484 			return (ENXIO);
485 		}
486 	}
487 
488 	return (error);
489 }
490 
491 static device_method_t awusbphy_methods[] = {
492 	/* Device interface */
493 	DEVMETHOD(device_probe,		awusbphy_probe),
494 	DEVMETHOD(device_attach,	awusbphy_attach),
495 
496 	DEVMETHOD_END
497 };
498 
499 static driver_t awusbphy_driver = {
500 	"awusbphy",
501 	awusbphy_methods,
502 	sizeof(struct awusbphy_softc)
503 };
504 
505 static devclass_t awusbphy_devclass;
506 /* aw_usbphy needs to come up after regulators/gpio/etc, but before ehci/ohci */
507 EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, awusbphy_devclass,
508     0, 0, BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
509 MODULE_VERSION(awusbphy, 1);
510