xref: /freebsd/sys/arm/allwinner/aw_rtc.c (revision d9f0ce31900a48d1a2bfc1c8c86f79d1e831451a)
1 /*-
2  * Copyright (c) 2016 Vladimir Belian <fate10@gmail.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/time.h>
33 #include <sys/rman.h>
34 #include <sys/clock.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/resource.h>
39 
40 #include <machine/bus.h>
41 #include <machine/resource.h>
42 
43 #include <dev/ofw/ofw_bus.h>
44 #include <dev/ofw/ofw_bus_subr.h>
45 
46 #include <arm/allwinner/allwinner_machdep.h>
47 
48 #include "clock_if.h"
49 
50 #define	LOSC_CTRL_REG			0x00
51 #define	A10_RTC_DATE_REG		0x04
52 #define	A10_RTC_TIME_REG		0x08
53 #define	A31_LOSC_AUTO_SWT_STA		0x04
54 #define	A31_RTC_DATE_REG		0x10
55 #define	A31_RTC_TIME_REG		0x14
56 
57 #define	TIME_MASK			0x001f3f3f
58 
59 #define	LOSC_OSC_SRC			(1 << 0)
60 #define	LOSC_GSM			(1 << 3)
61 #define	LOSC_AUTO_SW_EN			(1 << 14)
62 #define	LOSC_MAGIC			0x16aa0000
63 #define	LOSC_BUSY_MASK			0x00000380
64 
65 #define	IS_SUN7I 			(allwinner_soc_family() == ALLWINNERSOC_SUN7I)
66 
67 #define	YEAR_MIN			(IS_SUN7I ? 1970 : 2010)
68 #define	YEAR_MAX			(IS_SUN7I ? 2100 : 2073)
69 #define	YEAR_OFFSET			(IS_SUN7I ? 1900 : 2010)
70 #define	YEAR_MASK			(IS_SUN7I ? 0xff : 0x3f)
71 #define	LEAP_BIT			(IS_SUN7I ? 24 : 22)
72 
73 #define	GET_SEC_VALUE(x)		((x)  & 0x0000003f)
74 #define	GET_MIN_VALUE(x)		(((x) & 0x00003f00) >> 8)
75 #define	GET_HOUR_VALUE(x)		(((x) & 0x001f0000) >> 16)
76 #define	GET_DAY_VALUE(x)		((x)  & 0x0000001f)
77 #define	GET_MON_VALUE(x)		(((x) & 0x00000f00) >> 8)
78 #define	GET_YEAR_VALUE(x)		(((x) >> 16) & YEAR_MASK)
79 
80 #define	SET_DAY_VALUE(x)		GET_DAY_VALUE(x)
81 #define	SET_MON_VALUE(x)		(((x) & 0x0000000f) << 8)
82 #define	SET_YEAR_VALUE(x)		(((x) & YEAR_MASK)  << 16)
83 #define	SET_LEAP_VALUE(x)		(((x) & 0x00000001) << LEAP_BIT)
84 #define	SET_SEC_VALUE(x)		GET_SEC_VALUE(x)
85 #define	SET_MIN_VALUE(x)		(((x) & 0x0000003f) << 8)
86 #define	SET_HOUR_VALUE(x)		(((x) & 0x0000001f) << 16)
87 
88 #define	HALF_OF_SEC_NS			500000000
89 #define	RTC_RES_US			1000000
90 #define	RTC_TIMEOUT			70
91 
92 #define	RTC_READ(sc, reg) 		bus_read_4((sc)->res, (reg))
93 #define	RTC_WRITE(sc, reg, val)		bus_write_4((sc)->res, (reg), (val))
94 
95 #define	IS_LEAP_YEAR(y) \
96 	(((y) % 400) == 0 || (((y) % 100) != 0 && ((y) % 4) == 0))
97 
98 #define	A10_RTC	1
99 #define	A20_RTC	2
100 #define	A31_RTC	3
101 
102 static struct ofw_compat_data compat_data[] = {
103 	{ "allwinner,sun4i-a10-rtc", A10_RTC },
104 	{ "allwinner,sun7i-a20-rtc", A20_RTC },
105 	{ "allwinner,sun6i-a31-rtc", A31_RTC },
106 	{ NULL, 0 }
107 };
108 
109 struct aw_rtc_softc {
110 	struct resource		*res;
111 	bus_size_t		rtc_date;
112 	bus_size_t		rtc_time;
113 };
114 
115 static int aw_rtc_probe(device_t dev);
116 static int aw_rtc_attach(device_t dev);
117 static int aw_rtc_detach(device_t dev);
118 
119 static int aw_rtc_gettime(device_t dev, struct timespec *ts);
120 static int aw_rtc_settime(device_t dev, struct timespec *ts);
121 
122 static device_method_t aw_rtc_methods[] = {
123 	DEVMETHOD(device_probe,		aw_rtc_probe),
124 	DEVMETHOD(device_attach,	aw_rtc_attach),
125 	DEVMETHOD(device_detach,	aw_rtc_detach),
126 
127 	DEVMETHOD(clock_gettime,	aw_rtc_gettime),
128 	DEVMETHOD(clock_settime,	aw_rtc_settime),
129 
130 	DEVMETHOD_END
131 };
132 
133 static driver_t aw_rtc_driver = {
134 	"rtc",
135 	aw_rtc_methods,
136 	sizeof(struct aw_rtc_softc),
137 };
138 
139 static devclass_t aw_rtc_devclass;
140 
141 EARLY_DRIVER_MODULE(aw_rtc, simplebus, aw_rtc_driver, aw_rtc_devclass, 0, 0,
142     BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
143 
144 
145 static int
146 aw_rtc_probe(device_t dev)
147 {
148 	if (!ofw_bus_status_okay(dev))
149 		return (ENXIO);
150 
151 	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
152 		return (ENXIO);
153 
154 	device_set_desc(dev, "Allwinner RTC");
155 
156 	return (BUS_PROBE_DEFAULT);
157 }
158 
159 static int
160 aw_rtc_attach(device_t dev)
161 {
162 	struct aw_rtc_softc *sc  = device_get_softc(dev);
163 	bus_size_t rtc_losc_sta;
164 	uint32_t val;
165 	int rid = 0;
166 
167 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
168 	if (!sc->res) {
169 		device_printf(dev, "could not allocate resources\n");
170 		return (ENXIO);
171 	}
172 
173 	switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
174 	case A10_RTC:
175 	case A20_RTC:
176 		sc->rtc_date = A10_RTC_DATE_REG;
177 		sc->rtc_time = A10_RTC_TIME_REG;
178 		rtc_losc_sta = LOSC_CTRL_REG;
179 		break;
180 	case A31_RTC:
181 		sc->rtc_date = A31_RTC_DATE_REG;
182 		sc->rtc_time = A31_RTC_TIME_REG;
183 		rtc_losc_sta = A31_LOSC_AUTO_SWT_STA;
184 		break;
185 	}
186 	val = RTC_READ(sc, LOSC_CTRL_REG);
187 	val |= LOSC_AUTO_SW_EN;
188 	val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC;
189 	RTC_WRITE(sc, LOSC_CTRL_REG, val);
190 
191 	DELAY(100);
192 
193 	if (bootverbose) {
194 		val = RTC_READ(sc, rtc_losc_sta);
195 		if ((val & LOSC_OSC_SRC) == 0)
196 			device_printf(dev, "Using internal oscillator\n");
197 		else
198 			device_printf(dev, "Using external oscillator\n");
199 	}
200 
201 	clock_register(dev, RTC_RES_US);
202 
203 	return (0);
204 }
205 
206 static int
207 aw_rtc_detach(device_t dev)
208 {
209 	/* can't support detach, since there's no clock_unregister function */
210 	return (EBUSY);
211 }
212 
213 static int
214 aw_rtc_gettime(device_t dev, struct timespec *ts)
215 {
216 	struct aw_rtc_softc *sc  = device_get_softc(dev);
217 	struct clocktime ct;
218 	uint32_t rdate, rtime;
219 
220 	rdate = RTC_READ(sc, sc->rtc_date);
221 	rtime = RTC_READ(sc, sc->rtc_time);
222 
223 	if ((rtime & TIME_MASK) == 0)
224 		rdate = RTC_READ(sc, sc->rtc_date);
225 
226 	ct.sec = GET_SEC_VALUE(rtime);
227 	ct.min = GET_MIN_VALUE(rtime);
228 	ct.hour = GET_HOUR_VALUE(rtime);
229 	ct.day = GET_DAY_VALUE(rdate);
230 	ct.mon = GET_MON_VALUE(rdate);
231 	ct.year = GET_YEAR_VALUE(rdate) + YEAR_OFFSET;
232 	ct.dow = -1;
233 	/* RTC resolution is 1 sec */
234 	ct.nsec = 0;
235 
236 	return (clock_ct_to_ts(&ct, ts));
237 }
238 
239 static int
240 aw_rtc_settime(device_t dev, struct timespec *ts)
241 {
242 	struct aw_rtc_softc *sc  = device_get_softc(dev);
243 	struct clocktime ct;
244 	uint32_t clk, rdate, rtime;
245 
246 	/* RTC resolution is 1 sec */
247 	if (ts->tv_nsec >= HALF_OF_SEC_NS)
248 		ts->tv_sec++;
249 	ts->tv_nsec = 0;
250 
251 	clock_ts_to_ct(ts, &ct);
252 
253 	if ((ct.year < YEAR_MIN) || (ct.year > YEAR_MAX)) {
254 		device_printf(dev, "could not set time, year out of range\n");
255 		return (EINVAL);
256 	}
257 
258 	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
259 		if (clk > RTC_TIMEOUT) {
260 			device_printf(dev, "could not set time, RTC busy\n");
261 			return (EINVAL);
262 		}
263 		DELAY(1);
264 	}
265 	/* reset time register to avoid unexpected date increment */
266 	RTC_WRITE(sc, sc->rtc_time, 0);
267 
268 	rdate = SET_DAY_VALUE(ct.day) | SET_MON_VALUE(ct.mon) |
269 		SET_YEAR_VALUE(ct.year - YEAR_OFFSET) |
270 		SET_LEAP_VALUE(IS_LEAP_YEAR(ct.year));
271 
272 	rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) |
273 		SET_HOUR_VALUE(ct.hour);
274 
275 	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
276 		if (clk > RTC_TIMEOUT) {
277 			device_printf(dev, "could not set date, RTC busy\n");
278 			return (EINVAL);
279 		}
280 		DELAY(1);
281 	}
282 	RTC_WRITE(sc, sc->rtc_date, rdate);
283 
284 	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
285 		if (clk > RTC_TIMEOUT) {
286 			device_printf(dev, "could not set time, RTC busy\n");
287 			return (EINVAL);
288 		}
289 		DELAY(1);
290 	}
291 	RTC_WRITE(sc, sc->rtc_time, rtime);
292 
293 	DELAY(RTC_TIMEOUT);
294 
295 	return (0);
296 }
297