1 /*- 2 * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Vladimir Belian <fate10@gmail.com> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/time.h> 32 #include <sys/rman.h> 33 #include <sys/clock.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/resource.h> 38 39 #include <machine/bus.h> 40 #include <machine/resource.h> 41 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 45 #include <dev/extres/clk/clk_fixed.h> 46 47 #include <arm/allwinner/aw_machdep.h> 48 49 #include "clock_if.h" 50 51 #define LOSC_CTRL_REG 0x00 52 #define A10_RTC_DATE_REG 0x04 53 #define A10_RTC_TIME_REG 0x08 54 #define A31_LOSC_AUTO_SWT_STA 0x04 55 #define A31_RTC_DATE_REG 0x10 56 #define A31_RTC_TIME_REG 0x14 57 58 #define TIME_MASK 0x001f3f3f 59 60 #define LOSC_OSC_SRC (1 << 0) 61 #define LOSC_GSM (1 << 3) 62 #define LOSC_AUTO_SW_EN (1 << 14) 63 #define LOSC_MAGIC 0x16aa0000 64 #define LOSC_BUSY_MASK 0x00000380 65 66 #define IS_SUN7I (sc->conf->is_a20 == true) 67 68 #define YEAR_MIN (IS_SUN7I ? 1970 : 2010) 69 #define YEAR_MAX (IS_SUN7I ? 2100 : 2073) 70 #define YEAR_OFFSET (IS_SUN7I ? 1900 : 2010) 71 #define YEAR_MASK (IS_SUN7I ? 0xff : 0x3f) 72 #define LEAP_BIT (IS_SUN7I ? 24 : 22) 73 74 #define GET_SEC_VALUE(x) ((x) & 0x0000003f) 75 #define GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8) 76 #define GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16) 77 #define GET_DAY_VALUE(x) ((x) & 0x0000001f) 78 #define GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8) 79 #define GET_YEAR_VALUE(x) (((x) >> 16) & YEAR_MASK) 80 81 #define SET_DAY_VALUE(x) GET_DAY_VALUE(x) 82 #define SET_MON_VALUE(x) (((x) & 0x0000000f) << 8) 83 #define SET_YEAR_VALUE(x) (((x) & YEAR_MASK) << 16) 84 #define SET_LEAP_VALUE(x) (((x) & 0x00000001) << LEAP_BIT) 85 #define SET_SEC_VALUE(x) GET_SEC_VALUE(x) 86 #define SET_MIN_VALUE(x) (((x) & 0x0000003f) << 8) 87 #define SET_HOUR_VALUE(x) (((x) & 0x0000001f) << 16) 88 89 #define HALF_OF_SEC_NS 500000000 90 #define RTC_RES_US 1000000 91 #define RTC_TIMEOUT 70 92 93 #define RTC_READ(sc, reg) bus_read_4((sc)->res, (reg)) 94 #define RTC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 95 96 #define IS_LEAP_YEAR(y) (((y) % 400) == 0 || (((y) % 100) != 0 && ((y) % 4) == 0)) 97 98 struct aw_rtc_conf { 99 uint64_t iosc_freq; 100 bus_size_t rtc_date; 101 bus_size_t rtc_time; 102 bus_size_t rtc_losc_sta; 103 bool is_a20; 104 }; 105 106 struct aw_rtc_conf a10_conf = { 107 .rtc_date = A10_RTC_DATE_REG, 108 .rtc_time = A10_RTC_TIME_REG, 109 .rtc_losc_sta = LOSC_CTRL_REG, 110 }; 111 112 struct aw_rtc_conf a20_conf = { 113 .rtc_date = A10_RTC_DATE_REG, 114 .rtc_time = A10_RTC_TIME_REG, 115 .rtc_losc_sta = LOSC_CTRL_REG, 116 .is_a20 = true, 117 }; 118 119 struct aw_rtc_conf a31_conf = { 120 .iosc_freq = 650000, /* between 600 and 700 Khz */ 121 .rtc_date = A31_RTC_DATE_REG, 122 .rtc_time = A31_RTC_TIME_REG, 123 .rtc_losc_sta = A31_LOSC_AUTO_SWT_STA, 124 }; 125 126 struct aw_rtc_conf h3_conf = { 127 .iosc_freq = 16000000, 128 .rtc_date = A31_RTC_DATE_REG, 129 .rtc_time = A31_RTC_TIME_REG, 130 .rtc_losc_sta = A31_LOSC_AUTO_SWT_STA, 131 }; 132 133 static struct ofw_compat_data compat_data[] = { 134 { "allwinner,sun4i-a10-rtc", (uintptr_t) &a10_conf }, 135 { "allwinner,sun7i-a20-rtc", (uintptr_t) &a20_conf }, 136 { "allwinner,sun6i-a31-rtc", (uintptr_t) &a31_conf }, 137 { "allwinner,sun8i-h3-rtc", (uintptr_t) &h3_conf }, 138 { "allwinner,sun50i-h5-rtc", (uintptr_t) &h3_conf }, 139 { "allwinner,sun50i-h6-rtc", (uintptr_t) &h3_conf }, 140 { NULL, 0 } 141 }; 142 143 struct aw_rtc_softc { 144 struct resource *res; 145 struct aw_rtc_conf *conf; 146 int type; 147 }; 148 149 static struct clk_fixed_def aw_rtc_osc32k = { 150 .clkdef.id = 0, 151 .freq = 32768, 152 }; 153 154 static struct clk_fixed_def aw_rtc_iosc = { 155 .clkdef.id = 2, 156 }; 157 158 static void aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev); 159 160 static int aw_rtc_probe(device_t dev); 161 static int aw_rtc_attach(device_t dev); 162 static int aw_rtc_detach(device_t dev); 163 164 static int aw_rtc_gettime(device_t dev, struct timespec *ts); 165 static int aw_rtc_settime(device_t dev, struct timespec *ts); 166 167 static device_method_t aw_rtc_methods[] = { 168 DEVMETHOD(device_probe, aw_rtc_probe), 169 DEVMETHOD(device_attach, aw_rtc_attach), 170 DEVMETHOD(device_detach, aw_rtc_detach), 171 172 DEVMETHOD(clock_gettime, aw_rtc_gettime), 173 DEVMETHOD(clock_settime, aw_rtc_settime), 174 175 DEVMETHOD_END 176 }; 177 178 static driver_t aw_rtc_driver = { 179 "rtc", 180 aw_rtc_methods, 181 sizeof(struct aw_rtc_softc), 182 }; 183 184 EARLY_DRIVER_MODULE(aw_rtc, simplebus, aw_rtc_driver, 0, 0, 185 BUS_PASS_RESOURCE + BUS_PASS_ORDER_FIRST); 186 MODULE_VERSION(aw_rtc, 1); 187 SIMPLEBUS_PNP_INFO(compat_data); 188 189 static int 190 aw_rtc_probe(device_t dev) 191 { 192 if (!ofw_bus_status_okay(dev)) 193 return (ENXIO); 194 195 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) 196 return (ENXIO); 197 198 device_set_desc(dev, "Allwinner RTC"); 199 200 return (BUS_PROBE_DEFAULT); 201 } 202 203 static int 204 aw_rtc_attach(device_t dev) 205 { 206 struct aw_rtc_softc *sc = device_get_softc(dev); 207 uint32_t val; 208 int rid = 0; 209 210 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 211 if (!sc->res) { 212 device_printf(dev, "could not allocate resources\n"); 213 return (ENXIO); 214 } 215 216 sc->conf = (struct aw_rtc_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; 217 val = RTC_READ(sc, LOSC_CTRL_REG); 218 val |= LOSC_AUTO_SW_EN; 219 val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC; 220 RTC_WRITE(sc, LOSC_CTRL_REG, val); 221 222 DELAY(100); 223 224 if (bootverbose) { 225 val = RTC_READ(sc, sc->conf->rtc_losc_sta); 226 if ((val & LOSC_OSC_SRC) == 0) 227 device_printf(dev, "Using internal oscillator\n"); 228 else 229 device_printf(dev, "Using external oscillator\n"); 230 } 231 232 aw_rtc_install_clocks(sc, dev); 233 234 clock_register(dev, RTC_RES_US); 235 236 return (0); 237 } 238 239 static int 240 aw_rtc_detach(device_t dev) 241 { 242 /* can't support detach, since there's no clock_unregister function */ 243 return (EBUSY); 244 } 245 246 static void 247 aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev) { 248 struct clkdom *clkdom; 249 const char **clknames; 250 phandle_t node; 251 int nclocks; 252 253 node = ofw_bus_get_node(dev); 254 nclocks = ofw_bus_string_list_to_array(node, "clock-output-names", &clknames); 255 /* No clocks to export */ 256 if (nclocks <= 0) 257 return; 258 259 if (nclocks != 3) { 260 device_printf(dev, "Having only %d clocks instead of 3, aborting\n", nclocks); 261 return; 262 } 263 264 clkdom = clkdom_create(dev); 265 266 aw_rtc_osc32k.clkdef.name = clknames[0]; 267 if (clknode_fixed_register(clkdom, &aw_rtc_osc32k) != 0) 268 device_printf(dev, "Cannot register osc32k clock\n"); 269 270 aw_rtc_iosc.clkdef.name = clknames[2]; 271 aw_rtc_iosc.freq = sc->conf->iosc_freq; 272 if (clknode_fixed_register(clkdom, &aw_rtc_iosc) != 0) 273 device_printf(dev, "Cannot register iosc clock\n"); 274 275 clkdom_finit(clkdom); 276 277 if (bootverbose) 278 clkdom_dump(clkdom); 279 } 280 281 static int 282 aw_rtc_gettime(device_t dev, struct timespec *ts) 283 { 284 struct aw_rtc_softc *sc = device_get_softc(dev); 285 struct clocktime ct; 286 uint32_t rdate, rtime; 287 288 rdate = RTC_READ(sc, sc->conf->rtc_date); 289 rtime = RTC_READ(sc, sc->conf->rtc_time); 290 291 if ((rtime & TIME_MASK) == 0) 292 rdate = RTC_READ(sc, sc->conf->rtc_date); 293 294 ct.sec = GET_SEC_VALUE(rtime); 295 ct.min = GET_MIN_VALUE(rtime); 296 ct.hour = GET_HOUR_VALUE(rtime); 297 ct.day = GET_DAY_VALUE(rdate); 298 ct.mon = GET_MON_VALUE(rdate); 299 ct.year = GET_YEAR_VALUE(rdate) + YEAR_OFFSET; 300 ct.dow = -1; 301 /* RTC resolution is 1 sec */ 302 ct.nsec = 0; 303 304 return (clock_ct_to_ts(&ct, ts)); 305 } 306 307 static int 308 aw_rtc_settime(device_t dev, struct timespec *ts) 309 { 310 struct aw_rtc_softc *sc = device_get_softc(dev); 311 struct clocktime ct; 312 uint32_t clk, rdate, rtime; 313 314 /* RTC resolution is 1 sec */ 315 if (ts->tv_nsec >= HALF_OF_SEC_NS) 316 ts->tv_sec++; 317 ts->tv_nsec = 0; 318 319 clock_ts_to_ct(ts, &ct); 320 321 if ((ct.year < YEAR_MIN) || (ct.year > YEAR_MAX)) { 322 device_printf(dev, "could not set time, year out of range\n"); 323 return (EINVAL); 324 } 325 326 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 327 if (clk > RTC_TIMEOUT) { 328 device_printf(dev, "could not set time, RTC busy\n"); 329 return (EINVAL); 330 } 331 DELAY(1); 332 } 333 /* reset time register to avoid unexpected date increment */ 334 RTC_WRITE(sc, sc->conf->rtc_time, 0); 335 336 rdate = SET_DAY_VALUE(ct.day) | SET_MON_VALUE(ct.mon) | 337 SET_YEAR_VALUE(ct.year - YEAR_OFFSET) | 338 SET_LEAP_VALUE(IS_LEAP_YEAR(ct.year)); 339 340 rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) | 341 SET_HOUR_VALUE(ct.hour); 342 343 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 344 if (clk > RTC_TIMEOUT) { 345 device_printf(dev, "could not set date, RTC busy\n"); 346 return (EINVAL); 347 } 348 DELAY(1); 349 } 350 RTC_WRITE(sc, sc->conf->rtc_date, rdate); 351 352 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 353 if (clk > RTC_TIMEOUT) { 354 device_printf(dev, "could not set time, RTC busy\n"); 355 return (EINVAL); 356 } 357 DELAY(1); 358 } 359 RTC_WRITE(sc, sc->conf->rtc_time, rtime); 360 361 DELAY(RTC_TIMEOUT); 362 363 return (0); 364 } 365