xref: /freebsd/sys/arm/allwinner/aw_rtc.c (revision 52c2bb75163559a6e2866ad374a7de67a4ea1273)
1 /*-
2  * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.Org>
3  * Copyright (c) 2016 Vladimir Belian <fate10@gmail.com>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/time.h>
34 #include <sys/rman.h>
35 #include <sys/clock.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/resource.h>
40 
41 #include <machine/bus.h>
42 #include <machine/resource.h>
43 
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 
47 #include <dev/extres/clk/clk_fixed.h>
48 
49 #include <arm/allwinner/aw_machdep.h>
50 
51 #include "clock_if.h"
52 
53 #define	LOSC_CTRL_REG			0x00
54 #define	A10_RTC_DATE_REG		0x04
55 #define	A10_RTC_TIME_REG		0x08
56 #define	A31_LOSC_AUTO_SWT_STA		0x04
57 #define	A31_RTC_DATE_REG		0x10
58 #define	A31_RTC_TIME_REG		0x14
59 
60 #define	TIME_MASK			0x001f3f3f
61 
62 #define	LOSC_OSC_SRC			(1 << 0)
63 #define	LOSC_GSM			(1 << 3)
64 #define	LOSC_AUTO_SW_EN			(1 << 14)
65 #define	LOSC_MAGIC			0x16aa0000
66 #define	LOSC_BUSY_MASK			0x00000380
67 
68 #define	IS_SUN7I			(sc->conf->is_a20 == true)
69 
70 #define	YEAR_MIN			(IS_SUN7I ? 1970 : 2010)
71 #define	YEAR_MAX			(IS_SUN7I ? 2100 : 2073)
72 #define	YEAR_OFFSET			(IS_SUN7I ? 1900 : 2010)
73 #define	YEAR_MASK			(IS_SUN7I ? 0xff : 0x3f)
74 #define	LEAP_BIT			(IS_SUN7I ? 24 : 22)
75 
76 #define	GET_SEC_VALUE(x)		((x)  & 0x0000003f)
77 #define	GET_MIN_VALUE(x)		(((x) & 0x00003f00) >> 8)
78 #define	GET_HOUR_VALUE(x)		(((x) & 0x001f0000) >> 16)
79 #define	GET_DAY_VALUE(x)		((x)  & 0x0000001f)
80 #define	GET_MON_VALUE(x)		(((x) & 0x00000f00) >> 8)
81 #define	GET_YEAR_VALUE(x)		(((x) >> 16) & YEAR_MASK)
82 
83 #define	SET_DAY_VALUE(x)		GET_DAY_VALUE(x)
84 #define	SET_MON_VALUE(x)		(((x) & 0x0000000f) << 8)
85 #define	SET_YEAR_VALUE(x)		(((x) & YEAR_MASK)  << 16)
86 #define	SET_LEAP_VALUE(x)		(((x) & 0x00000001) << LEAP_BIT)
87 #define	SET_SEC_VALUE(x)		GET_SEC_VALUE(x)
88 #define	SET_MIN_VALUE(x)		(((x) & 0x0000003f) << 8)
89 #define	SET_HOUR_VALUE(x)		(((x) & 0x0000001f) << 16)
90 
91 #define	HALF_OF_SEC_NS			500000000
92 #define	RTC_RES_US			1000000
93 #define	RTC_TIMEOUT			70
94 
95 #define	RTC_READ(sc, reg) 		bus_read_4((sc)->res, (reg))
96 #define	RTC_WRITE(sc, reg, val)		bus_write_4((sc)->res, (reg), (val))
97 
98 #define	IS_LEAP_YEAR(y) (((y) % 400) == 0 || (((y) % 100) != 0 && ((y) % 4) == 0))
99 
100 struct aw_rtc_conf {
101 	uint64_t	iosc_freq;
102 	bus_size_t	rtc_date;
103 	bus_size_t	rtc_time;
104 	bus_size_t	rtc_losc_sta;
105 	bool		is_a20;
106 };
107 
108 struct aw_rtc_conf a10_conf = {
109 	.rtc_date = A10_RTC_DATE_REG,
110 	.rtc_time = A10_RTC_TIME_REG,
111 	.rtc_losc_sta = LOSC_CTRL_REG,
112 };
113 
114 struct aw_rtc_conf a20_conf = {
115 	.rtc_date = A10_RTC_DATE_REG,
116 	.rtc_time = A10_RTC_TIME_REG,
117 	.rtc_losc_sta = LOSC_CTRL_REG,
118 	.is_a20 = true,
119 };
120 
121 struct aw_rtc_conf a31_conf = {
122 	.iosc_freq = 650000,			/* between 600 and 700 Khz */
123 	.rtc_date = A31_RTC_DATE_REG,
124 	.rtc_time = A31_RTC_TIME_REG,
125 	.rtc_losc_sta = A31_LOSC_AUTO_SWT_STA,
126 };
127 
128 struct aw_rtc_conf h3_conf = {
129 	.iosc_freq = 16000000,
130 	.rtc_date = A31_RTC_DATE_REG,
131 	.rtc_time = A31_RTC_TIME_REG,
132 	.rtc_losc_sta = A31_LOSC_AUTO_SWT_STA,
133 };
134 
135 static struct ofw_compat_data compat_data[] = {
136 	{ "allwinner,sun4i-a10-rtc", (uintptr_t) &a10_conf },
137 	{ "allwinner,sun7i-a20-rtc", (uintptr_t) &a20_conf },
138 	{ "allwinner,sun6i-a31-rtc", (uintptr_t) &a31_conf },
139 	{ "allwinner,sun8i-h3-rtc", (uintptr_t) &h3_conf },
140 	{ "allwinner,sun50i-h5-rtc", (uintptr_t) &h3_conf },
141 	{ NULL, 0 }
142 };
143 
144 struct aw_rtc_softc {
145 	struct resource		*res;
146 	struct aw_rtc_conf	*conf;
147 	int			type;
148 };
149 
150 static struct clk_fixed_def aw_rtc_osc32k = {
151 	.clkdef.id = 0,
152 	.freq = 32768,
153 };
154 
155 static struct clk_fixed_def aw_rtc_iosc = {
156 	.clkdef.id = 2,
157 };
158 
159 static void	aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev);
160 
161 static int aw_rtc_probe(device_t dev);
162 static int aw_rtc_attach(device_t dev);
163 static int aw_rtc_detach(device_t dev);
164 
165 static int aw_rtc_gettime(device_t dev, struct timespec *ts);
166 static int aw_rtc_settime(device_t dev, struct timespec *ts);
167 
168 static device_method_t aw_rtc_methods[] = {
169 	DEVMETHOD(device_probe,		aw_rtc_probe),
170 	DEVMETHOD(device_attach,	aw_rtc_attach),
171 	DEVMETHOD(device_detach,	aw_rtc_detach),
172 
173 	DEVMETHOD(clock_gettime,	aw_rtc_gettime),
174 	DEVMETHOD(clock_settime,	aw_rtc_settime),
175 
176 	DEVMETHOD_END
177 };
178 
179 static driver_t aw_rtc_driver = {
180 	"rtc",
181 	aw_rtc_methods,
182 	sizeof(struct aw_rtc_softc),
183 };
184 
185 static devclass_t aw_rtc_devclass;
186 
187 EARLY_DRIVER_MODULE(aw_rtc, simplebus, aw_rtc_driver, aw_rtc_devclass, 0, 0,
188     BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
189 MODULE_VERSION(aw_rtc, 1);
190 SIMPLEBUS_PNP_INFO(compat_data);
191 
192 static int
193 aw_rtc_probe(device_t dev)
194 {
195 	if (!ofw_bus_status_okay(dev))
196 		return (ENXIO);
197 
198 	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
199 		return (ENXIO);
200 
201 	device_set_desc(dev, "Allwinner RTC");
202 
203 	return (BUS_PROBE_DEFAULT);
204 }
205 
206 static int
207 aw_rtc_attach(device_t dev)
208 {
209 	struct aw_rtc_softc *sc  = device_get_softc(dev);
210 	uint32_t val;
211 	int rid = 0;
212 
213 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
214 	if (!sc->res) {
215 		device_printf(dev, "could not allocate resources\n");
216 		return (ENXIO);
217 	}
218 
219 	sc->conf = (struct aw_rtc_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
220 	val = RTC_READ(sc, LOSC_CTRL_REG);
221 	val |= LOSC_AUTO_SW_EN;
222 	val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC;
223 	RTC_WRITE(sc, LOSC_CTRL_REG, val);
224 
225 	DELAY(100);
226 
227 	if (bootverbose) {
228 		val = RTC_READ(sc, sc->conf->rtc_losc_sta);
229 		if ((val & LOSC_OSC_SRC) == 0)
230 			device_printf(dev, "Using internal oscillator\n");
231 		else
232 			device_printf(dev, "Using external oscillator\n");
233 	}
234 
235 	aw_rtc_install_clocks(sc, dev);
236 
237 	clock_register(dev, RTC_RES_US);
238 
239 	return (0);
240 }
241 
242 static int
243 aw_rtc_detach(device_t dev)
244 {
245 	/* can't support detach, since there's no clock_unregister function */
246 	return (EBUSY);
247 }
248 
249 static void
250 aw_rtc_install_clocks(struct aw_rtc_softc *sc, device_t dev) {
251 	struct clkdom *clkdom;
252 	const char **clknames;
253 	phandle_t node;
254 	int nclocks;
255 
256 	node = ofw_bus_get_node(dev);
257 	nclocks = ofw_bus_string_list_to_array(node, "clock-output-names", &clknames);
258 	/* No clocks to export */
259 	if (nclocks <= 0)
260 		return;
261 
262 	if (nclocks != 3) {
263 		device_printf(dev, "Having only %d clocks instead of 3, aborting\n", nclocks);
264 		return;
265 	}
266 
267 	clkdom = clkdom_create(dev);
268 
269 	aw_rtc_osc32k.clkdef.name = clknames[0];
270 	if (clknode_fixed_register(clkdom, &aw_rtc_osc32k) != 0)
271 		device_printf(dev, "Cannot register osc32k clock\n");
272 
273 	aw_rtc_iosc.clkdef.name = clknames[2];
274 	aw_rtc_iosc.freq = sc->conf->iosc_freq;
275 	if (clknode_fixed_register(clkdom, &aw_rtc_iosc) != 0)
276 		device_printf(dev, "Cannot register iosc clock\n");
277 
278 	clkdom_finit(clkdom);
279 
280 	if (bootverbose)
281 		clkdom_dump(clkdom);
282 }
283 
284 static int
285 aw_rtc_gettime(device_t dev, struct timespec *ts)
286 {
287 	struct aw_rtc_softc *sc  = device_get_softc(dev);
288 	struct clocktime ct;
289 	uint32_t rdate, rtime;
290 
291 	rdate = RTC_READ(sc, sc->conf->rtc_date);
292 	rtime = RTC_READ(sc, sc->conf->rtc_time);
293 
294 	if ((rtime & TIME_MASK) == 0)
295 		rdate = RTC_READ(sc, sc->conf->rtc_date);
296 
297 	ct.sec = GET_SEC_VALUE(rtime);
298 	ct.min = GET_MIN_VALUE(rtime);
299 	ct.hour = GET_HOUR_VALUE(rtime);
300 	ct.day = GET_DAY_VALUE(rdate);
301 	ct.mon = GET_MON_VALUE(rdate);
302 	ct.year = GET_YEAR_VALUE(rdate) + YEAR_OFFSET;
303 	ct.dow = -1;
304 	/* RTC resolution is 1 sec */
305 	ct.nsec = 0;
306 
307 	return (clock_ct_to_ts(&ct, ts));
308 }
309 
310 static int
311 aw_rtc_settime(device_t dev, struct timespec *ts)
312 {
313 	struct aw_rtc_softc *sc  = device_get_softc(dev);
314 	struct clocktime ct;
315 	uint32_t clk, rdate, rtime;
316 
317 	/* RTC resolution is 1 sec */
318 	if (ts->tv_nsec >= HALF_OF_SEC_NS)
319 		ts->tv_sec++;
320 	ts->tv_nsec = 0;
321 
322 	clock_ts_to_ct(ts, &ct);
323 
324 	if ((ct.year < YEAR_MIN) || (ct.year > YEAR_MAX)) {
325 		device_printf(dev, "could not set time, year out of range\n");
326 		return (EINVAL);
327 	}
328 
329 	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
330 		if (clk > RTC_TIMEOUT) {
331 			device_printf(dev, "could not set time, RTC busy\n");
332 			return (EINVAL);
333 		}
334 		DELAY(1);
335 	}
336 	/* reset time register to avoid unexpected date increment */
337 	RTC_WRITE(sc, sc->conf->rtc_time, 0);
338 
339 	rdate = SET_DAY_VALUE(ct.day) | SET_MON_VALUE(ct.mon) |
340 		SET_YEAR_VALUE(ct.year - YEAR_OFFSET) |
341 		SET_LEAP_VALUE(IS_LEAP_YEAR(ct.year));
342 
343 	rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) |
344 		SET_HOUR_VALUE(ct.hour);
345 
346 	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
347 		if (clk > RTC_TIMEOUT) {
348 			device_printf(dev, "could not set date, RTC busy\n");
349 			return (EINVAL);
350 		}
351 		DELAY(1);
352 	}
353 	RTC_WRITE(sc, sc->conf->rtc_date, rdate);
354 
355 	for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) {
356 		if (clk > RTC_TIMEOUT) {
357 			device_printf(dev, "could not set time, RTC busy\n");
358 			return (EINVAL);
359 		}
360 		DELAY(1);
361 	}
362 	RTC_WRITE(sc, sc->conf->rtc_time, rtime);
363 
364 	DELAY(RTC_TIMEOUT);
365 
366 	return (0);
367 }
368