1 /*- 2 * Copyright (c) 2016 Vladimir Belian <fate10@gmail.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/bus.h> 32 #include <sys/time.h> 33 #include <sys/rman.h> 34 #include <sys/clock.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/resource.h> 39 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/ofw_bus_subr.h> 45 46 #include <arm/allwinner/allwinner_machdep.h> 47 48 #include "clock_if.h" 49 50 #define LOSC_CTRL_REG 0x00 51 #define RTC_DATE_REG 0x04 52 #define RTC_TIME_REG 0x08 53 54 #define TIME_MASK 0x001f3f3f 55 56 #define LOSC_OSC_SRC 0x00000001 57 #define LOSC_GSM 0x00000008 58 #define LOSC_AUTO_SW_EN 0x00004000 59 #define LOSC_MAGIC 0x16aa0000 60 #define LOSC_BUSY_MASK 0x00000380 61 62 #define IS_SUN7I (allwinner_soc_family() == ALLWINNERSOC_SUN7I) 63 64 #define YEAR_MIN (IS_SUN7I ? 1970 : 2010) 65 #define YEAR_MAX (IS_SUN7I ? 2100 : 2073) 66 #define YEAR_OFFSET (IS_SUN7I ? 1900 : 2010) 67 #define YEAR_MASK (IS_SUN7I ? 0xff : 0x3f) 68 #define LEAP_BIT (IS_SUN7I ? 24 : 22) 69 70 #define GET_SEC_VALUE(x) ((x) & 0x0000003f) 71 #define GET_MIN_VALUE(x) (((x) & 0x00003f00) >> 8) 72 #define GET_HOUR_VALUE(x) (((x) & 0x001f0000) >> 16) 73 #define GET_DAY_VALUE(x) ((x) & 0x0000001f) 74 #define GET_MON_VALUE(x) (((x) & 0x00000f00) >> 8) 75 #define GET_YEAR_VALUE(x) (((x) >> 16) & YEAR_MASK) 76 77 #define SET_DAY_VALUE(x) GET_DAY_VALUE(x) 78 #define SET_MON_VALUE(x) (((x) & 0x0000000f) << 8) 79 #define SET_YEAR_VALUE(x) (((x) & YEAR_MASK) << 16) 80 #define SET_LEAP_VALUE(x) (((x) & 0x00000001) << LEAP_BIT) 81 #define SET_SEC_VALUE(x) GET_SEC_VALUE(x) 82 #define SET_MIN_VALUE(x) (((x) & 0x0000003f) << 8) 83 #define SET_HOUR_VALUE(x) (((x) & 0x0000001f) << 16) 84 85 #define HALF_OF_SEC_NS 500000000 86 #define RTC_RES_US 1000000 87 #define RTC_TIMEOUT 70 88 89 #define RTC_READ(sc, reg) bus_read_4((sc)->res, (reg)) 90 #define RTC_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 91 92 #define IS_LEAP_YEAR(y) \ 93 (((y) % 400) == 0 || (((y) % 100) != 0 && ((y) % 4) == 0)) 94 95 96 static struct ofw_compat_data compat_data[] = { 97 { "allwinner,sun4i-a10-rtc", true }, 98 { "allwinner,sun7i-a20-rtc", true }, 99 { NULL, false } 100 }; 101 102 struct aw_rtc_softc { 103 struct resource *res; 104 }; 105 106 static int aw_rtc_probe(device_t dev); 107 static int aw_rtc_attach(device_t dev); 108 static int aw_rtc_detach(device_t dev); 109 110 static int aw_rtc_gettime(device_t dev, struct timespec *ts); 111 static int aw_rtc_settime(device_t dev, struct timespec *ts); 112 113 static device_method_t aw_rtc_methods[] = { 114 DEVMETHOD(device_probe, aw_rtc_probe), 115 DEVMETHOD(device_attach, aw_rtc_attach), 116 DEVMETHOD(device_detach, aw_rtc_detach), 117 118 DEVMETHOD(clock_gettime, aw_rtc_gettime), 119 DEVMETHOD(clock_settime, aw_rtc_settime), 120 121 DEVMETHOD_END 122 }; 123 124 static driver_t aw_rtc_driver = { 125 "rtc", 126 aw_rtc_methods, 127 sizeof(struct aw_rtc_softc), 128 }; 129 130 static devclass_t aw_rtc_devclass; 131 132 EARLY_DRIVER_MODULE(aw_rtc, simplebus, aw_rtc_driver, aw_rtc_devclass, 0, 0, 133 BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE); 134 135 136 static int 137 aw_rtc_probe(device_t dev) 138 { 139 if (!ofw_bus_status_okay(dev)) 140 return (ENXIO); 141 142 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) 143 return (ENXIO); 144 145 device_set_desc(dev, "Allwinner RTC"); 146 147 return (BUS_PROBE_DEFAULT); 148 } 149 150 static int 151 aw_rtc_attach(device_t dev) 152 { 153 struct aw_rtc_softc *sc = device_get_softc(dev); 154 uint32_t val; 155 int rid = 0; 156 157 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 158 if (!sc->res) { 159 device_printf(dev, "could not allocate resources\n"); 160 return (ENXIO); 161 } 162 163 val = RTC_READ(sc, LOSC_CTRL_REG); 164 val &= ~LOSC_AUTO_SW_EN; 165 val |= LOSC_MAGIC | LOSC_GSM | LOSC_OSC_SRC; 166 RTC_WRITE(sc, LOSC_CTRL_REG, val); 167 168 DELAY(100); 169 170 val = RTC_READ(sc, LOSC_CTRL_REG); 171 if ((val & LOSC_OSC_SRC) == 0) { 172 bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->res); 173 device_printf(dev, "set LOSC to external failed\n"); 174 return (ENXIO); 175 } 176 177 clock_register(dev, RTC_RES_US); 178 179 return (0); 180 } 181 182 static int 183 aw_rtc_detach(device_t dev) 184 { 185 /* can't support detach, since there's no clock_unregister function */ 186 return (EBUSY); 187 } 188 189 static int 190 aw_rtc_gettime(device_t dev, struct timespec *ts) 191 { 192 struct aw_rtc_softc *sc = device_get_softc(dev); 193 struct clocktime ct; 194 uint32_t rdate, rtime; 195 196 rdate = RTC_READ(sc, RTC_DATE_REG); 197 rtime = RTC_READ(sc, RTC_TIME_REG); 198 199 if ((rtime & TIME_MASK) == 0) 200 rdate = RTC_READ(sc, RTC_DATE_REG); 201 202 ct.sec = GET_SEC_VALUE(rtime); 203 ct.min = GET_MIN_VALUE(rtime); 204 ct.hour = GET_HOUR_VALUE(rtime); 205 ct.day = GET_DAY_VALUE(rdate); 206 ct.mon = GET_MON_VALUE(rdate); 207 ct.year = GET_YEAR_VALUE(rdate) + YEAR_OFFSET; 208 ct.dow = -1; 209 /* RTC resolution is 1 sec */ 210 ct.nsec = 0; 211 212 return (clock_ct_to_ts(&ct, ts)); 213 } 214 215 static int 216 aw_rtc_settime(device_t dev, struct timespec *ts) 217 { 218 struct aw_rtc_softc *sc = device_get_softc(dev); 219 struct clocktime ct; 220 uint32_t clk, rdate, rtime; 221 222 /* RTC resolution is 1 sec */ 223 if (ts->tv_nsec >= HALF_OF_SEC_NS) 224 ts->tv_sec++; 225 ts->tv_nsec = 0; 226 227 clock_ts_to_ct(ts, &ct); 228 229 if ((ct.year < YEAR_MIN) || (ct.year > YEAR_MAX)) { 230 device_printf(dev, "could not set time, year out of range\n"); 231 return (EINVAL); 232 } 233 234 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 235 if (clk > RTC_TIMEOUT) { 236 device_printf(dev, "could not set time, RTC busy\n"); 237 return (EINVAL); 238 } 239 DELAY(1); 240 } 241 /* reset time register to avoid unexpected date increment */ 242 RTC_WRITE(sc, RTC_TIME_REG, 0); 243 244 rdate = SET_DAY_VALUE(ct.day) | SET_MON_VALUE(ct.mon) | 245 SET_YEAR_VALUE(ct.year - YEAR_OFFSET) | 246 SET_LEAP_VALUE(IS_LEAP_YEAR(ct.year)); 247 248 rtime = SET_SEC_VALUE(ct.sec) | SET_MIN_VALUE(ct.min) | 249 SET_HOUR_VALUE(ct.hour); 250 251 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 252 if (clk > RTC_TIMEOUT) { 253 device_printf(dev, "could not set date, RTC busy\n"); 254 return (EINVAL); 255 } 256 DELAY(1); 257 } 258 RTC_WRITE(sc, RTC_DATE_REG, rdate); 259 260 for (clk = 0; RTC_READ(sc, LOSC_CTRL_REG) & LOSC_BUSY_MASK; clk++) { 261 if (clk > RTC_TIMEOUT) { 262 device_printf(dev, "could not set time, RTC busy\n"); 263 return (EINVAL); 264 } 265 DELAY(1); 266 } 267 RTC_WRITE(sc, RTC_TIME_REG, rtime); 268 269 DELAY(RTC_TIMEOUT); 270 271 return (0); 272 } 273