1*25cd5941SJared McNeill /*- 2*25cd5941SJared McNeill * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3*25cd5941SJared McNeill * All rights reserved. 4*25cd5941SJared McNeill * 5*25cd5941SJared McNeill * Redistribution and use in source and binary forms, with or without 6*25cd5941SJared McNeill * modification, are permitted provided that the following conditions 7*25cd5941SJared McNeill * are met: 8*25cd5941SJared McNeill * 1. Redistributions of source code must retain the above copyright 9*25cd5941SJared McNeill * notice, this list of conditions and the following disclaimer. 10*25cd5941SJared McNeill * 2. Redistributions in binary form must reproduce the above copyright 11*25cd5941SJared McNeill * notice, this list of conditions and the following disclaimer in the 12*25cd5941SJared McNeill * documentation and/or other materials provided with the distribution. 13*25cd5941SJared McNeill * 14*25cd5941SJared McNeill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15*25cd5941SJared McNeill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16*25cd5941SJared McNeill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17*25cd5941SJared McNeill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18*25cd5941SJared McNeill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19*25cd5941SJared McNeill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20*25cd5941SJared McNeill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21*25cd5941SJared McNeill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22*25cd5941SJared McNeill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*25cd5941SJared McNeill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*25cd5941SJared McNeill * SUCH DAMAGE. 25*25cd5941SJared McNeill * 26*25cd5941SJared McNeill * $FreeBSD$ 27*25cd5941SJared McNeill */ 28*25cd5941SJared McNeill 29*25cd5941SJared McNeill #include <sys/cdefs.h> 30*25cd5941SJared McNeill __FBSDID("$FreeBSD$"); 31*25cd5941SJared McNeill 32*25cd5941SJared McNeill #include <sys/param.h> 33*25cd5941SJared McNeill #include <sys/systm.h> 34*25cd5941SJared McNeill #include <sys/kernel.h> 35*25cd5941SJared McNeill #include <sys/types.h> 36*25cd5941SJared McNeill 37*25cd5941SJared McNeill #include <arm/allwinner/allwinner_pinctrl.h> 38*25cd5941SJared McNeill 39*25cd5941SJared McNeill #include "opt_soc.h" 40*25cd5941SJared McNeill 41*25cd5941SJared McNeill #ifdef SOC_ALLWINNER_A64 42*25cd5941SJared McNeill 43*25cd5941SJared McNeill static const struct allwinner_pins a64_pins[] = { 44*25cd5941SJared McNeill { "PB0", 1, 0, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", NULL, "eint" } }, 45*25cd5941SJared McNeill { "PB1", 1, 1, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", "sim", "eint" } }, 46*25cd5941SJared McNeill { "PB2", 1, 2, { "gpio_in", "gpio_out", "uart2", NULL, "jtag", "sim", "eint" } }, 47*25cd5941SJared McNeill { "PB3", 1, 3, { "gpio_in", "gpio_out", "uart2", "i2s0", "jtag", "sim", "eint" } }, 48*25cd5941SJared McNeill { "PB4", 1, 4, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } }, 49*25cd5941SJared McNeill { "PB5", 1, 5, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } }, 50*25cd5941SJared McNeill { "PB6", 1, 6, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } }, 51*25cd5941SJared McNeill { "PB7", 1, 7, { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", "eint" } }, 52*25cd5941SJared McNeill { "PB8", 1, 8, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, "eint" } }, 53*25cd5941SJared McNeill { "PB9", 1, 9, { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, "eint" } }, 54*25cd5941SJared McNeill 55*25cd5941SJared McNeill { "PC0", 2, 0, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } }, 56*25cd5941SJared McNeill { "PC1", 2, 1, { "gpio_in", "gpio_out", "nand", "mmc2", "spi0" } }, 57*25cd5941SJared McNeill { "PC2", 2, 2, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } }, 58*25cd5941SJared McNeill { "PC3", 2, 3, { "gpio_in", "gpio_out", "nand", NULL, "spi0" } }, 59*25cd5941SJared McNeill { "PC4", 2, 4, { "gpio_in", "gpio_out", "nand" } }, 60*25cd5941SJared McNeill { "PC5", 2, 5, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 61*25cd5941SJared McNeill { "PC6", 2, 6, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 62*25cd5941SJared McNeill { "PC7", 2, 7, { "gpio_in", "gpio_out", "nand" } }, 63*25cd5941SJared McNeill { "PC8", 2, 8, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 64*25cd5941SJared McNeill { "PC9", 2, 9, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 65*25cd5941SJared McNeill { "PC10", 2, 10, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 66*25cd5941SJared McNeill { "PC11", 2, 11, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 67*25cd5941SJared McNeill { "PC12", 2, 12, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 68*25cd5941SJared McNeill { "PC13", 2, 13, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 69*25cd5941SJared McNeill { "PC14", 2, 14, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 70*25cd5941SJared McNeill { "PC15", 2, 15, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 71*25cd5941SJared McNeill { "PC16", 2, 16, { "gpio_in", "gpio_out", "nand", "mmc2" } }, 72*25cd5941SJared McNeill 73*25cd5941SJared McNeill { "PD0", 3, 0, { "gpio_in", "gpio_out", "lcd", "uart3", "spi1", "ccir" } }, 74*25cd5941SJared McNeill { "PD1", 3, 1, { "gpio_in", "gpio_out", "lcd", "uart3", "spi1", "ccir" } }, 75*25cd5941SJared McNeill { "PD2", 3, 2, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } }, 76*25cd5941SJared McNeill { "PD3", 3, 3, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } }, 77*25cd5941SJared McNeill { "PD4", 3, 4, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } }, 78*25cd5941SJared McNeill { "PD5", 3, 5, { "gpio_in", "gpio_out", "lcd", "uart4", "spi1", "ccir" } }, 79*25cd5941SJared McNeill { "PD6", 3, 6, { "gpio_in", "gpio_out", "lcd", NULL, NULL, "ccir" } }, 80*25cd5941SJared McNeill { "PD7", 3, 7, { "gpio_in", "gpio_out", "lcd", NULL, NULL, "ccir" } }, 81*25cd5941SJared McNeill { "PD8", 3, 8, { "gpio_in", "gpio_out", "lcd", NULL, "emac", "ccir" } }, 82*25cd5941SJared McNeill { "PD9", 3, 9, { "gpio_in", "gpio_out", "lcd", NULL, "emac", "ccir" } }, 83*25cd5941SJared McNeill { "PD10", 3, 10, { "gpio_in", "gpio_out", "lcd", NULL, "emac" } }, 84*25cd5941SJared McNeill { "PD11", 3, 11, { "gpio_in", "gpio_out", "lcd", NULL, "emac" } }, 85*25cd5941SJared McNeill { "PD12", 3, 12, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 86*25cd5941SJared McNeill { "PD13", 3, 13, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 87*25cd5941SJared McNeill { "PD14", 3, 14, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 88*25cd5941SJared McNeill { "PD15", 3, 15, { "gpio_in", "gpio_out", "lcd", "lvds", "emac", "ccir" } }, 89*25cd5941SJared McNeill { "PD16", 3, 16, { "gpio_in", "gpio_out", "lcd", "lvds", "emac", "ccir" } }, 90*25cd5941SJared McNeill { "PD17", 3, 17, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 91*25cd5941SJared McNeill { "PD18", 3, 18, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 92*25cd5941SJared McNeill { "PD19", 3, 19, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 93*25cd5941SJared McNeill { "PD20", 3, 20, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 94*25cd5941SJared McNeill { "PD21", 3, 21, { "gpio_in", "gpio_out", "lcd", "lvds", "emac" } }, 95*25cd5941SJared McNeill { "PD22", 3, 22, { "gpio_in", "gpio_out", "pwm0", NULL, "emac" } }, 96*25cd5941SJared McNeill { "PD23", 3, 23, { "gpio_in", "gpio_out", NULL, NULL, "emac" } }, 97*25cd5941SJared McNeill { "PD24", 3, 24, { "gpio_in", "gpio_out" } }, 98*25cd5941SJared McNeill 99*25cd5941SJared McNeill { "PE0", 4, 0, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 100*25cd5941SJared McNeill { "PE1", 4, 1, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 101*25cd5941SJared McNeill { "PE2", 4, 2, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 102*25cd5941SJared McNeill { "PE3", 4, 3, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 103*25cd5941SJared McNeill { "PE4", 4, 4, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 104*25cd5941SJared McNeill { "PE5", 4, 5, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 105*25cd5941SJared McNeill { "PE6", 4, 6, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 106*25cd5941SJared McNeill { "PE7", 4, 7, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 107*25cd5941SJared McNeill { "PE8", 4, 8, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 108*25cd5941SJared McNeill { "PE9", 4, 9, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 109*25cd5941SJared McNeill { "PE10", 4, 10, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 110*25cd5941SJared McNeill { "PE11", 4, 11, { "gpio_in", "gpio_out", "csi", NULL, "ts" } }, 111*25cd5941SJared McNeill { "PE12", 4, 12, { "gpio_in", "gpio_out", "csi" } }, 112*25cd5941SJared McNeill { "PE13", 4, 13, { "gpio_in", "gpio_out", "csi" } }, 113*25cd5941SJared McNeill { "PE14", 4, 14, { "gpio_in", "gpio_out", "pll_lock", "twi2" } }, 114*25cd5941SJared McNeill { "PE15", 4, 15, { "gpio_in", "gpio_out", NULL, "twi2" } }, 115*25cd5941SJared McNeill { "PE16", 4, 16, { "gpio_in", "gpio_out" } }, 116*25cd5941SJared McNeill { "PE17", 4, 17, { "gpio_in", "gpio_out" } }, 117*25cd5941SJared McNeill 118*25cd5941SJared McNeill { "PF0", 5, 0, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 119*25cd5941SJared McNeill { "PF1", 5, 1, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 120*25cd5941SJared McNeill { "PF2", 5, 2, { "gpio_in", "gpio_out", "mmc0", "uart0" } }, 121*25cd5941SJared McNeill { "PF3", 5, 3, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 122*25cd5941SJared McNeill { "PF4", 5, 4, { "gpio_in", "gpio_out", "mmc0", "uart0" } }, 123*25cd5941SJared McNeill { "PF5", 5, 5, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 124*25cd5941SJared McNeill { "PF6", 5, 6, { "gpio_in", "gpio_out" } }, 125*25cd5941SJared McNeill 126*25cd5941SJared McNeill { "PG0", 6, 0, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } }, 127*25cd5941SJared McNeill { "PG1", 6, 1, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } }, 128*25cd5941SJared McNeill { "PG2", 6, 2, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } }, 129*25cd5941SJared McNeill { "PG3", 6, 3, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } }, 130*25cd5941SJared McNeill { "PG4", 6, 4, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } }, 131*25cd5941SJared McNeill { "PG5", 6, 5, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" } }, 132*25cd5941SJared McNeill { "PG6", 6, 6, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } }, 133*25cd5941SJared McNeill { "PG7", 6, 7, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } }, 134*25cd5941SJared McNeill { "PG8", 6, 8, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } }, 135*25cd5941SJared McNeill { "PG9", 6, 9, { "gpio_in", "gpio_out", "uart1", NULL, NULL, NULL, "eint" } }, 136*25cd5941SJared McNeill { "PG10", 6, 10, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } }, 137*25cd5941SJared McNeill { "PG11", 6, 11, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } }, 138*25cd5941SJared McNeill { "PG12", 6, 12, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } }, 139*25cd5941SJared McNeill { "PG13", 6, 13, { "gpio_in", "gpio_out", "aif3", "pcm1", NULL, NULL, "eint" } }, 140*25cd5941SJared McNeill 141*25cd5941SJared McNeill { "PH0", 7, 0, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "eint" } }, 142*25cd5941SJared McNeill { "PH1", 7, 1, { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "eint" } }, 143*25cd5941SJared McNeill { "PH2", 7, 2, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "eint" } }, 144*25cd5941SJared McNeill { "PH3", 7, 3, { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "eint" } }, 145*25cd5941SJared McNeill { "PH4", 7, 4, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } }, 146*25cd5941SJared McNeill { "PH5", 7, 5, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } }, 147*25cd5941SJared McNeill { "PH6", 7, 6, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } }, 148*25cd5941SJared McNeill { "PH7", 7, 7, { "gpio_in", "gpio_out", "uart3", NULL, NULL, NULL, "eint" } }, 149*25cd5941SJared McNeill { "PH8", 7, 8, { "gpio_in", "gpio_out", "owa", NULL, NULL, NULL, "eint" } }, 150*25cd5941SJared McNeill { "PH9", 7, 9, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" } }, 151*25cd5941SJared McNeill { "PH10", 7, 10, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL, "eint" } }, 152*25cd5941SJared McNeill { "PH11", 7, 11, { "gpio_in", "gpio_out", "mic", NULL, NULL, NULL, "eint" } }, 153*25cd5941SJared McNeill }; 154*25cd5941SJared McNeill 155*25cd5941SJared McNeill const struct allwinner_padconf a64_padconf = { 156*25cd5941SJared McNeill .npins = nitems(a64_pins), 157*25cd5941SJared McNeill .pins = a64_pins, 158*25cd5941SJared McNeill }; 159*25cd5941SJared McNeill 160*25cd5941SJared McNeill #endif /* !SOC_ALLWINNER_A64 */ 161