1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _A20_CPU_CFG_H_ 32 #define _A20_CPU_CFG_H_ 33 34 #define CPU_CFG_BASE 0xe1c25c00 35 36 #define CPU0_RST_CTRL 0x0040 37 #define CPU0_CTRL_REG 0x0044 38 #define CPU0_STATUS_REG 0x0048 39 40 #define CPU1_RST_CTRL 0x0080 41 #define CPU1_CTRL_REG 0x0084 42 #define CPU1_STATUS_REG 0x0088 43 44 #define GENER_CTRL_REG 0x0184 45 46 #define EVENT_IN_REG 0x0190 47 #define PRIVATE_REG 0x01a4 48 49 #define IDLE_CNT0_LOW_REG 0x0200 50 #define IDLE_CNT0_HIGH_REG 0x0204 51 #define IDLE_CNT0_CTRL_REG 0x0208 52 53 #define IDLE_CNT1_LOW_REG 0x0210 54 #define IDLE_CNT1_HIGH_REG 0x0214 55 #define IDLE_CNT1_CTRL_REG 0x0218 56 57 #define OSC24M_CNT64_CTRL_REG 0x0280 58 #define OSC24M_CNT64_LOW_REG 0x0284 59 #define OSC24M_CNT64_HIGH_REG 0x0288 60 61 #define LOSC_CNT64_CTRL_REG 0x0290 62 #define LOSC_CNT64_LOW_REG 0x0294 63 #define LOSC_CNT64_HIGH_REG 0x0298 64 65 #define CNT64_RL_EN 0x02 /* read latch enable */ 66 67 uint64_t a20_read_counter64(void); 68 69 #endif /* _A20_CPU_CFG_H_ */ 70