xref: /freebsd/sys/arm/allwinner/a20/a20_cpu_cfg.c (revision dd41de95a84d979615a2ef11df6850622bf6184e)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /* CPU configuration module for Allwinner A20 */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/malloc.h>
40 #include <sys/rman.h>
41 #include <sys/timeet.h>
42 #include <sys/timetc.h>
43 #include <sys/watchdog.h>
44 #include <machine/bus.h>
45 #include <machine/cpu.h>
46 #include <machine/intr.h>
47 
48 #include <dev/ofw/openfirm.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
51 
52 #include <machine/bus.h>
53 
54 #include "a20_cpu_cfg.h"
55 
56 struct a20_cpu_cfg_softc {
57 	struct resource 	*res;
58 	bus_space_tag_t 	bst;
59 	bus_space_handle_t	bsh;
60 };
61 
62 static struct a20_cpu_cfg_softc *a20_cpu_cfg_sc = NULL;
63 
64 #define cpu_cfg_read_4(sc, reg) 	\
65 	bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
66 #define cpu_cfg_write_4(sc, reg, val)	\
67 	bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
68 
69 static int
70 a20_cpu_cfg_probe(device_t dev)
71 {
72 
73 	if (!ofw_bus_status_okay(dev))
74 		return (ENXIO);
75 
76 	if (ofw_bus_is_compatible(dev, "allwinner,sun7i-cpu-cfg")) {
77 		device_set_desc(dev, "A20 CPU Configuration Module");
78 		return(BUS_PROBE_DEFAULT);
79 	}
80 
81 	return (ENXIO);
82 }
83 
84 static int
85 a20_cpu_cfg_attach(device_t dev)
86 {
87 	struct a20_cpu_cfg_softc *sc = device_get_softc(dev);
88 	int rid = 0;
89 
90 	if (a20_cpu_cfg_sc)
91 		return (ENXIO);
92 
93 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
94 	if (!sc->res) {
95 		device_printf(dev, "could not allocate resource\n");
96 		return (ENXIO);
97 	}
98 
99 	sc->bst = rman_get_bustag(sc->res);
100 	sc->bsh = rman_get_bushandle(sc->res);
101 
102 	a20_cpu_cfg_sc = sc;
103 
104 	return (0);
105 }
106 
107 static device_method_t a20_cpu_cfg_methods[] = {
108 	DEVMETHOD(device_probe, 	a20_cpu_cfg_probe),
109 	DEVMETHOD(device_attach,	a20_cpu_cfg_attach),
110 	{ 0, 0 }
111 };
112 
113 static driver_t a20_cpu_cfg_driver = {
114 	"a20_cpu_cfg",
115 	a20_cpu_cfg_methods,
116 	sizeof(struct a20_cpu_cfg_softc),
117 };
118 
119 static devclass_t a20_cpu_cfg_devclass;
120 
121 EARLY_DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0,
122     BUS_PASS_CPU + BUS_PASS_ORDER_FIRST);
123 
124 uint64_t
125 a20_read_counter64(void)
126 {
127 	uint32_t lo, hi;
128 
129 	/* Latch counter, wait for it to be ready to read. */
130 	cpu_cfg_write_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG, CNT64_RL_EN);
131 	while (cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG) & CNT64_RL_EN)
132 		continue;
133 
134 	hi = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_HIGH_REG);
135 	lo = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_LOW_REG);
136 
137 	return (((uint64_t)hi << 32) | lo);
138 }
139