xref: /freebsd/sys/arm/allwinner/a20/a20_cpu_cfg.c (revision 7447ca0eb235974642312b9555caec00b57d8fc1)
1 /*-
2  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 /* CPU configuration module for Allwinner A20 */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/malloc.h>
38 #include <sys/rman.h>
39 #include <sys/timeet.h>
40 #include <sys/timetc.h>
41 #include <sys/watchdog.h>
42 #include <machine/bus.h>
43 #include <machine/cpu.h>
44 #include <machine/intr.h>
45 
46 #include <dev/fdt/fdt_common.h>
47 #include <dev/ofw/openfirm.h>
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 
51 #include <machine/bus.h>
52 
53 #include "a20_cpu_cfg.h"
54 
55 struct a20_cpu_cfg_softc {
56 	struct resource 	*res;
57 	bus_space_tag_t 	bst;
58 	bus_space_handle_t	bsh;
59 };
60 
61 static struct a20_cpu_cfg_softc *a20_cpu_cfg_sc = NULL;
62 
63 #define cpu_cfg_read_4(sc, reg) 	\
64 	bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
65 #define cpu_cfg_write_4(sc, reg, val)	\
66 	bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
67 
68 static int
69 a20_cpu_cfg_probe(device_t dev)
70 {
71 
72 	if (!ofw_bus_status_okay(dev))
73 		return (ENXIO);
74 
75 	if (ofw_bus_is_compatible(dev, "allwinner,sun7i-cpu-cfg")) {
76 		device_set_desc(dev, "A20 CPU Configuration Module");
77 		return(BUS_PROBE_DEFAULT);
78 	}
79 
80 	return (ENXIO);
81 }
82 
83 static int
84 a20_cpu_cfg_attach(device_t dev)
85 {
86 	struct a20_cpu_cfg_softc *sc = device_get_softc(dev);
87 	int rid = 0;
88 
89 	if (a20_cpu_cfg_sc)
90 		return (ENXIO);
91 
92 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
93 	if (!sc->res) {
94 		device_printf(dev, "could not allocate resource\n");
95 		return (ENXIO);
96 	}
97 
98 	sc->bst = rman_get_bustag(sc->res);
99 	sc->bsh = rman_get_bushandle(sc->res);
100 
101 	a20_cpu_cfg_sc = sc;
102 
103 	return (0);
104 }
105 
106 static device_method_t a20_cpu_cfg_methods[] = {
107 	DEVMETHOD(device_probe, 	a20_cpu_cfg_probe),
108 	DEVMETHOD(device_attach,	a20_cpu_cfg_attach),
109 	{ 0, 0 }
110 };
111 
112 static driver_t a20_cpu_cfg_driver = {
113 	"a20_cpu_cfg",
114 	a20_cpu_cfg_methods,
115 	sizeof(struct a20_cpu_cfg_softc),
116 };
117 
118 static devclass_t a20_cpu_cfg_devclass;
119 
120 EARLY_DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, a20_cpu_cfg_devclass, 0, 0,
121     BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
122 
123 uint64_t
124 a20_read_counter64(void)
125 {
126 	uint32_t lo, hi;
127 
128 	/* Latch counter, wait for it to be ready to read. */
129 	cpu_cfg_write_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG, CNT64_RL_EN);
130 	while (cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG) & CNT64_RL_EN)
131 		continue;
132 
133 	hi = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_HIGH_REG);
134 	lo = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_LOW_REG);
135 
136 	return (((uint64_t)hi << 32) | lo);
137 }
138 
139