xref: /freebsd/sys/arm/allwinner/a20/a20_cpu_cfg.c (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /* CPU configuration module for Allwinner A20 */
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/malloc.h>
37 #include <sys/rman.h>
38 #include <sys/timeet.h>
39 #include <sys/timetc.h>
40 #include <sys/watchdog.h>
41 #include <machine/bus.h>
42 #include <machine/cpu.h>
43 #include <machine/intr.h>
44 
45 #include <dev/ofw/openfirm.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48 
49 #include <machine/bus.h>
50 
51 #include "a20_cpu_cfg.h"
52 
53 struct a20_cpu_cfg_softc {
54 	struct resource 	*res;
55 	bus_space_tag_t 	bst;
56 	bus_space_handle_t	bsh;
57 };
58 
59 static struct a20_cpu_cfg_softc *a20_cpu_cfg_sc = NULL;
60 
61 #define cpu_cfg_read_4(sc, reg) 	\
62 	bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
63 #define cpu_cfg_write_4(sc, reg, val)	\
64 	bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
65 
66 static int
67 a20_cpu_cfg_probe(device_t dev)
68 {
69 
70 	if (!ofw_bus_status_okay(dev))
71 		return (ENXIO);
72 
73 	if (ofw_bus_is_compatible(dev, "allwinner,sun7i-cpu-cfg")) {
74 		device_set_desc(dev, "A20 CPU Configuration Module");
75 		return(BUS_PROBE_DEFAULT);
76 	}
77 
78 	return (ENXIO);
79 }
80 
81 static int
82 a20_cpu_cfg_attach(device_t dev)
83 {
84 	struct a20_cpu_cfg_softc *sc = device_get_softc(dev);
85 	int rid = 0;
86 
87 	if (a20_cpu_cfg_sc)
88 		return (ENXIO);
89 
90 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
91 	if (!sc->res) {
92 		device_printf(dev, "could not allocate resource\n");
93 		return (ENXIO);
94 	}
95 
96 	sc->bst = rman_get_bustag(sc->res);
97 	sc->bsh = rman_get_bushandle(sc->res);
98 
99 	a20_cpu_cfg_sc = sc;
100 
101 	return (0);
102 }
103 
104 static device_method_t a20_cpu_cfg_methods[] = {
105 	DEVMETHOD(device_probe, 	a20_cpu_cfg_probe),
106 	DEVMETHOD(device_attach,	a20_cpu_cfg_attach),
107 	{ 0, 0 }
108 };
109 
110 static driver_t a20_cpu_cfg_driver = {
111 	"a20_cpu_cfg",
112 	a20_cpu_cfg_methods,
113 	sizeof(struct a20_cpu_cfg_softc),
114 };
115 
116 EARLY_DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, 0, 0,
117     BUS_PASS_CPU + BUS_PASS_ORDER_FIRST);
118 
119 uint64_t
120 a20_read_counter64(void)
121 {
122 	uint32_t lo, hi;
123 
124 	/* Latch counter, wait for it to be ready to read. */
125 	cpu_cfg_write_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG, CNT64_RL_EN);
126 	while (cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG) & CNT64_RL_EN)
127 		continue;
128 
129 	hi = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_HIGH_REG);
130 	lo = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_LOW_REG);
131 
132 	return (((uint64_t)hi << 32) | lo);
133 }
134