xref: /freebsd/sys/arm/allwinner/a20/a20_cpu_cfg.c (revision 22cf89c938886d14f5796fc49f9f020c23ea8eaf)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /* CPU configuration module for Allwinner A20 */
30 
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/malloc.h>
38 #include <sys/rman.h>
39 #include <sys/timeet.h>
40 #include <sys/timetc.h>
41 #include <sys/watchdog.h>
42 #include <machine/bus.h>
43 #include <machine/cpu.h>
44 #include <machine/intr.h>
45 
46 #include <dev/ofw/openfirm.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49 
50 #include <machine/bus.h>
51 
52 #include "a20_cpu_cfg.h"
53 
54 struct a20_cpu_cfg_softc {
55 	struct resource 	*res;
56 	bus_space_tag_t 	bst;
57 	bus_space_handle_t	bsh;
58 };
59 
60 static struct a20_cpu_cfg_softc *a20_cpu_cfg_sc = NULL;
61 
62 #define cpu_cfg_read_4(sc, reg) 	\
63 	bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
64 #define cpu_cfg_write_4(sc, reg, val)	\
65 	bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
66 
67 static int
68 a20_cpu_cfg_probe(device_t dev)
69 {
70 
71 	if (!ofw_bus_status_okay(dev))
72 		return (ENXIO);
73 
74 	if (ofw_bus_is_compatible(dev, "allwinner,sun7i-cpu-cfg")) {
75 		device_set_desc(dev, "A20 CPU Configuration Module");
76 		return(BUS_PROBE_DEFAULT);
77 	}
78 
79 	return (ENXIO);
80 }
81 
82 static int
83 a20_cpu_cfg_attach(device_t dev)
84 {
85 	struct a20_cpu_cfg_softc *sc = device_get_softc(dev);
86 	int rid = 0;
87 
88 	if (a20_cpu_cfg_sc)
89 		return (ENXIO);
90 
91 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
92 	if (!sc->res) {
93 		device_printf(dev, "could not allocate resource\n");
94 		return (ENXIO);
95 	}
96 
97 	sc->bst = rman_get_bustag(sc->res);
98 	sc->bsh = rman_get_bushandle(sc->res);
99 
100 	a20_cpu_cfg_sc = sc;
101 
102 	return (0);
103 }
104 
105 static device_method_t a20_cpu_cfg_methods[] = {
106 	DEVMETHOD(device_probe, 	a20_cpu_cfg_probe),
107 	DEVMETHOD(device_attach,	a20_cpu_cfg_attach),
108 	{ 0, 0 }
109 };
110 
111 static driver_t a20_cpu_cfg_driver = {
112 	"a20_cpu_cfg",
113 	a20_cpu_cfg_methods,
114 	sizeof(struct a20_cpu_cfg_softc),
115 };
116 
117 EARLY_DRIVER_MODULE(a20_cpu_cfg, simplebus, a20_cpu_cfg_driver, 0, 0,
118     BUS_PASS_CPU + BUS_PASS_ORDER_FIRST);
119 
120 uint64_t
121 a20_read_counter64(void)
122 {
123 	uint32_t lo, hi;
124 
125 	/* Latch counter, wait for it to be ready to read. */
126 	cpu_cfg_write_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG, CNT64_RL_EN);
127 	while (cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_CTRL_REG) & CNT64_RL_EN)
128 		continue;
129 
130 	hi = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_HIGH_REG);
131 	lo = cpu_cfg_read_4(a20_cpu_cfg_sc, OSC24M_CNT64_LOW_REG);
132 
133 	return (((uint64_t)hi << 32) | lo);
134 }
135