xref: /freebsd/sys/arm/allwinner/a10_sramc.c (revision edf8578117e8844e02c0121147f45e4609b30680)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/malloc.h>
36 #include <sys/rman.h>
37 #include <sys/timeet.h>
38 #include <sys/timetc.h>
39 #include <sys/watchdog.h>
40 #include <machine/bus.h>
41 #include <machine/cpu.h>
42 #include <machine/frame.h>
43 #include <machine/intr.h>
44 
45 #include <dev/ofw/openfirm.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48 
49 #include "a10_sramc.h"
50 
51 #define	SRAM_CTL1_CFG		0x04
52 #define	CTL1_CFG_SRAMD_MAP_USB0	(1 << 0)
53 
54 struct a10_sramc_softc {
55 	struct resource		*res;
56 	bus_space_tag_t		bst;
57 	bus_space_handle_t	bsh;
58 };
59 
60 static struct a10_sramc_softc *a10_sramc_sc;
61 
62 #define	sramc_read_4(sc, reg)		\
63     bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
64 #define	sramc_write_4(sc, reg, val)	\
65     bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
66 
67 static int
68 a10_sramc_probe(device_t dev)
69 {
70 
71 	if (ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-sram-controller")) {
72 		device_set_desc(dev, "Allwinner sramc module");
73 		return (BUS_PROBE_DEFAULT);
74 	}
75 
76 	return (ENXIO);
77 }
78 
79 static int
80 a10_sramc_attach(device_t dev)
81 {
82 	struct a10_sramc_softc *sc = device_get_softc(dev);
83 	int rid = 0;
84 
85 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
86 	if (!sc->res) {
87 		device_printf(dev, "could not allocate resource\n");
88 		return (ENXIO);
89 	}
90 
91 	sc->bst = rman_get_bustag(sc->res);
92 	sc->bsh = rman_get_bushandle(sc->res);
93 
94 	a10_sramc_sc = sc;
95 
96 	return (0);
97 }
98 
99 static device_method_t a10_sramc_methods[] = {
100 	DEVMETHOD(device_probe,		a10_sramc_probe),
101 	DEVMETHOD(device_attach,	a10_sramc_attach),
102 	{ 0, 0 }
103 };
104 
105 static driver_t a10_sramc_driver = {
106 	"a10_sramc",
107 	a10_sramc_methods,
108 	sizeof(struct a10_sramc_softc),
109 };
110 
111 EARLY_DRIVER_MODULE(a10_sramc, simplebus, a10_sramc_driver, 0, 0,
112     BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_FIRST);
113 
114 int
115 a10_map_to_emac(void)
116 {
117 	struct a10_sramc_softc *sc = a10_sramc_sc;
118 	uint32_t reg_value;
119 
120 	if (sc == NULL)
121 		return (ENXIO);
122 
123 	/* Map SRAM to EMAC, set bit 2 and 4. */
124 	reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
125 	reg_value |= 0x5 << 2;
126 	sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
127 
128 	return (0);
129 }
130 
131 int
132 a10_map_to_otg(void)
133 {
134 	struct a10_sramc_softc *sc = a10_sramc_sc;
135 	uint32_t reg_value;
136 
137 	if (sc == NULL)
138 		return (ENXIO);
139 
140 	/* Map SRAM to OTG */
141 	reg_value = sramc_read_4(sc, SRAM_CTL1_CFG);
142 	reg_value |= CTL1_CFG_SRAMD_MAP_USB0;
143 	sramc_write_4(sc, SRAM_CTL1_CFG, reg_value);
144 
145 	return (0);
146 }
147