xref: /freebsd/sys/amd64/vmm/x86.h (revision a03411e84728e9b267056fd31c7d1d9d1dc1b01e)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011 NetApp, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef _X86_H_
30 #define	_X86_H_
31 
32 #define CPUID_0000_0000 (0x0)
33 #define CPUID_0000_0001	(0x1)
34 #define CPUID_0000_0002 (0x2)
35 #define CPUID_0000_0003 (0x3)
36 #define CPUID_0000_0004 (0x4)
37 #define CPUID_0000_0006 (0x6)
38 #define CPUID_0000_0007 (0x7)
39 #define	CPUID_0000_000A	(0xA)
40 #define	CPUID_0000_000B	(0xB)
41 #define	CPUID_0000_000D	(0xD)
42 #define	CPUID_0000_000F	(0xF)
43 #define	CPUID_0000_0010	(0x10)
44 #define	CPUID_0000_0015	(0x15)
45 #define CPUID_8000_0000	(0x80000000)
46 #define CPUID_8000_0001	(0x80000001)
47 #define CPUID_8000_0002	(0x80000002)
48 #define CPUID_8000_0003	(0x80000003)
49 #define CPUID_8000_0004	(0x80000004)
50 #define CPUID_8000_0006	(0x80000006)
51 #define CPUID_8000_0007	(0x80000007)
52 #define CPUID_8000_0008	(0x80000008)
53 #define CPUID_8000_001D	(0x8000001D)
54 #define CPUID_8000_001E	(0x8000001E)
55 
56 /*
57  * CPUID instruction Fn0000_0001:
58  */
59 #define CPUID_0000_0001_APICID_MASK			(0xff<<24)
60 #define CPUID_0000_0001_APICID_SHIFT			24
61 
62 /*
63  * CPUID instruction Fn0000_0001 ECX
64  */
65 #define CPUID_0000_0001_FEAT0_VMX	(1<<5)
66 
67 int x86_emulate_cpuid(struct vcpu *vcpu, uint64_t *rax, uint64_t *rbx,
68     uint64_t *rcx, uint64_t *rdx);
69 
70 enum vm_cpuid_capability {
71 	VCC_NONE,
72 	VCC_NO_EXECUTE,
73 	VCC_FFXSR,
74 	VCC_TCE,
75 	VCC_LAST
76 };
77 
78 /*
79  * Return 'true' if the capability 'cap' is enabled in this virtual cpu
80  * and 'false' otherwise.
81  */
82 bool vm_cpuid_capability(struct vcpu *vcpu, enum vm_cpuid_capability);
83 
84 #define VMM_MTRR_VAR_MAX 10
85 #define VMM_MTRR_DEF_MASK \
86 	(MTRR_DEF_ENABLE | MTRR_DEF_FIXED_ENABLE | MTRR_DEF_TYPE)
87 #define VMM_MTRR_PHYSBASE_MASK (MTRR_PHYSBASE_PHYSBASE | MTRR_PHYSBASE_TYPE)
88 #define VMM_MTRR_PHYSMASK_MASK (MTRR_PHYSMASK_PHYSMASK | MTRR_PHYSMASK_VALID)
89 struct vm_mtrr {
90 	uint64_t def_type;
91 	uint64_t fixed4k[8];
92 	uint64_t fixed16k[2];
93 	uint64_t fixed64k;
94 	struct {
95 		uint64_t base;
96 		uint64_t mask;
97 	} var[VMM_MTRR_VAR_MAX];
98 };
99 
100 int vm_rdmtrr(struct vm_mtrr *mtrr, u_int num, uint64_t *val);
101 int vm_wrmtrr(struct vm_mtrr *mtrr, u_int num, uint64_t val);
102 
103 #endif
104