1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/cpuset.h> 36 37 #include <machine/cpufunc.h> 38 #include <machine/md_var.h> 39 #include <machine/specialreg.h> 40 41 #include <machine/vmm.h> 42 43 #include "x86.h" 44 45 #define CPUID_VM_HIGH 0x40000000 46 47 static const char bhyve_id[12] = "BHyVE BHyVE "; 48 49 int 50 x86_emulate_cpuid(struct vm *vm, int vcpu_id, 51 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) 52 { 53 int error; 54 unsigned int func, regs[4]; 55 enum x2apic_state x2apic_state; 56 57 /* 58 * Requests for invalid CPUID levels should map to the highest 59 * available level instead. 60 */ 61 if (cpu_exthigh != 0 && *eax >= 0x80000000) { 62 if (*eax > cpu_exthigh) 63 *eax = cpu_exthigh; 64 } else if (*eax >= 0x40000000) { 65 if (*eax > CPUID_VM_HIGH) 66 *eax = CPUID_VM_HIGH; 67 } else if (*eax > cpu_high) { 68 *eax = cpu_high; 69 } 70 71 func = *eax; 72 73 /* 74 * In general the approach used for CPU topology is to 75 * advertise a flat topology where all CPUs are packages with 76 * no multi-core or SMT. 77 */ 78 switch (func) { 79 case CPUID_0000_0000: 80 case CPUID_0000_0002: 81 case CPUID_0000_0003: 82 case CPUID_0000_000A: 83 cpuid_count(*eax, *ecx, regs); 84 break; 85 86 case CPUID_8000_0000: 87 case CPUID_8000_0001: 88 case CPUID_8000_0002: 89 case CPUID_8000_0003: 90 case CPUID_8000_0004: 91 case CPUID_8000_0006: 92 case CPUID_8000_0007: 93 case CPUID_8000_0008: 94 cpuid_count(*eax, *ecx, regs); 95 break; 96 97 case CPUID_0000_0001: 98 do_cpuid(1, regs); 99 100 error = vm_get_x2apic_state(vm, vcpu_id, &x2apic_state); 101 if (error) { 102 panic("x86_emulate_cpuid: error %d " 103 "fetching x2apic state", error); 104 } 105 106 /* 107 * Override the APIC ID only in ebx 108 */ 109 regs[1] &= ~(CPUID_LOCAL_APIC_ID); 110 regs[1] |= (vcpu_id << CPUID_0000_0001_APICID_SHIFT); 111 112 /* 113 * Don't expose VMX, SpeedStep or TME capability. 114 * Advertise x2APIC capability and Hypervisor guest. 115 */ 116 regs[2] &= ~(CPUID2_VMX | CPUID2_EST | CPUID2_TM2); 117 118 regs[2] |= CPUID2_HV; 119 120 if (x2apic_state != X2APIC_DISABLED) 121 regs[2] |= CPUID2_X2APIC; 122 123 /* 124 * Hide xsave/osxsave/avx until the FPU save/restore 125 * issues are resolved 126 */ 127 regs[2] &= ~(CPUID2_XSAVE | CPUID2_OSXSAVE | 128 CPUID2_AVX); 129 130 /* 131 * Hide monitor/mwait until we know how to deal with 132 * these instructions. 133 */ 134 regs[2] &= ~CPUID2_MON; 135 136 /* 137 * Hide thermal monitoring 138 */ 139 regs[3] &= ~(CPUID_ACPI | CPUID_TM); 140 141 /* 142 * Machine check handling is done in the host. 143 * Hide MTRR capability. 144 */ 145 regs[3] &= ~(CPUID_MCA | CPUID_MCE | CPUID_MTRR); 146 147 /* 148 * Disable multi-core. 149 */ 150 regs[1] &= ~CPUID_HTT_CORES; 151 regs[3] &= ~CPUID_HTT; 152 break; 153 154 case CPUID_0000_0004: 155 do_cpuid(4, regs); 156 157 /* 158 * Do not expose topology. 159 */ 160 regs[0] &= 0xffff8000; 161 regs[0] |= 0x04008000; 162 break; 163 164 case CPUID_0000_0006: 165 case CPUID_0000_0007: 166 /* 167 * Handle the access, but report 0 for 168 * all options 169 */ 170 regs[0] = 0; 171 regs[1] = 0; 172 regs[2] = 0; 173 regs[3] = 0; 174 break; 175 176 case CPUID_0000_000B: 177 /* 178 * Processor topology enumeration 179 */ 180 regs[0] = 0; 181 regs[1] = 0; 182 regs[2] = *ecx & 0xff; 183 regs[3] = vcpu_id; 184 break; 185 186 case 0x40000000: 187 regs[0] = CPUID_VM_HIGH; 188 bcopy(bhyve_id, ®s[1], 4); 189 bcopy(bhyve_id, ®s[2], 4); 190 bcopy(bhyve_id, ®s[3], 4); 191 break; 192 default: 193 /* XXX: Leaf 5? */ 194 return (0); 195 } 196 197 *eax = regs[0]; 198 *ebx = regs[1]; 199 *ecx = regs[2]; 200 *edx = regs[3]; 201 return (1); 202 } 203