1366f6083SPeter Grehan /*- 2366f6083SPeter Grehan * Copyright (c) 2011 NetApp, Inc. 3366f6083SPeter Grehan * All rights reserved. 4366f6083SPeter Grehan * 5366f6083SPeter Grehan * Redistribution and use in source and binary forms, with or without 6366f6083SPeter Grehan * modification, are permitted provided that the following conditions 7366f6083SPeter Grehan * are met: 8366f6083SPeter Grehan * 1. Redistributions of source code must retain the above copyright 9366f6083SPeter Grehan * notice, this list of conditions and the following disclaimer. 10366f6083SPeter Grehan * 2. Redistributions in binary form must reproduce the above copyright 11366f6083SPeter Grehan * notice, this list of conditions and the following disclaimer in the 12366f6083SPeter Grehan * documentation and/or other materials provided with the distribution. 13366f6083SPeter Grehan * 14366f6083SPeter Grehan * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15366f6083SPeter Grehan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16366f6083SPeter Grehan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17366f6083SPeter Grehan * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18366f6083SPeter Grehan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19366f6083SPeter Grehan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20366f6083SPeter Grehan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21366f6083SPeter Grehan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22366f6083SPeter Grehan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23366f6083SPeter Grehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24366f6083SPeter Grehan * SUCH DAMAGE. 25366f6083SPeter Grehan * 26366f6083SPeter Grehan * $FreeBSD$ 27366f6083SPeter Grehan */ 28366f6083SPeter Grehan 29366f6083SPeter Grehan #include <sys/cdefs.h> 30366f6083SPeter Grehan __FBSDID("$FreeBSD$"); 31366f6083SPeter Grehan 32a2da7af6SNeel Natu #include <sys/param.h> 33366f6083SPeter Grehan #include <sys/types.h> 348b287612SJohn Baldwin #include <sys/systm.h> 35a2da7af6SNeel Natu #include <sys/cpuset.h> 36366f6083SPeter Grehan 37366f6083SPeter Grehan #include <machine/cpufunc.h> 388b287612SJohn Baldwin #include <machine/md_var.h> 39366f6083SPeter Grehan #include <machine/specialreg.h> 40366f6083SPeter Grehan 41a2da7af6SNeel Natu #include <machine/vmm.h> 42a2da7af6SNeel Natu 43366f6083SPeter Grehan #include "x86.h" 44366f6083SPeter Grehan 458b287612SJohn Baldwin #define CPUID_VM_HIGH 0x40000000 468b287612SJohn Baldwin 478b287612SJohn Baldwin static const char bhyve_id[12] = "BHyVE BHyVE "; 488b287612SJohn Baldwin 49366f6083SPeter Grehan int 50a2da7af6SNeel Natu x86_emulate_cpuid(struct vm *vm, int vcpu_id, 51a2da7af6SNeel Natu uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) 52366f6083SPeter Grehan { 53a2da7af6SNeel Natu int error; 54366f6083SPeter Grehan unsigned int func, regs[4]; 55a2da7af6SNeel Natu enum x2apic_state x2apic_state; 56366f6083SPeter Grehan 57366f6083SPeter Grehan func = *eax; 58366f6083SPeter Grehan 598b287612SJohn Baldwin /* 608b287612SJohn Baldwin * Requests for invalid CPUID levels should map to the highest 618b287612SJohn Baldwin * available level instead. 628b287612SJohn Baldwin */ 638b287612SJohn Baldwin if (cpu_exthigh != 0 && *eax >= 0x80000000) { 648b287612SJohn Baldwin if (*eax > cpu_exthigh) 658b287612SJohn Baldwin *eax = cpu_exthigh; 668b287612SJohn Baldwin } else if (*eax >= 0x40000000) { 678b287612SJohn Baldwin if (*eax > CPUID_VM_HIGH) 688b287612SJohn Baldwin *eax = CPUID_VM_HIGH; 698b287612SJohn Baldwin } else if (*eax > cpu_high) { 708b287612SJohn Baldwin *eax = cpu_high; 718b287612SJohn Baldwin } 72366f6083SPeter Grehan 738b287612SJohn Baldwin /* 748b287612SJohn Baldwin * In general the approach used for CPU topology is to 758b287612SJohn Baldwin * advertise a flat topology where all CPUs are packages with 768b287612SJohn Baldwin * no multi-core or SMT. 778b287612SJohn Baldwin */ 78366f6083SPeter Grehan switch (func) { 79366f6083SPeter Grehan case CPUID_0000_0000: 80366f6083SPeter Grehan case CPUID_0000_0002: 81366f6083SPeter Grehan case CPUID_0000_0003: 82366f6083SPeter Grehan case CPUID_0000_000A: 838b287612SJohn Baldwin cpuid_count(*eax, *ecx, regs); 84366f6083SPeter Grehan break; 85366f6083SPeter Grehan 86366f6083SPeter Grehan case CPUID_8000_0000: 87366f6083SPeter Grehan case CPUID_8000_0001: 88366f6083SPeter Grehan case CPUID_8000_0002: 89366f6083SPeter Grehan case CPUID_8000_0003: 90366f6083SPeter Grehan case CPUID_8000_0004: 91366f6083SPeter Grehan case CPUID_8000_0006: 92366f6083SPeter Grehan case CPUID_8000_0007: 93366f6083SPeter Grehan case CPUID_8000_0008: 948b287612SJohn Baldwin cpuid_count(*eax, *ecx, regs); 95366f6083SPeter Grehan break; 96366f6083SPeter Grehan 97366f6083SPeter Grehan case CPUID_0000_0001: 988b287612SJohn Baldwin do_cpuid(1, regs); 998b287612SJohn Baldwin 100a2da7af6SNeel Natu error = vm_get_x2apic_state(vm, vcpu_id, &x2apic_state); 101a2da7af6SNeel Natu if (error) { 102a2da7af6SNeel Natu panic("x86_emulate_cpuid: error %d " 103a2da7af6SNeel Natu "fetching x2apic state", error); 104a2da7af6SNeel Natu } 105a2da7af6SNeel Natu 106366f6083SPeter Grehan /* 107366f6083SPeter Grehan * Override the APIC ID only in ebx 108366f6083SPeter Grehan */ 1098b287612SJohn Baldwin regs[1] &= ~(CPUID_LOCAL_APIC_ID); 1108b287612SJohn Baldwin regs[1] |= (vcpu_id << CPUID_0000_0001_APICID_SHIFT); 111366f6083SPeter Grehan 112366f6083SPeter Grehan /* 1131f3025e1SPeter Grehan * Don't expose VMX, SpeedStep or TME capability. 1148b287612SJohn Baldwin * Advertise x2APIC capability and Hypervisor guest. 115366f6083SPeter Grehan */ 1168b287612SJohn Baldwin regs[2] &= ~(CPUID2_VMX | CPUID2_EST | CPUID2_TM2); 117a2da7af6SNeel Natu 118a2da7af6SNeel Natu regs[2] |= CPUID2_HV; 119a2da7af6SNeel Natu 120a2da7af6SNeel Natu if (x2apic_state != X2APIC_DISABLED) 121a2da7af6SNeel Natu regs[2] |= CPUID2_X2APIC; 122366f6083SPeter Grehan 123366f6083SPeter Grehan /* 124298379f7SPeter Grehan * Hide xsave/osxsave/avx until the FPU save/restore 125298379f7SPeter Grehan * issues are resolved 126298379f7SPeter Grehan */ 127298379f7SPeter Grehan regs[2] &= ~(CPUID2_XSAVE | CPUID2_OSXSAVE | 128298379f7SPeter Grehan CPUID2_AVX); 129298379f7SPeter Grehan 130298379f7SPeter Grehan /* 131ff6ec151SNeel Natu * Hide monitor/mwait until we know how to deal with 132ff6ec151SNeel Natu * these instructions. 133ff6ec151SNeel Natu */ 134ff6ec151SNeel Natu regs[2] &= ~CPUID2_MON; 135ff6ec151SNeel Natu 136ff6ec151SNeel Natu /* 1371f3025e1SPeter Grehan * Hide thermal monitoring 1381f3025e1SPeter Grehan */ 1391f3025e1SPeter Grehan regs[3] &= ~(CPUID_ACPI | CPUID_TM); 1401f3025e1SPeter Grehan 1411f3025e1SPeter Grehan /* 142366f6083SPeter Grehan * Machine check handling is done in the host. 143366f6083SPeter Grehan * Hide MTRR capability. 144366f6083SPeter Grehan */ 145366f6083SPeter Grehan regs[3] &= ~(CPUID_MCA | CPUID_MCE | CPUID_MTRR); 146366f6083SPeter Grehan 1478b287612SJohn Baldwin /* 1488b287612SJohn Baldwin * Disable multi-core. 1498b287612SJohn Baldwin */ 1508b287612SJohn Baldwin regs[1] &= ~CPUID_HTT_CORES; 1518b287612SJohn Baldwin regs[3] &= ~CPUID_HTT; 1528b287612SJohn Baldwin break; 1538b287612SJohn Baldwin 1548b287612SJohn Baldwin case CPUID_0000_0004: 1558b287612SJohn Baldwin do_cpuid(4, regs); 1568b287612SJohn Baldwin 1578b287612SJohn Baldwin /* 1588b287612SJohn Baldwin * Do not expose topology. 1598b287612SJohn Baldwin */ 1608b287612SJohn Baldwin regs[0] &= 0xffff8000; 1618b287612SJohn Baldwin regs[0] |= 0x04008000; 162366f6083SPeter Grehan break; 163366f6083SPeter Grehan 1641f3025e1SPeter Grehan case CPUID_0000_0006: 165*a0cad470SPeter Grehan case CPUID_0000_0007: 1661f3025e1SPeter Grehan /* 1671f3025e1SPeter Grehan * Handle the access, but report 0 for 1681f3025e1SPeter Grehan * all options 1691f3025e1SPeter Grehan */ 1701f3025e1SPeter Grehan regs[0] = 0; 1711f3025e1SPeter Grehan regs[1] = 0; 1721f3025e1SPeter Grehan regs[2] = 0; 1731f3025e1SPeter Grehan regs[3] = 0; 1741f3025e1SPeter Grehan break; 1751f3025e1SPeter Grehan 176366f6083SPeter Grehan case CPUID_0000_000B: 177366f6083SPeter Grehan /* 178366f6083SPeter Grehan * Processor topology enumeration 179366f6083SPeter Grehan */ 180366f6083SPeter Grehan regs[0] = 0; 181366f6083SPeter Grehan regs[1] = 0; 182366f6083SPeter Grehan regs[2] = *ecx & 0xff; 1838b287612SJohn Baldwin regs[3] = vcpu_id; 184366f6083SPeter Grehan break; 185366f6083SPeter Grehan 1868b287612SJohn Baldwin case 0x40000000: 1878b287612SJohn Baldwin regs[0] = CPUID_VM_HIGH; 1888b287612SJohn Baldwin bcopy(bhyve_id, ®s[1], 4); 1898b287612SJohn Baldwin bcopy(bhyve_id, ®s[2], 4); 1908b287612SJohn Baldwin bcopy(bhyve_id, ®s[3], 4); 1918b287612SJohn Baldwin break; 192366f6083SPeter Grehan default: 1938b287612SJohn Baldwin /* XXX: Leaf 5? */ 194366f6083SPeter Grehan return (0); 195366f6083SPeter Grehan } 196366f6083SPeter Grehan 197366f6083SPeter Grehan *eax = regs[0]; 198366f6083SPeter Grehan *ebx = regs[1]; 199366f6083SPeter Grehan *ecx = regs[2]; 200366f6083SPeter Grehan *edx = regs[3]; 201366f6083SPeter Grehan return (1); 202366f6083SPeter Grehan } 203