1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _VMCS_H_ 30 #define _VMCS_H_ 31 32 #ifdef _KERNEL 33 34 struct vm_snapshot_meta; 35 36 struct vmcs { 37 uint32_t identifier; 38 uint32_t abort_code; 39 char _impl_specific[PAGE_SIZE - sizeof(uint32_t) * 2]; 40 }; 41 CTASSERT(sizeof(struct vmcs) == PAGE_SIZE); 42 43 /* MSR save region is composed of an array of 'struct msr_entry' */ 44 struct msr_entry { 45 uint32_t index; 46 uint32_t reserved; 47 uint64_t val; 48 49 }; 50 51 int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count); 52 int vmcs_init(struct vmcs *vmcs); 53 int vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv); 54 int vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val); 55 int vmcs_getdesc(struct vmcs *vmcs, int running, int ident, 56 struct seg_desc *desc); 57 int vmcs_setdesc(struct vmcs *vmcs, int running, int ident, 58 struct seg_desc *desc); 59 #ifdef BHYVE_SNAPSHOT 60 int vmcs_getany(struct vmcs *vmcs, int running, int ident, uint64_t *val); 61 int vmcs_setany(struct vmcs *vmcs, int running, int ident, uint64_t val); 62 int vmcs_snapshot_reg(struct vmcs *vmcs, int running, int ident, 63 struct vm_snapshot_meta *meta); 64 int vmcs_snapshot_desc(struct vmcs *vmcs, int running, int seg, 65 struct vm_snapshot_meta *meta); 66 int vmcs_snapshot_any(struct vmcs *vmcs, int running, int ident, 67 struct vm_snapshot_meta *meta); 68 #endif 69 70 /* 71 * Avoid header pollution caused by inline use of 'vtophys()' in vmx_cpufunc.h 72 */ 73 #ifdef _VMX_CPUFUNC_H_ 74 static __inline uint64_t 75 vmcs_read(uint32_t encoding) 76 { 77 int error __diagused; 78 uint64_t val; 79 80 error = vmread(encoding, &val); 81 KASSERT(error == 0, ("vmcs_read(%u) error %d", encoding, error)); 82 return (val); 83 } 84 85 static __inline void 86 vmcs_write(uint32_t encoding, uint64_t val) 87 { 88 int error __diagused; 89 90 error = vmwrite(encoding, val); 91 KASSERT(error == 0, ("vmcs_write(%u) error %d", encoding, error)); 92 } 93 #endif /* _VMX_CPUFUNC_H_ */ 94 95 #define vmexit_instruction_length() vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH) 96 #define vmcs_guest_rip() vmcs_read(VMCS_GUEST_RIP) 97 #define vmcs_instruction_error() vmcs_read(VMCS_INSTRUCTION_ERROR) 98 #define vmcs_exit_reason() (vmcs_read(VMCS_EXIT_REASON) & 0xffff) 99 #define vmcs_exit_qualification() vmcs_read(VMCS_EXIT_QUALIFICATION) 100 #define vmcs_guest_cr3() vmcs_read(VMCS_GUEST_CR3) 101 #define vmcs_gpa() vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS) 102 #define vmcs_gla() vmcs_read(VMCS_GUEST_LINEAR_ADDRESS) 103 #define vmcs_idt_vectoring_info() vmcs_read(VMCS_IDT_VECTORING_INFO) 104 #define vmcs_idt_vectoring_err() vmcs_read(VMCS_IDT_VECTORING_ERROR) 105 106 #endif /* _KERNEL */ 107 108 #define VMCS_INITIAL 0xffffffffffffffff 109 110 #define VMCS_IDENT(encoding) ((encoding) | 0x80000000) 111 /* 112 * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B. 113 */ 114 #define VMCS_INVALID_ENCODING 0xffffffff 115 116 /* 16-bit control fields */ 117 #define VMCS_VPID 0x00000000 118 #define VMCS_PIR_VECTOR 0x00000002 119 120 /* 16-bit guest-state fields */ 121 #define VMCS_GUEST_ES_SELECTOR 0x00000800 122 #define VMCS_GUEST_CS_SELECTOR 0x00000802 123 #define VMCS_GUEST_SS_SELECTOR 0x00000804 124 #define VMCS_GUEST_DS_SELECTOR 0x00000806 125 #define VMCS_GUEST_FS_SELECTOR 0x00000808 126 #define VMCS_GUEST_GS_SELECTOR 0x0000080A 127 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C 128 #define VMCS_GUEST_TR_SELECTOR 0x0000080E 129 #define VMCS_GUEST_INTR_STATUS 0x00000810 130 131 /* 16-bit host-state fields */ 132 #define VMCS_HOST_ES_SELECTOR 0x00000C00 133 #define VMCS_HOST_CS_SELECTOR 0x00000C02 134 #define VMCS_HOST_SS_SELECTOR 0x00000C04 135 #define VMCS_HOST_DS_SELECTOR 0x00000C06 136 #define VMCS_HOST_FS_SELECTOR 0x00000C08 137 #define VMCS_HOST_GS_SELECTOR 0x00000C0A 138 #define VMCS_HOST_TR_SELECTOR 0x00000C0C 139 140 /* 64-bit control fields */ 141 #define VMCS_IO_BITMAP_A 0x00002000 142 #define VMCS_IO_BITMAP_B 0x00002002 143 #define VMCS_MSR_BITMAP 0x00002004 144 #define VMCS_EXIT_MSR_STORE 0x00002006 145 #define VMCS_EXIT_MSR_LOAD 0x00002008 146 #define VMCS_ENTRY_MSR_LOAD 0x0000200A 147 #define VMCS_EXECUTIVE_VMCS 0x0000200C 148 #define VMCS_TSC_OFFSET 0x00002010 149 #define VMCS_VIRTUAL_APIC 0x00002012 150 #define VMCS_APIC_ACCESS 0x00002014 151 #define VMCS_PIR_DESC 0x00002016 152 #define VMCS_EPTP 0x0000201A 153 #define VMCS_EOI_EXIT0 0x0000201C 154 #define VMCS_EOI_EXIT1 0x0000201E 155 #define VMCS_EOI_EXIT2 0x00002020 156 #define VMCS_EOI_EXIT3 0x00002022 157 #define VMCS_EOI_EXIT(vector) (VMCS_EOI_EXIT0 + ((vector) / 64) * 2) 158 159 /* 64-bit read-only fields */ 160 #define VMCS_GUEST_PHYSICAL_ADDRESS 0x00002400 161 162 /* 64-bit guest-state fields */ 163 #define VMCS_LINK_POINTER 0x00002800 164 #define VMCS_GUEST_IA32_DEBUGCTL 0x00002802 165 #define VMCS_GUEST_IA32_PAT 0x00002804 166 #define VMCS_GUEST_IA32_EFER 0x00002806 167 #define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808 168 #define VMCS_GUEST_PDPTE0 0x0000280A 169 #define VMCS_GUEST_PDPTE1 0x0000280C 170 #define VMCS_GUEST_PDPTE2 0x0000280E 171 #define VMCS_GUEST_PDPTE3 0x00002810 172 173 /* 64-bit host-state fields */ 174 #define VMCS_HOST_IA32_PAT 0x00002C00 175 #define VMCS_HOST_IA32_EFER 0x00002C02 176 #define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04 177 178 /* 32-bit control fields */ 179 #define VMCS_PIN_BASED_CTLS 0x00004000 180 #define VMCS_PRI_PROC_BASED_CTLS 0x00004002 181 #define VMCS_EXCEPTION_BITMAP 0x00004004 182 #define VMCS_PF_ERROR_MASK 0x00004006 183 #define VMCS_PF_ERROR_MATCH 0x00004008 184 #define VMCS_CR3_TARGET_COUNT 0x0000400A 185 #define VMCS_EXIT_CTLS 0x0000400C 186 #define VMCS_EXIT_MSR_STORE_COUNT 0x0000400E 187 #define VMCS_EXIT_MSR_LOAD_COUNT 0x00004010 188 #define VMCS_ENTRY_CTLS 0x00004012 189 #define VMCS_ENTRY_MSR_LOAD_COUNT 0x00004014 190 #define VMCS_ENTRY_INTR_INFO 0x00004016 191 #define VMCS_ENTRY_EXCEPTION_ERROR 0x00004018 192 #define VMCS_ENTRY_INST_LENGTH 0x0000401A 193 #define VMCS_TPR_THRESHOLD 0x0000401C 194 #define VMCS_SEC_PROC_BASED_CTLS 0x0000401E 195 #define VMCS_PLE_GAP 0x00004020 196 #define VMCS_PLE_WINDOW 0x00004022 197 198 /* 32-bit read-only data fields */ 199 #define VMCS_INSTRUCTION_ERROR 0x00004400 200 #define VMCS_EXIT_REASON 0x00004402 201 #define VMCS_EXIT_INTR_INFO 0x00004404 202 #define VMCS_EXIT_INTR_ERRCODE 0x00004406 203 #define VMCS_IDT_VECTORING_INFO 0x00004408 204 #define VMCS_IDT_VECTORING_ERROR 0x0000440A 205 #define VMCS_EXIT_INSTRUCTION_LENGTH 0x0000440C 206 #define VMCS_EXIT_INSTRUCTION_INFO 0x0000440E 207 208 /* 32-bit guest-state fields */ 209 #define VMCS_GUEST_ES_LIMIT 0x00004800 210 #define VMCS_GUEST_CS_LIMIT 0x00004802 211 #define VMCS_GUEST_SS_LIMIT 0x00004804 212 #define VMCS_GUEST_DS_LIMIT 0x00004806 213 #define VMCS_GUEST_FS_LIMIT 0x00004808 214 #define VMCS_GUEST_GS_LIMIT 0x0000480A 215 #define VMCS_GUEST_LDTR_LIMIT 0x0000480C 216 #define VMCS_GUEST_TR_LIMIT 0x0000480E 217 #define VMCS_GUEST_GDTR_LIMIT 0x00004810 218 #define VMCS_GUEST_IDTR_LIMIT 0x00004812 219 #define VMCS_GUEST_ES_ACCESS_RIGHTS 0x00004814 220 #define VMCS_GUEST_CS_ACCESS_RIGHTS 0x00004816 221 #define VMCS_GUEST_SS_ACCESS_RIGHTS 0x00004818 222 #define VMCS_GUEST_DS_ACCESS_RIGHTS 0x0000481A 223 #define VMCS_GUEST_FS_ACCESS_RIGHTS 0x0000481C 224 #define VMCS_GUEST_GS_ACCESS_RIGHTS 0x0000481E 225 #define VMCS_GUEST_LDTR_ACCESS_RIGHTS 0x00004820 226 #define VMCS_GUEST_TR_ACCESS_RIGHTS 0x00004822 227 #define VMCS_GUEST_INTERRUPTIBILITY 0x00004824 228 #define VMCS_GUEST_ACTIVITY 0x00004826 229 #define VMCS_GUEST_SMBASE 0x00004828 230 #define VMCS_GUEST_IA32_SYSENTER_CS 0x0000482A 231 #define VMCS_PREEMPTION_TIMER_VALUE 0x0000482E 232 233 /* 32-bit host state fields */ 234 #define VMCS_HOST_IA32_SYSENTER_CS 0x00004C00 235 236 /* Natural Width control fields */ 237 #define VMCS_CR0_MASK 0x00006000 238 #define VMCS_CR4_MASK 0x00006002 239 #define VMCS_CR0_SHADOW 0x00006004 240 #define VMCS_CR4_SHADOW 0x00006006 241 #define VMCS_CR3_TARGET0 0x00006008 242 #define VMCS_CR3_TARGET1 0x0000600A 243 #define VMCS_CR3_TARGET2 0x0000600C 244 #define VMCS_CR3_TARGET3 0x0000600E 245 246 /* Natural Width read-only fields */ 247 #define VMCS_EXIT_QUALIFICATION 0x00006400 248 #define VMCS_IO_RCX 0x00006402 249 #define VMCS_IO_RSI 0x00006404 250 #define VMCS_IO_RDI 0x00006406 251 #define VMCS_IO_RIP 0x00006408 252 #define VMCS_GUEST_LINEAR_ADDRESS 0x0000640A 253 254 /* Natural Width guest-state fields */ 255 #define VMCS_GUEST_CR0 0x00006800 256 #define VMCS_GUEST_CR3 0x00006802 257 #define VMCS_GUEST_CR4 0x00006804 258 #define VMCS_GUEST_ES_BASE 0x00006806 259 #define VMCS_GUEST_CS_BASE 0x00006808 260 #define VMCS_GUEST_SS_BASE 0x0000680A 261 #define VMCS_GUEST_DS_BASE 0x0000680C 262 #define VMCS_GUEST_FS_BASE 0x0000680E 263 #define VMCS_GUEST_GS_BASE 0x00006810 264 #define VMCS_GUEST_LDTR_BASE 0x00006812 265 #define VMCS_GUEST_TR_BASE 0x00006814 266 #define VMCS_GUEST_GDTR_BASE 0x00006816 267 #define VMCS_GUEST_IDTR_BASE 0x00006818 268 #define VMCS_GUEST_DR7 0x0000681A 269 #define VMCS_GUEST_RSP 0x0000681C 270 #define VMCS_GUEST_RIP 0x0000681E 271 #define VMCS_GUEST_RFLAGS 0x00006820 272 #define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822 273 #define VMCS_GUEST_IA32_SYSENTER_ESP 0x00006824 274 #define VMCS_GUEST_IA32_SYSENTER_EIP 0x00006826 275 276 /* Natural Width host-state fields */ 277 #define VMCS_HOST_CR0 0x00006C00 278 #define VMCS_HOST_CR3 0x00006C02 279 #define VMCS_HOST_CR4 0x00006C04 280 #define VMCS_HOST_FS_BASE 0x00006C06 281 #define VMCS_HOST_GS_BASE 0x00006C08 282 #define VMCS_HOST_TR_BASE 0x00006C0A 283 #define VMCS_HOST_GDTR_BASE 0x00006C0C 284 #define VMCS_HOST_IDTR_BASE 0x00006C0E 285 #define VMCS_HOST_IA32_SYSENTER_ESP 0x00006C10 286 #define VMCS_HOST_IA32_SYSENTER_EIP 0x00006C12 287 #define VMCS_HOST_RSP 0x00006C14 288 #define VMCS_HOST_RIP 0x00006c16 289 290 /* 291 * VM instruction error numbers 292 */ 293 #define VMRESUME_WITH_NON_LAUNCHED_VMCS 5 294 295 /* 296 * VMCS exit reasons 297 */ 298 #define EXIT_REASON_EXCEPTION 0 299 #define EXIT_REASON_EXT_INTR 1 300 #define EXIT_REASON_TRIPLE_FAULT 2 301 #define EXIT_REASON_INIT 3 302 #define EXIT_REASON_SIPI 4 303 #define EXIT_REASON_IO_SMI 5 304 #define EXIT_REASON_SMI 6 305 #define EXIT_REASON_INTR_WINDOW 7 306 #define EXIT_REASON_NMI_WINDOW 8 307 #define EXIT_REASON_TASK_SWITCH 9 308 #define EXIT_REASON_CPUID 10 309 #define EXIT_REASON_GETSEC 11 310 #define EXIT_REASON_HLT 12 311 #define EXIT_REASON_INVD 13 312 #define EXIT_REASON_INVLPG 14 313 #define EXIT_REASON_RDPMC 15 314 #define EXIT_REASON_RDTSC 16 315 #define EXIT_REASON_RSM 17 316 #define EXIT_REASON_VMCALL 18 317 #define EXIT_REASON_VMCLEAR 19 318 #define EXIT_REASON_VMLAUNCH 20 319 #define EXIT_REASON_VMPTRLD 21 320 #define EXIT_REASON_VMPTRST 22 321 #define EXIT_REASON_VMREAD 23 322 #define EXIT_REASON_VMRESUME 24 323 #define EXIT_REASON_VMWRITE 25 324 #define EXIT_REASON_VMXOFF 26 325 #define EXIT_REASON_VMXON 27 326 #define EXIT_REASON_CR_ACCESS 28 327 #define EXIT_REASON_DR_ACCESS 29 328 #define EXIT_REASON_INOUT 30 329 #define EXIT_REASON_RDMSR 31 330 #define EXIT_REASON_WRMSR 32 331 #define EXIT_REASON_INVAL_VMCS 33 332 #define EXIT_REASON_INVAL_MSR 34 333 #define EXIT_REASON_MWAIT 36 334 #define EXIT_REASON_MTF 37 335 #define EXIT_REASON_MONITOR 39 336 #define EXIT_REASON_PAUSE 40 337 #define EXIT_REASON_MCE_DURING_ENTRY 41 338 #define EXIT_REASON_TPR 43 339 #define EXIT_REASON_APIC_ACCESS 44 340 #define EXIT_REASON_VIRTUALIZED_EOI 45 341 #define EXIT_REASON_GDTR_IDTR 46 342 #define EXIT_REASON_LDTR_TR 47 343 #define EXIT_REASON_EPT_FAULT 48 344 #define EXIT_REASON_EPT_MISCONFIG 49 345 #define EXIT_REASON_INVEPT 50 346 #define EXIT_REASON_RDTSCP 51 347 #define EXIT_REASON_VMX_PREEMPT 52 348 #define EXIT_REASON_INVVPID 53 349 #define EXIT_REASON_WBINVD 54 350 #define EXIT_REASON_XSETBV 55 351 #define EXIT_REASON_APIC_WRITE 56 352 #define EXIT_REASON_RDRAND 57 353 #define EXIT_REASON_INVPCID 58 354 #define EXIT_REASON_VMFUNC 59 355 #define EXIT_REASON_ENCLS 60 356 #define EXIT_REASON_RDSEED 61 357 #define EXIT_REASON_PM_LOG_FULL 62 358 #define EXIT_REASON_XSAVES 63 359 #define EXIT_REASON_XRSTORS 64 360 361 /* 362 * NMI unblocking due to IRET. 363 * 364 * Applies to VM-exits due to hardware exception or EPT fault. 365 */ 366 #define EXIT_QUAL_NMIUDTI (1 << 12) 367 /* 368 * VMCS interrupt information fields 369 */ 370 #define VMCS_INTR_VALID (1U << 31) 371 #define VMCS_INTR_T_MASK 0x700 /* Interruption-info type */ 372 #define VMCS_INTR_T_HWINTR (0 << 8) 373 #define VMCS_INTR_T_NMI (2 << 8) 374 #define VMCS_INTR_T_HWEXCEPTION (3 << 8) 375 #define VMCS_INTR_T_SWINTR (4 << 8) 376 #define VMCS_INTR_T_PRIV_SWEXCEPTION (5 << 8) 377 #define VMCS_INTR_T_SWEXCEPTION (6 << 8) 378 #define VMCS_INTR_DEL_ERRCODE (1 << 11) 379 380 /* 381 * VMCS IDT-Vectoring information fields 382 */ 383 #define VMCS_IDT_VEC_VALID (1U << 31) 384 #define VMCS_IDT_VEC_ERRCODE_VALID (1 << 11) 385 386 /* 387 * VMCS Guest interruptibility field 388 */ 389 #define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0) 390 #define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1) 391 #define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2) 392 #define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3) 393 394 /* 395 * Exit qualification for EXIT_REASON_INVAL_VMCS 396 */ 397 #define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3 398 399 /* 400 * Exit qualification for EPT violation 401 */ 402 #define EPT_VIOLATION_DATA_READ (1UL << 0) 403 #define EPT_VIOLATION_DATA_WRITE (1UL << 1) 404 #define EPT_VIOLATION_INST_FETCH (1UL << 2) 405 #define EPT_VIOLATION_GPA_READABLE (1UL << 3) 406 #define EPT_VIOLATION_GPA_WRITEABLE (1UL << 4) 407 #define EPT_VIOLATION_GPA_EXECUTABLE (1UL << 5) 408 #define EPT_VIOLATION_GLA_VALID (1UL << 7) 409 #define EPT_VIOLATION_XLAT_VALID (1UL << 8) 410 411 /* 412 * Exit qualification for APIC-access VM exit 413 */ 414 #define APIC_ACCESS_OFFSET(qual) ((qual) & 0xFFF) 415 #define APIC_ACCESS_TYPE(qual) (((qual) >> 12) & 0xF) 416 417 /* 418 * Exit qualification for APIC-write VM exit 419 */ 420 #define APIC_WRITE_OFFSET(qual) ((qual) & 0xFFF) 421 422 #endif 423