1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _VMCS_H_ 30 #define _VMCS_H_ 31 32 #ifdef _KERNEL 33 struct vmcs { 34 uint32_t identifier; 35 uint32_t abort_code; 36 char _impl_specific[PAGE_SIZE - sizeof(uint32_t) * 2]; 37 }; 38 CTASSERT(sizeof(struct vmcs) == PAGE_SIZE); 39 40 /* MSR save region is composed of an array of 'struct msr_entry' */ 41 struct msr_entry { 42 uint32_t index; 43 uint32_t reserved; 44 uint64_t val; 45 46 }; 47 48 int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count); 49 int vmcs_set_defaults(struct vmcs *vmcs, u_long host_rip, u_long host_rsp, 50 u_long ept_pml4, 51 uint32_t pinbased_ctls, uint32_t procbased_ctls, 52 uint32_t procbased_ctls2, uint32_t exit_ctls, 53 uint32_t entry_ctls, u_long msr_bitmap, 54 uint16_t vpid); 55 int vmcs_getreg(struct vmcs *vmcs, int ident, uint64_t *retval); 56 int vmcs_setreg(struct vmcs *vmcs, int ident, uint64_t val); 57 int vmcs_getdesc(struct vmcs *vmcs, int ident, 58 struct seg_desc *desc); 59 int vmcs_setdesc(struct vmcs *vmcs, int ident, 60 struct seg_desc *desc); 61 uint64_t vmcs_read(uint32_t encoding); 62 63 #define vmexit_instruction_length() vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH) 64 #define vmcs_guest_rip() vmcs_read(VMCS_GUEST_RIP) 65 #define vmcs_instruction_error() vmcs_read(VMCS_INSTRUCTION_ERROR) 66 #define vmcs_exit_reason() (vmcs_read(VMCS_EXIT_REASON) & 0xffff) 67 #define vmcs_exit_qualification() vmcs_read(VMCS_EXIT_QUALIFICATION) 68 #define vmcs_guest_cr3() vmcs_read(VMCS_GUEST_CR3) 69 #define vmcs_gpa() vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS) 70 #define vmcs_gla() vmcs_read(VMCS_GUEST_LINEAR_ADDRESS) 71 72 #endif /* _KERNEL */ 73 74 #define VMCS_INITIAL 0xffffffffffffffff 75 76 #define VMCS_IDENT(encoding) ((encoding) | 0x80000000) 77 /* 78 * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B. 79 */ 80 #define VMCS_INVALID_ENCODING 0xffffffff 81 82 /* 16-bit control fields */ 83 #define VMCS_VPID 0x00000000 84 85 /* 16-bit guest-state fields */ 86 #define VMCS_GUEST_ES_SELECTOR 0x00000800 87 #define VMCS_GUEST_CS_SELECTOR 0x00000802 88 #define VMCS_GUEST_SS_SELECTOR 0x00000804 89 #define VMCS_GUEST_DS_SELECTOR 0x00000806 90 #define VMCS_GUEST_FS_SELECTOR 0x00000808 91 #define VMCS_GUEST_GS_SELECTOR 0x0000080A 92 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C 93 #define VMCS_GUEST_TR_SELECTOR 0x0000080E 94 95 /* 16-bit host-state fields */ 96 #define VMCS_HOST_ES_SELECTOR 0x00000C00 97 #define VMCS_HOST_CS_SELECTOR 0x00000C02 98 #define VMCS_HOST_SS_SELECTOR 0x00000C04 99 #define VMCS_HOST_DS_SELECTOR 0x00000C06 100 #define VMCS_HOST_FS_SELECTOR 0x00000C08 101 #define VMCS_HOST_GS_SELECTOR 0x00000C0A 102 #define VMCS_HOST_TR_SELECTOR 0x00000C0C 103 104 /* 64-bit control fields */ 105 #define VMCS_IO_BITMAP_A 0x00002000 106 #define VMCS_IO_BITMAP_B 0x00002002 107 #define VMCS_MSR_BITMAP 0x00002004 108 #define VMCS_EXIT_MSR_STORE 0x00002006 109 #define VMCS_EXIT_MSR_LOAD 0x00002008 110 #define VMCS_ENTRY_MSR_LOAD 0x0000200A 111 #define VMCS_EXECUTIVE_VMCS 0x0000200C 112 #define VMCS_TSC_OFFSET 0x00002010 113 #define VMCS_VIRTUAL_APIC 0x00002012 114 #define VMCS_APIC_ACCESS 0x00002014 115 #define VMCS_EPTP 0x0000201A 116 117 /* 64-bit read-only fields */ 118 #define VMCS_GUEST_PHYSICAL_ADDRESS 0x00002400 119 120 /* 64-bit guest-state fields */ 121 #define VMCS_LINK_POINTER 0x00002800 122 #define VMCS_GUEST_IA32_DEBUGCTL 0x00002802 123 #define VMCS_GUEST_IA32_PAT 0x00002804 124 #define VMCS_GUEST_IA32_EFER 0x00002806 125 #define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808 126 #define VMCS_GUEST_PDPTE0 0x0000280A 127 #define VMCS_GUEST_PDPTE1 0x0000280C 128 #define VMCS_GUEST_PDPTE2 0x0000280E 129 #define VMCS_GUEST_PDPTE3 0x00002810 130 131 /* 64-bit host-state fields */ 132 #define VMCS_HOST_IA32_PAT 0x00002C00 133 #define VMCS_HOST_IA32_EFER 0x00002C02 134 #define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04 135 136 /* 32-bit control fields */ 137 #define VMCS_PIN_BASED_CTLS 0x00004000 138 #define VMCS_PRI_PROC_BASED_CTLS 0x00004002 139 #define VMCS_EXCEPTION_BITMAP 0x00004004 140 #define VMCS_PF_ERROR_MASK 0x00004006 141 #define VMCS_PF_ERROR_MATCH 0x00004008 142 #define VMCS_CR3_TARGET_COUNT 0x0000400A 143 #define VMCS_EXIT_CTLS 0x0000400C 144 #define VMCS_EXIT_MSR_STORE_COUNT 0x0000400E 145 #define VMCS_EXIT_MSR_LOAD_COUNT 0x00004010 146 #define VMCS_ENTRY_CTLS 0x00004012 147 #define VMCS_ENTRY_MSR_LOAD_COUNT 0x00004014 148 #define VMCS_ENTRY_INTR_INFO 0x00004016 149 #define VMCS_ENTRY_EXCEPTION_ERROR 0x00004018 150 #define VMCS_ENTRY_INST_LENGTH 0x0000401A 151 #define VMCS_TPR_THRESHOLD 0x0000401C 152 #define VMCS_SEC_PROC_BASED_CTLS 0x0000401E 153 #define VMCS_PLE_GAP 0x00004020 154 #define VMCS_PLE_WINDOW 0x00004022 155 156 /* 32-bit read-only data fields */ 157 #define VMCS_INSTRUCTION_ERROR 0x00004400 158 #define VMCS_EXIT_REASON 0x00004402 159 #define VMCS_EXIT_INTERRUPTION_INFO 0x00004404 160 #define VMCS_EXIT_INTERRUPTION_ERROR 0x00004406 161 #define VMCS_IDT_VECTORING_INFO 0x00004408 162 #define VMCS_IDT_VECTORING_ERROR 0x0000440A 163 #define VMCS_EXIT_INSTRUCTION_LENGTH 0x0000440C 164 #define VMCS_EXIT_INSTRUCTION_INFO 0x0000440E 165 166 /* 32-bit guest-state fields */ 167 #define VMCS_GUEST_ES_LIMIT 0x00004800 168 #define VMCS_GUEST_CS_LIMIT 0x00004802 169 #define VMCS_GUEST_SS_LIMIT 0x00004804 170 #define VMCS_GUEST_DS_LIMIT 0x00004806 171 #define VMCS_GUEST_FS_LIMIT 0x00004808 172 #define VMCS_GUEST_GS_LIMIT 0x0000480A 173 #define VMCS_GUEST_LDTR_LIMIT 0x0000480C 174 #define VMCS_GUEST_TR_LIMIT 0x0000480E 175 #define VMCS_GUEST_GDTR_LIMIT 0x00004810 176 #define VMCS_GUEST_IDTR_LIMIT 0x00004812 177 #define VMCS_GUEST_ES_ACCESS_RIGHTS 0x00004814 178 #define VMCS_GUEST_CS_ACCESS_RIGHTS 0x00004816 179 #define VMCS_GUEST_SS_ACCESS_RIGHTS 0x00004818 180 #define VMCS_GUEST_DS_ACCESS_RIGHTS 0x0000481A 181 #define VMCS_GUEST_FS_ACCESS_RIGHTS 0x0000481C 182 #define VMCS_GUEST_GS_ACCESS_RIGHTS 0x0000481E 183 #define VMCS_GUEST_LDTR_ACCESS_RIGHTS 0x00004820 184 #define VMCS_GUEST_TR_ACCESS_RIGHTS 0x00004822 185 #define VMCS_GUEST_INTERRUPTIBILITY 0x00004824 186 #define VMCS_GUEST_ACTIVITY 0x00004826 187 #define VMCS_GUEST_SMBASE 0x00004828 188 #define VMCS_GUEST_IA32_SYSENTER_CS 0x0000482A 189 #define VMCS_PREEMPTION_TIMER_VALUE 0x0000482E 190 191 /* 32-bit host state fields */ 192 #define VMCS_HOST_IA32_SYSENTER_CS 0x00004C00 193 194 /* Natural Width control fields */ 195 #define VMCS_CR0_MASK 0x00006000 196 #define VMCS_CR4_MASK 0x00006002 197 #define VMCS_CR0_SHADOW 0x00006004 198 #define VMCS_CR4_SHADOW 0x00006006 199 #define VMCS_CR3_TARGET0 0x00006008 200 #define VMCS_CR3_TARGET1 0x0000600A 201 #define VMCS_CR3_TARGET2 0x0000600C 202 #define VMCS_CR3_TARGET3 0x0000600E 203 204 /* Natural Width read-only fields */ 205 #define VMCS_EXIT_QUALIFICATION 0x00006400 206 #define VMCS_IO_RCX 0x00006402 207 #define VMCS_IO_RSI 0x00006404 208 #define VMCS_IO_RDI 0x00006406 209 #define VMCS_IO_RIP 0x00006408 210 #define VMCS_GUEST_LINEAR_ADDRESS 0x0000640A 211 212 /* Natural Width guest-state fields */ 213 #define VMCS_GUEST_CR0 0x00006800 214 #define VMCS_GUEST_CR3 0x00006802 215 #define VMCS_GUEST_CR4 0x00006804 216 #define VMCS_GUEST_ES_BASE 0x00006806 217 #define VMCS_GUEST_CS_BASE 0x00006808 218 #define VMCS_GUEST_SS_BASE 0x0000680A 219 #define VMCS_GUEST_DS_BASE 0x0000680C 220 #define VMCS_GUEST_FS_BASE 0x0000680E 221 #define VMCS_GUEST_GS_BASE 0x00006810 222 #define VMCS_GUEST_LDTR_BASE 0x00006812 223 #define VMCS_GUEST_TR_BASE 0x00006814 224 #define VMCS_GUEST_GDTR_BASE 0x00006816 225 #define VMCS_GUEST_IDTR_BASE 0x00006818 226 #define VMCS_GUEST_DR7 0x0000681A 227 #define VMCS_GUEST_RSP 0x0000681C 228 #define VMCS_GUEST_RIP 0x0000681E 229 #define VMCS_GUEST_RFLAGS 0x00006820 230 #define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822 231 #define VMCS_GUEST_IA32_SYSENTER_ESP 0x00006824 232 #define VMCS_GUEST_IA32_SYSENTER_EIP 0x00006826 233 234 /* Natural Width host-state fields */ 235 #define VMCS_HOST_CR0 0x00006C00 236 #define VMCS_HOST_CR3 0x00006C02 237 #define VMCS_HOST_CR4 0x00006C04 238 #define VMCS_HOST_FS_BASE 0x00006C06 239 #define VMCS_HOST_GS_BASE 0x00006C08 240 #define VMCS_HOST_TR_BASE 0x00006C0A 241 #define VMCS_HOST_GDTR_BASE 0x00006C0C 242 #define VMCS_HOST_IDTR_BASE 0x00006C0E 243 #define VMCS_HOST_IA32_SYSENTER_ESP 0x00006C10 244 #define VMCS_HOST_IA32_SYSENTER_EIP 0x00006C12 245 #define VMCS_HOST_RSP 0x00006C14 246 #define VMCS_HOST_RIP 0x00006c16 247 248 /* 249 * VM instruction error numbers 250 */ 251 #define VMRESUME_WITH_NON_LAUNCHED_VMCS 5 252 253 /* 254 * VMCS exit reasons 255 */ 256 #define EXIT_REASON_EXCEPTION 0 257 #define EXIT_REASON_EXT_INTR 1 258 #define EXIT_REASON_TRIPLE_FAULT 2 259 #define EXIT_REASON_INIT 3 260 #define EXIT_REASON_SIPI 4 261 #define EXIT_REASON_IO_SMI 5 262 #define EXIT_REASON_SMI 6 263 #define EXIT_REASON_INTR_WINDOW 7 264 #define EXIT_REASON_NMI_WINDOW 8 265 #define EXIT_REASON_TASK_SWITCH 9 266 #define EXIT_REASON_CPUID 10 267 #define EXIT_REASON_GETSEC 11 268 #define EXIT_REASON_HLT 12 269 #define EXIT_REASON_INVD 13 270 #define EXIT_REASON_INVLPG 14 271 #define EXIT_REASON_RDPMC 15 272 #define EXIT_REASON_RDTSC 16 273 #define EXIT_REASON_RSM 17 274 #define EXIT_REASON_VMCALL 18 275 #define EXIT_REASON_VMCLEAR 19 276 #define EXIT_REASON_VMLAUNCH 20 277 #define EXIT_REASON_VMPTRLD 21 278 #define EXIT_REASON_VMPTRST 22 279 #define EXIT_REASON_VMREAD 23 280 #define EXIT_REASON_VMRESUME 24 281 #define EXIT_REASON_VMWRITE 25 282 #define EXIT_REASON_VMXOFF 26 283 #define EXIT_REASON_VMXON 27 284 #define EXIT_REASON_CR_ACCESS 28 285 #define EXIT_REASON_DR_ACCESS 29 286 #define EXIT_REASON_INOUT 30 287 #define EXIT_REASON_RDMSR 31 288 #define EXIT_REASON_WRMSR 32 289 #define EXIT_REASON_INVAL_VMCS 33 290 #define EXIT_REASON_INVAL_MSR 34 291 #define EXIT_REASON_MWAIT 36 292 #define EXIT_REASON_MTF 37 293 #define EXIT_REASON_MONITOR 39 294 #define EXIT_REASON_PAUSE 40 295 #define EXIT_REASON_MCE 41 296 #define EXIT_REASON_TPR 43 297 #define EXIT_REASON_APIC 44 298 #define EXIT_REASON_GDTR_IDTR 46 299 #define EXIT_REASON_LDTR_TR 47 300 #define EXIT_REASON_EPT_FAULT 48 301 #define EXIT_REASON_EPT_MISCONFIG 49 302 #define EXIT_REASON_INVEPT 50 303 #define EXIT_REASON_RDTSCP 51 304 #define EXIT_REASON_VMX_PREEMPT 52 305 #define EXIT_REASON_INVVPID 53 306 #define EXIT_REASON_WBINVD 54 307 #define EXIT_REASON_XSETBV 55 308 309 /* 310 * VMCS interrupt information fields 311 */ 312 #define VMCS_INTERRUPTION_INFO_VALID (1U << 31) 313 #define VMCS_INTERRUPTION_INFO_HW_INTR (0 << 8) 314 #define VMCS_INTERRUPTION_INFO_NMI (2 << 8) 315 316 /* 317 * VMCS Guest interruptibility field 318 */ 319 #define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0) 320 #define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1) 321 #define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2) 322 #define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3) 323 324 /* 325 * Exit qualification for EXIT_REASON_INVAL_VMCS 326 */ 327 #define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3 328 329 /* 330 * Exit qualification for EPT violation 331 */ 332 #define EPT_VIOLATION_DATA_READ (1UL << 0) 333 #define EPT_VIOLATION_DATA_WRITE (1UL << 1) 334 #define EPT_VIOLATION_INST_FETCH (1UL << 2) 335 #define EPT_VIOLATION_GLA_VALID (1UL << 7) 336 #define EPT_VIOLATION_XLAT_VALID (1UL << 8) 337 338 #endif 339