1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _VMCS_H_ 30 #define _VMCS_H_ 31 32 #ifdef _KERNEL 33 struct vmcs { 34 uint32_t identifier; 35 uint32_t abort_code; 36 char _impl_specific[PAGE_SIZE - sizeof(uint32_t) * 2]; 37 }; 38 CTASSERT(sizeof(struct vmcs) == PAGE_SIZE); 39 40 /* MSR save region is composed of an array of 'struct msr_entry' */ 41 struct msr_entry { 42 uint32_t index; 43 uint32_t reserved; 44 uint64_t val; 45 46 }; 47 48 int vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count); 49 int vmcs_init(struct vmcs *vmcs); 50 int vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *rv); 51 int vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val); 52 int vmcs_getdesc(struct vmcs *vmcs, int ident, 53 struct seg_desc *desc); 54 int vmcs_setdesc(struct vmcs *vmcs, int ident, 55 struct seg_desc *desc); 56 57 static __inline uint64_t 58 vmcs_read(uint32_t encoding) 59 { 60 int error; 61 uint64_t val; 62 63 error = vmread(encoding, &val); 64 KASSERT(error == 0, ("vmcs_read(%u) error %d", encoding, error)); 65 return (val); 66 } 67 68 static __inline void 69 vmcs_write(uint32_t encoding, uint64_t val) 70 { 71 int error; 72 73 error = vmwrite(encoding, val); 74 KASSERT(error == 0, ("vmcs_write(%u) error %d", encoding, error)); 75 } 76 77 #define vmexit_instruction_length() vmcs_read(VMCS_EXIT_INSTRUCTION_LENGTH) 78 #define vmcs_guest_rip() vmcs_read(VMCS_GUEST_RIP) 79 #define vmcs_instruction_error() vmcs_read(VMCS_INSTRUCTION_ERROR) 80 #define vmcs_exit_reason() (vmcs_read(VMCS_EXIT_REASON) & 0xffff) 81 #define vmcs_exit_qualification() vmcs_read(VMCS_EXIT_QUALIFICATION) 82 #define vmcs_guest_cr3() vmcs_read(VMCS_GUEST_CR3) 83 #define vmcs_gpa() vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS) 84 #define vmcs_gla() vmcs_read(VMCS_GUEST_LINEAR_ADDRESS) 85 #define vmcs_idt_vectoring_info() vmcs_read(VMCS_IDT_VECTORING_INFO) 86 #define vmcs_idt_vectoring_err() vmcs_read(VMCS_IDT_VECTORING_ERROR) 87 88 #endif /* _KERNEL */ 89 90 #define VMCS_INITIAL 0xffffffffffffffff 91 92 #define VMCS_IDENT(encoding) ((encoding) | 0x80000000) 93 /* 94 * VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B. 95 */ 96 #define VMCS_INVALID_ENCODING 0xffffffff 97 98 /* 16-bit control fields */ 99 #define VMCS_VPID 0x00000000 100 #define VMCS_PIR_VECTOR 0x00000002 101 102 /* 16-bit guest-state fields */ 103 #define VMCS_GUEST_ES_SELECTOR 0x00000800 104 #define VMCS_GUEST_CS_SELECTOR 0x00000802 105 #define VMCS_GUEST_SS_SELECTOR 0x00000804 106 #define VMCS_GUEST_DS_SELECTOR 0x00000806 107 #define VMCS_GUEST_FS_SELECTOR 0x00000808 108 #define VMCS_GUEST_GS_SELECTOR 0x0000080A 109 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C 110 #define VMCS_GUEST_TR_SELECTOR 0x0000080E 111 #define VMCS_GUEST_INTR_STATUS 0x00000810 112 113 /* 16-bit host-state fields */ 114 #define VMCS_HOST_ES_SELECTOR 0x00000C00 115 #define VMCS_HOST_CS_SELECTOR 0x00000C02 116 #define VMCS_HOST_SS_SELECTOR 0x00000C04 117 #define VMCS_HOST_DS_SELECTOR 0x00000C06 118 #define VMCS_HOST_FS_SELECTOR 0x00000C08 119 #define VMCS_HOST_GS_SELECTOR 0x00000C0A 120 #define VMCS_HOST_TR_SELECTOR 0x00000C0C 121 122 /* 64-bit control fields */ 123 #define VMCS_IO_BITMAP_A 0x00002000 124 #define VMCS_IO_BITMAP_B 0x00002002 125 #define VMCS_MSR_BITMAP 0x00002004 126 #define VMCS_EXIT_MSR_STORE 0x00002006 127 #define VMCS_EXIT_MSR_LOAD 0x00002008 128 #define VMCS_ENTRY_MSR_LOAD 0x0000200A 129 #define VMCS_EXECUTIVE_VMCS 0x0000200C 130 #define VMCS_TSC_OFFSET 0x00002010 131 #define VMCS_VIRTUAL_APIC 0x00002012 132 #define VMCS_APIC_ACCESS 0x00002014 133 #define VMCS_PIR_DESC 0x00002016 134 #define VMCS_EPTP 0x0000201A 135 #define VMCS_EOI_EXIT0 0x0000201C 136 #define VMCS_EOI_EXIT1 0x0000201E 137 #define VMCS_EOI_EXIT2 0x00002020 138 #define VMCS_EOI_EXIT3 0x00002022 139 140 /* 64-bit read-only fields */ 141 #define VMCS_GUEST_PHYSICAL_ADDRESS 0x00002400 142 143 /* 64-bit guest-state fields */ 144 #define VMCS_LINK_POINTER 0x00002800 145 #define VMCS_GUEST_IA32_DEBUGCTL 0x00002802 146 #define VMCS_GUEST_IA32_PAT 0x00002804 147 #define VMCS_GUEST_IA32_EFER 0x00002806 148 #define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808 149 #define VMCS_GUEST_PDPTE0 0x0000280A 150 #define VMCS_GUEST_PDPTE1 0x0000280C 151 #define VMCS_GUEST_PDPTE2 0x0000280E 152 #define VMCS_GUEST_PDPTE3 0x00002810 153 154 /* 64-bit host-state fields */ 155 #define VMCS_HOST_IA32_PAT 0x00002C00 156 #define VMCS_HOST_IA32_EFER 0x00002C02 157 #define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04 158 159 /* 32-bit control fields */ 160 #define VMCS_PIN_BASED_CTLS 0x00004000 161 #define VMCS_PRI_PROC_BASED_CTLS 0x00004002 162 #define VMCS_EXCEPTION_BITMAP 0x00004004 163 #define VMCS_PF_ERROR_MASK 0x00004006 164 #define VMCS_PF_ERROR_MATCH 0x00004008 165 #define VMCS_CR3_TARGET_COUNT 0x0000400A 166 #define VMCS_EXIT_CTLS 0x0000400C 167 #define VMCS_EXIT_MSR_STORE_COUNT 0x0000400E 168 #define VMCS_EXIT_MSR_LOAD_COUNT 0x00004010 169 #define VMCS_ENTRY_CTLS 0x00004012 170 #define VMCS_ENTRY_MSR_LOAD_COUNT 0x00004014 171 #define VMCS_ENTRY_INTR_INFO 0x00004016 172 #define VMCS_ENTRY_EXCEPTION_ERROR 0x00004018 173 #define VMCS_ENTRY_INST_LENGTH 0x0000401A 174 #define VMCS_TPR_THRESHOLD 0x0000401C 175 #define VMCS_SEC_PROC_BASED_CTLS 0x0000401E 176 #define VMCS_PLE_GAP 0x00004020 177 #define VMCS_PLE_WINDOW 0x00004022 178 179 /* 32-bit read-only data fields */ 180 #define VMCS_INSTRUCTION_ERROR 0x00004400 181 #define VMCS_EXIT_REASON 0x00004402 182 #define VMCS_EXIT_INTR_INFO 0x00004404 183 #define VMCS_EXIT_INTR_ERRCODE 0x00004406 184 #define VMCS_IDT_VECTORING_INFO 0x00004408 185 #define VMCS_IDT_VECTORING_ERROR 0x0000440A 186 #define VMCS_EXIT_INSTRUCTION_LENGTH 0x0000440C 187 #define VMCS_EXIT_INSTRUCTION_INFO 0x0000440E 188 189 /* 32-bit guest-state fields */ 190 #define VMCS_GUEST_ES_LIMIT 0x00004800 191 #define VMCS_GUEST_CS_LIMIT 0x00004802 192 #define VMCS_GUEST_SS_LIMIT 0x00004804 193 #define VMCS_GUEST_DS_LIMIT 0x00004806 194 #define VMCS_GUEST_FS_LIMIT 0x00004808 195 #define VMCS_GUEST_GS_LIMIT 0x0000480A 196 #define VMCS_GUEST_LDTR_LIMIT 0x0000480C 197 #define VMCS_GUEST_TR_LIMIT 0x0000480E 198 #define VMCS_GUEST_GDTR_LIMIT 0x00004810 199 #define VMCS_GUEST_IDTR_LIMIT 0x00004812 200 #define VMCS_GUEST_ES_ACCESS_RIGHTS 0x00004814 201 #define VMCS_GUEST_CS_ACCESS_RIGHTS 0x00004816 202 #define VMCS_GUEST_SS_ACCESS_RIGHTS 0x00004818 203 #define VMCS_GUEST_DS_ACCESS_RIGHTS 0x0000481A 204 #define VMCS_GUEST_FS_ACCESS_RIGHTS 0x0000481C 205 #define VMCS_GUEST_GS_ACCESS_RIGHTS 0x0000481E 206 #define VMCS_GUEST_LDTR_ACCESS_RIGHTS 0x00004820 207 #define VMCS_GUEST_TR_ACCESS_RIGHTS 0x00004822 208 #define VMCS_GUEST_INTERRUPTIBILITY 0x00004824 209 #define VMCS_GUEST_ACTIVITY 0x00004826 210 #define VMCS_GUEST_SMBASE 0x00004828 211 #define VMCS_GUEST_IA32_SYSENTER_CS 0x0000482A 212 #define VMCS_PREEMPTION_TIMER_VALUE 0x0000482E 213 214 /* 32-bit host state fields */ 215 #define VMCS_HOST_IA32_SYSENTER_CS 0x00004C00 216 217 /* Natural Width control fields */ 218 #define VMCS_CR0_MASK 0x00006000 219 #define VMCS_CR4_MASK 0x00006002 220 #define VMCS_CR0_SHADOW 0x00006004 221 #define VMCS_CR4_SHADOW 0x00006006 222 #define VMCS_CR3_TARGET0 0x00006008 223 #define VMCS_CR3_TARGET1 0x0000600A 224 #define VMCS_CR3_TARGET2 0x0000600C 225 #define VMCS_CR3_TARGET3 0x0000600E 226 227 /* Natural Width read-only fields */ 228 #define VMCS_EXIT_QUALIFICATION 0x00006400 229 #define VMCS_IO_RCX 0x00006402 230 #define VMCS_IO_RSI 0x00006404 231 #define VMCS_IO_RDI 0x00006406 232 #define VMCS_IO_RIP 0x00006408 233 #define VMCS_GUEST_LINEAR_ADDRESS 0x0000640A 234 235 /* Natural Width guest-state fields */ 236 #define VMCS_GUEST_CR0 0x00006800 237 #define VMCS_GUEST_CR3 0x00006802 238 #define VMCS_GUEST_CR4 0x00006804 239 #define VMCS_GUEST_ES_BASE 0x00006806 240 #define VMCS_GUEST_CS_BASE 0x00006808 241 #define VMCS_GUEST_SS_BASE 0x0000680A 242 #define VMCS_GUEST_DS_BASE 0x0000680C 243 #define VMCS_GUEST_FS_BASE 0x0000680E 244 #define VMCS_GUEST_GS_BASE 0x00006810 245 #define VMCS_GUEST_LDTR_BASE 0x00006812 246 #define VMCS_GUEST_TR_BASE 0x00006814 247 #define VMCS_GUEST_GDTR_BASE 0x00006816 248 #define VMCS_GUEST_IDTR_BASE 0x00006818 249 #define VMCS_GUEST_DR7 0x0000681A 250 #define VMCS_GUEST_RSP 0x0000681C 251 #define VMCS_GUEST_RIP 0x0000681E 252 #define VMCS_GUEST_RFLAGS 0x00006820 253 #define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822 254 #define VMCS_GUEST_IA32_SYSENTER_ESP 0x00006824 255 #define VMCS_GUEST_IA32_SYSENTER_EIP 0x00006826 256 257 /* Natural Width host-state fields */ 258 #define VMCS_HOST_CR0 0x00006C00 259 #define VMCS_HOST_CR3 0x00006C02 260 #define VMCS_HOST_CR4 0x00006C04 261 #define VMCS_HOST_FS_BASE 0x00006C06 262 #define VMCS_HOST_GS_BASE 0x00006C08 263 #define VMCS_HOST_TR_BASE 0x00006C0A 264 #define VMCS_HOST_GDTR_BASE 0x00006C0C 265 #define VMCS_HOST_IDTR_BASE 0x00006C0E 266 #define VMCS_HOST_IA32_SYSENTER_ESP 0x00006C10 267 #define VMCS_HOST_IA32_SYSENTER_EIP 0x00006C12 268 #define VMCS_HOST_RSP 0x00006C14 269 #define VMCS_HOST_RIP 0x00006c16 270 271 /* 272 * VM instruction error numbers 273 */ 274 #define VMRESUME_WITH_NON_LAUNCHED_VMCS 5 275 276 /* 277 * VMCS exit reasons 278 */ 279 #define EXIT_REASON_EXCEPTION 0 280 #define EXIT_REASON_EXT_INTR 1 281 #define EXIT_REASON_TRIPLE_FAULT 2 282 #define EXIT_REASON_INIT 3 283 #define EXIT_REASON_SIPI 4 284 #define EXIT_REASON_IO_SMI 5 285 #define EXIT_REASON_SMI 6 286 #define EXIT_REASON_INTR_WINDOW 7 287 #define EXIT_REASON_NMI_WINDOW 8 288 #define EXIT_REASON_TASK_SWITCH 9 289 #define EXIT_REASON_CPUID 10 290 #define EXIT_REASON_GETSEC 11 291 #define EXIT_REASON_HLT 12 292 #define EXIT_REASON_INVD 13 293 #define EXIT_REASON_INVLPG 14 294 #define EXIT_REASON_RDPMC 15 295 #define EXIT_REASON_RDTSC 16 296 #define EXIT_REASON_RSM 17 297 #define EXIT_REASON_VMCALL 18 298 #define EXIT_REASON_VMCLEAR 19 299 #define EXIT_REASON_VMLAUNCH 20 300 #define EXIT_REASON_VMPTRLD 21 301 #define EXIT_REASON_VMPTRST 22 302 #define EXIT_REASON_VMREAD 23 303 #define EXIT_REASON_VMRESUME 24 304 #define EXIT_REASON_VMWRITE 25 305 #define EXIT_REASON_VMXOFF 26 306 #define EXIT_REASON_VMXON 27 307 #define EXIT_REASON_CR_ACCESS 28 308 #define EXIT_REASON_DR_ACCESS 29 309 #define EXIT_REASON_INOUT 30 310 #define EXIT_REASON_RDMSR 31 311 #define EXIT_REASON_WRMSR 32 312 #define EXIT_REASON_INVAL_VMCS 33 313 #define EXIT_REASON_INVAL_MSR 34 314 #define EXIT_REASON_MWAIT 36 315 #define EXIT_REASON_MTF 37 316 #define EXIT_REASON_MONITOR 39 317 #define EXIT_REASON_PAUSE 40 318 #define EXIT_REASON_MCE 41 319 #define EXIT_REASON_TPR 43 320 #define EXIT_REASON_APIC_ACCESS 44 321 #define EXIT_REASON_GDTR_IDTR 46 322 #define EXIT_REASON_LDTR_TR 47 323 #define EXIT_REASON_EPT_FAULT 48 324 #define EXIT_REASON_EPT_MISCONFIG 49 325 #define EXIT_REASON_INVEPT 50 326 #define EXIT_REASON_RDTSCP 51 327 #define EXIT_REASON_VMX_PREEMPT 52 328 #define EXIT_REASON_INVVPID 53 329 #define EXIT_REASON_WBINVD 54 330 #define EXIT_REASON_XSETBV 55 331 #define EXIT_REASON_APIC_WRITE 56 332 333 /* 334 * NMI unblocking due to IRET. 335 * 336 * Applies to VM-exits due to hardware exception or EPT fault. 337 */ 338 #define EXIT_QUAL_NMIUDTI (1 << 12) 339 /* 340 * VMCS interrupt information fields 341 */ 342 #define VMCS_INTR_VALID (1U << 31) 343 #define VMCS_INTR_T_MASK 0x700 /* Interruption-info type */ 344 #define VMCS_INTR_T_HWINTR (0 << 8) 345 #define VMCS_INTR_T_NMI (2 << 8) 346 347 /* 348 * VMCS IDT-Vectoring information fields 349 */ 350 #define VMCS_IDT_VEC_VALID (1U << 31) 351 #define VMCS_IDT_VEC_ERRCODE_VALID (1 << 11) 352 353 /* 354 * VMCS Guest interruptibility field 355 */ 356 #define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0) 357 #define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1) 358 #define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2) 359 #define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3) 360 361 /* 362 * Exit qualification for EXIT_REASON_INVAL_VMCS 363 */ 364 #define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3 365 366 /* 367 * Exit qualification for EPT violation 368 */ 369 #define EPT_VIOLATION_DATA_READ (1UL << 0) 370 #define EPT_VIOLATION_DATA_WRITE (1UL << 1) 371 #define EPT_VIOLATION_INST_FETCH (1UL << 2) 372 #define EPT_VIOLATION_GPA_READABLE (1UL << 3) 373 #define EPT_VIOLATION_GPA_WRITEABLE (1UL << 4) 374 #define EPT_VIOLATION_GPA_EXECUTABLE (1UL << 5) 375 #define EPT_VIOLATION_GLA_VALID (1UL << 7) 376 #define EPT_VIOLATION_XLAT_VALID (1UL << 8) 377 378 /* 379 * Exit qualification for APIC-access VM exit 380 */ 381 #define APIC_ACCESS_OFFSET(qual) ((qual) & 0xFFF) 382 #define APIC_ACCESS_TYPE(qual) (((qual) >> 12) & 0xF) 383 384 /* 385 * Exit qualification for APIC-write VM exit 386 */ 387 #define APIC_WRITE_OFFSET(qual) ((qual) & 0xFFF) 388 389 #endif 390