xref: /freebsd/sys/amd64/vmm/intel/vmcs.c (revision 58a6aaf7ec41aa4ea4f3d8d752a8f03f4432bc25)
1366f6083SPeter Grehan /*-
2c49761ddSPedro F. Giffuni  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3c49761ddSPedro F. Giffuni  *
4366f6083SPeter Grehan  * Copyright (c) 2011 NetApp, Inc.
5366f6083SPeter Grehan  * All rights reserved.
6366f6083SPeter Grehan  *
7366f6083SPeter Grehan  * Redistribution and use in source and binary forms, with or without
8366f6083SPeter Grehan  * modification, are permitted provided that the following conditions
9366f6083SPeter Grehan  * are met:
10366f6083SPeter Grehan  * 1. Redistributions of source code must retain the above copyright
11366f6083SPeter Grehan  *    notice, this list of conditions and the following disclaimer.
12366f6083SPeter Grehan  * 2. Redistributions in binary form must reproduce the above copyright
13366f6083SPeter Grehan  *    notice, this list of conditions and the following disclaimer in the
14366f6083SPeter Grehan  *    documentation and/or other materials provided with the distribution.
15366f6083SPeter Grehan  *
16366f6083SPeter Grehan  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17366f6083SPeter Grehan  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18366f6083SPeter Grehan  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19366f6083SPeter Grehan  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20366f6083SPeter Grehan  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21366f6083SPeter Grehan  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22366f6083SPeter Grehan  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23366f6083SPeter Grehan  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24366f6083SPeter Grehan  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25366f6083SPeter Grehan  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26366f6083SPeter Grehan  * SUCH DAMAGE.
27366f6083SPeter Grehan  *
28366f6083SPeter Grehan  * $FreeBSD$
29366f6083SPeter Grehan  */
30366f6083SPeter Grehan 
31b3996dd4SJohn Baldwin #include "opt_ddb.h"
32b3996dd4SJohn Baldwin 
33366f6083SPeter Grehan #include <sys/cdefs.h>
34366f6083SPeter Grehan __FBSDID("$FreeBSD$");
35366f6083SPeter Grehan 
36366f6083SPeter Grehan #include <sys/param.h>
37*58a6aaf7STycho Nightingale #include <sys/sysctl.h>
38366f6083SPeter Grehan #include <sys/systm.h>
39366f6083SPeter Grehan #include <sys/pcpu.h>
40366f6083SPeter Grehan 
41366f6083SPeter Grehan #include <vm/vm.h>
42366f6083SPeter Grehan #include <vm/pmap.h>
43366f6083SPeter Grehan 
44366f6083SPeter Grehan #include <machine/segments.h>
45366f6083SPeter Grehan #include <machine/vmm.h>
46b01c2033SNeel Natu #include "vmm_host.h"
47366f6083SPeter Grehan #include "vmx_cpufunc.h"
483de83862SNeel Natu #include "vmcs.h"
49366f6083SPeter Grehan #include "ept.h"
50366f6083SPeter Grehan #include "vmx.h"
51366f6083SPeter Grehan 
52b3996dd4SJohn Baldwin #ifdef DDB
53b3996dd4SJohn Baldwin #include <ddb/ddb.h>
54b3996dd4SJohn Baldwin #endif
55b3996dd4SJohn Baldwin 
56*58a6aaf7STycho Nightingale SYSCTL_DECL(_hw_vmm_vmx);
57*58a6aaf7STycho Nightingale 
58*58a6aaf7STycho Nightingale static int no_flush_rsb;
59*58a6aaf7STycho Nightingale SYSCTL_INT(_hw_vmm_vmx, OID_AUTO, no_flush_rsb, CTLFLAG_RW,
60*58a6aaf7STycho Nightingale     &no_flush_rsb, 0, "Do not flush RSB upon vmexit");
61*58a6aaf7STycho Nightingale 
62366f6083SPeter Grehan static uint64_t
63366f6083SPeter Grehan vmcs_fix_regval(uint32_t encoding, uint64_t val)
64366f6083SPeter Grehan {
65366f6083SPeter Grehan 
66366f6083SPeter Grehan 	switch (encoding) {
67366f6083SPeter Grehan 	case VMCS_GUEST_CR0:
68366f6083SPeter Grehan 		val = vmx_fix_cr0(val);
69366f6083SPeter Grehan 		break;
70366f6083SPeter Grehan 	case VMCS_GUEST_CR4:
71366f6083SPeter Grehan 		val = vmx_fix_cr4(val);
72366f6083SPeter Grehan 		break;
73366f6083SPeter Grehan 	default:
74366f6083SPeter Grehan 		break;
75366f6083SPeter Grehan 	}
76366f6083SPeter Grehan 	return (val);
77366f6083SPeter Grehan }
78366f6083SPeter Grehan 
79366f6083SPeter Grehan static uint32_t
80366f6083SPeter Grehan vmcs_field_encoding(int ident)
81366f6083SPeter Grehan {
82366f6083SPeter Grehan 	switch (ident) {
83366f6083SPeter Grehan 	case VM_REG_GUEST_CR0:
84366f6083SPeter Grehan 		return (VMCS_GUEST_CR0);
85366f6083SPeter Grehan 	case VM_REG_GUEST_CR3:
86366f6083SPeter Grehan 		return (VMCS_GUEST_CR3);
87366f6083SPeter Grehan 	case VM_REG_GUEST_CR4:
88366f6083SPeter Grehan 		return (VMCS_GUEST_CR4);
89366f6083SPeter Grehan 	case VM_REG_GUEST_DR7:
90366f6083SPeter Grehan 		return (VMCS_GUEST_DR7);
91366f6083SPeter Grehan 	case VM_REG_GUEST_RSP:
92366f6083SPeter Grehan 		return (VMCS_GUEST_RSP);
93366f6083SPeter Grehan 	case VM_REG_GUEST_RIP:
94366f6083SPeter Grehan 		return (VMCS_GUEST_RIP);
95366f6083SPeter Grehan 	case VM_REG_GUEST_RFLAGS:
96366f6083SPeter Grehan 		return (VMCS_GUEST_RFLAGS);
97366f6083SPeter Grehan 	case VM_REG_GUEST_ES:
98366f6083SPeter Grehan 		return (VMCS_GUEST_ES_SELECTOR);
99366f6083SPeter Grehan 	case VM_REG_GUEST_CS:
100366f6083SPeter Grehan 		return (VMCS_GUEST_CS_SELECTOR);
101366f6083SPeter Grehan 	case VM_REG_GUEST_SS:
102366f6083SPeter Grehan 		return (VMCS_GUEST_SS_SELECTOR);
103366f6083SPeter Grehan 	case VM_REG_GUEST_DS:
104366f6083SPeter Grehan 		return (VMCS_GUEST_DS_SELECTOR);
105366f6083SPeter Grehan 	case VM_REG_GUEST_FS:
106366f6083SPeter Grehan 		return (VMCS_GUEST_FS_SELECTOR);
107366f6083SPeter Grehan 	case VM_REG_GUEST_GS:
108366f6083SPeter Grehan 		return (VMCS_GUEST_GS_SELECTOR);
109366f6083SPeter Grehan 	case VM_REG_GUEST_TR:
110366f6083SPeter Grehan 		return (VMCS_GUEST_TR_SELECTOR);
111366f6083SPeter Grehan 	case VM_REG_GUEST_LDTR:
112366f6083SPeter Grehan 		return (VMCS_GUEST_LDTR_SELECTOR);
113366f6083SPeter Grehan 	case VM_REG_GUEST_EFER:
114366f6083SPeter Grehan 		return (VMCS_GUEST_IA32_EFER);
1153d5444c8SNeel Natu 	case VM_REG_GUEST_PDPTE0:
1163d5444c8SNeel Natu 		return (VMCS_GUEST_PDPTE0);
1173d5444c8SNeel Natu 	case VM_REG_GUEST_PDPTE1:
1183d5444c8SNeel Natu 		return (VMCS_GUEST_PDPTE1);
1193d5444c8SNeel Natu 	case VM_REG_GUEST_PDPTE2:
1203d5444c8SNeel Natu 		return (VMCS_GUEST_PDPTE2);
1213d5444c8SNeel Natu 	case VM_REG_GUEST_PDPTE3:
1223d5444c8SNeel Natu 		return (VMCS_GUEST_PDPTE3);
123366f6083SPeter Grehan 	default:
124366f6083SPeter Grehan 		return (-1);
125366f6083SPeter Grehan 	}
126366f6083SPeter Grehan 
127366f6083SPeter Grehan }
128366f6083SPeter Grehan 
129366f6083SPeter Grehan static int
130366f6083SPeter Grehan vmcs_seg_desc_encoding(int seg, uint32_t *base, uint32_t *lim, uint32_t *acc)
131366f6083SPeter Grehan {
132366f6083SPeter Grehan 
133366f6083SPeter Grehan 	switch (seg) {
134366f6083SPeter Grehan 	case VM_REG_GUEST_ES:
135366f6083SPeter Grehan 		*base = VMCS_GUEST_ES_BASE;
136366f6083SPeter Grehan 		*lim = VMCS_GUEST_ES_LIMIT;
137366f6083SPeter Grehan 		*acc = VMCS_GUEST_ES_ACCESS_RIGHTS;
138366f6083SPeter Grehan 		break;
139366f6083SPeter Grehan 	case VM_REG_GUEST_CS:
140366f6083SPeter Grehan 		*base = VMCS_GUEST_CS_BASE;
141366f6083SPeter Grehan 		*lim = VMCS_GUEST_CS_LIMIT;
142366f6083SPeter Grehan 		*acc = VMCS_GUEST_CS_ACCESS_RIGHTS;
143366f6083SPeter Grehan 		break;
144366f6083SPeter Grehan 	case VM_REG_GUEST_SS:
145366f6083SPeter Grehan 		*base = VMCS_GUEST_SS_BASE;
146366f6083SPeter Grehan 		*lim = VMCS_GUEST_SS_LIMIT;
147366f6083SPeter Grehan 		*acc = VMCS_GUEST_SS_ACCESS_RIGHTS;
148366f6083SPeter Grehan 		break;
149366f6083SPeter Grehan 	case VM_REG_GUEST_DS:
150366f6083SPeter Grehan 		*base = VMCS_GUEST_DS_BASE;
151366f6083SPeter Grehan 		*lim = VMCS_GUEST_DS_LIMIT;
152366f6083SPeter Grehan 		*acc = VMCS_GUEST_DS_ACCESS_RIGHTS;
153366f6083SPeter Grehan 		break;
154366f6083SPeter Grehan 	case VM_REG_GUEST_FS:
155366f6083SPeter Grehan 		*base = VMCS_GUEST_FS_BASE;
156366f6083SPeter Grehan 		*lim = VMCS_GUEST_FS_LIMIT;
157366f6083SPeter Grehan 		*acc = VMCS_GUEST_FS_ACCESS_RIGHTS;
158366f6083SPeter Grehan 		break;
159366f6083SPeter Grehan 	case VM_REG_GUEST_GS:
160366f6083SPeter Grehan 		*base = VMCS_GUEST_GS_BASE;
161366f6083SPeter Grehan 		*lim = VMCS_GUEST_GS_LIMIT;
162366f6083SPeter Grehan 		*acc = VMCS_GUEST_GS_ACCESS_RIGHTS;
163366f6083SPeter Grehan 		break;
164366f6083SPeter Grehan 	case VM_REG_GUEST_TR:
165366f6083SPeter Grehan 		*base = VMCS_GUEST_TR_BASE;
166366f6083SPeter Grehan 		*lim = VMCS_GUEST_TR_LIMIT;
167366f6083SPeter Grehan 		*acc = VMCS_GUEST_TR_ACCESS_RIGHTS;
168366f6083SPeter Grehan 		break;
169366f6083SPeter Grehan 	case VM_REG_GUEST_LDTR:
170366f6083SPeter Grehan 		*base = VMCS_GUEST_LDTR_BASE;
171366f6083SPeter Grehan 		*lim = VMCS_GUEST_LDTR_LIMIT;
172366f6083SPeter Grehan 		*acc = VMCS_GUEST_LDTR_ACCESS_RIGHTS;
173366f6083SPeter Grehan 		break;
174366f6083SPeter Grehan 	case VM_REG_GUEST_IDTR:
175366f6083SPeter Grehan 		*base = VMCS_GUEST_IDTR_BASE;
176366f6083SPeter Grehan 		*lim = VMCS_GUEST_IDTR_LIMIT;
177366f6083SPeter Grehan 		*acc = VMCS_INVALID_ENCODING;
178366f6083SPeter Grehan 		break;
179366f6083SPeter Grehan 	case VM_REG_GUEST_GDTR:
180366f6083SPeter Grehan 		*base = VMCS_GUEST_GDTR_BASE;
181366f6083SPeter Grehan 		*lim = VMCS_GUEST_GDTR_LIMIT;
182366f6083SPeter Grehan 		*acc = VMCS_INVALID_ENCODING;
183366f6083SPeter Grehan 		break;
184366f6083SPeter Grehan 	default:
185366f6083SPeter Grehan 		return (EINVAL);
186366f6083SPeter Grehan 	}
187366f6083SPeter Grehan 
188366f6083SPeter Grehan 	return (0);
189366f6083SPeter Grehan }
190366f6083SPeter Grehan 
191366f6083SPeter Grehan int
192d3c11f40SPeter Grehan vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *retval)
193366f6083SPeter Grehan {
194366f6083SPeter Grehan 	int error;
195366f6083SPeter Grehan 	uint32_t encoding;
196366f6083SPeter Grehan 
197366f6083SPeter Grehan 	/*
198366f6083SPeter Grehan 	 * If we need to get at vmx-specific state in the VMCS we can bypass
199366f6083SPeter Grehan 	 * the translation of 'ident' to 'encoding' by simply setting the
200366f6083SPeter Grehan 	 * sign bit. As it so happens the upper 16 bits are reserved (i.e
201366f6083SPeter Grehan 	 * set to 0) in the encodings for the VMCS so we are free to use the
202366f6083SPeter Grehan 	 * sign bit.
203366f6083SPeter Grehan 	 */
204366f6083SPeter Grehan 	if (ident < 0)
205366f6083SPeter Grehan 		encoding = ident & 0x7fffffff;
206366f6083SPeter Grehan 	else
207366f6083SPeter Grehan 		encoding = vmcs_field_encoding(ident);
208366f6083SPeter Grehan 
209366f6083SPeter Grehan 	if (encoding == (uint32_t)-1)
210366f6083SPeter Grehan 		return (EINVAL);
211366f6083SPeter Grehan 
212d3c11f40SPeter Grehan 	if (!running)
213366f6083SPeter Grehan 		VMPTRLD(vmcs);
214d3c11f40SPeter Grehan 
215366f6083SPeter Grehan 	error = vmread(encoding, retval);
216d3c11f40SPeter Grehan 
217d3c11f40SPeter Grehan 	if (!running)
218366f6083SPeter Grehan 		VMCLEAR(vmcs);
219d3c11f40SPeter Grehan 
220366f6083SPeter Grehan 	return (error);
221366f6083SPeter Grehan }
222366f6083SPeter Grehan 
223366f6083SPeter Grehan int
224d3c11f40SPeter Grehan vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val)
225366f6083SPeter Grehan {
226366f6083SPeter Grehan 	int error;
227366f6083SPeter Grehan 	uint32_t encoding;
228366f6083SPeter Grehan 
229366f6083SPeter Grehan 	if (ident < 0)
230366f6083SPeter Grehan 		encoding = ident & 0x7fffffff;
231366f6083SPeter Grehan 	else
232366f6083SPeter Grehan 		encoding = vmcs_field_encoding(ident);
233366f6083SPeter Grehan 
234366f6083SPeter Grehan 	if (encoding == (uint32_t)-1)
235366f6083SPeter Grehan 		return (EINVAL);
236366f6083SPeter Grehan 
237366f6083SPeter Grehan 	val = vmcs_fix_regval(encoding, val);
238366f6083SPeter Grehan 
239d3c11f40SPeter Grehan 	if (!running)
240366f6083SPeter Grehan 		VMPTRLD(vmcs);
241d3c11f40SPeter Grehan 
242366f6083SPeter Grehan 	error = vmwrite(encoding, val);
243d3c11f40SPeter Grehan 
244d3c11f40SPeter Grehan 	if (!running)
245366f6083SPeter Grehan 		VMCLEAR(vmcs);
246d3c11f40SPeter Grehan 
247366f6083SPeter Grehan 	return (error);
248366f6083SPeter Grehan }
249366f6083SPeter Grehan 
250366f6083SPeter Grehan int
251ba6f5e23SNeel Natu vmcs_setdesc(struct vmcs *vmcs, int running, int seg, struct seg_desc *desc)
252366f6083SPeter Grehan {
253366f6083SPeter Grehan 	int error;
254366f6083SPeter Grehan 	uint32_t base, limit, access;
255366f6083SPeter Grehan 
256366f6083SPeter Grehan 	error = vmcs_seg_desc_encoding(seg, &base, &limit, &access);
257366f6083SPeter Grehan 	if (error != 0)
258366f6083SPeter Grehan 		panic("vmcs_setdesc: invalid segment register %d", seg);
259366f6083SPeter Grehan 
260ba6f5e23SNeel Natu 	if (!running)
261366f6083SPeter Grehan 		VMPTRLD(vmcs);
262366f6083SPeter Grehan 	if ((error = vmwrite(base, desc->base)) != 0)
263366f6083SPeter Grehan 		goto done;
264366f6083SPeter Grehan 
265366f6083SPeter Grehan 	if ((error = vmwrite(limit, desc->limit)) != 0)
266366f6083SPeter Grehan 		goto done;
267366f6083SPeter Grehan 
268366f6083SPeter Grehan 	if (access != VMCS_INVALID_ENCODING) {
269366f6083SPeter Grehan 		if ((error = vmwrite(access, desc->access)) != 0)
270366f6083SPeter Grehan 			goto done;
271366f6083SPeter Grehan 	}
272366f6083SPeter Grehan done:
273ba6f5e23SNeel Natu 	if (!running)
274366f6083SPeter Grehan 		VMCLEAR(vmcs);
275366f6083SPeter Grehan 	return (error);
276366f6083SPeter Grehan }
277366f6083SPeter Grehan 
278366f6083SPeter Grehan int
279ba6f5e23SNeel Natu vmcs_getdesc(struct vmcs *vmcs, int running, int seg, struct seg_desc *desc)
280366f6083SPeter Grehan {
281366f6083SPeter Grehan 	int error;
282366f6083SPeter Grehan 	uint32_t base, limit, access;
283366f6083SPeter Grehan 	uint64_t u64;
284366f6083SPeter Grehan 
285366f6083SPeter Grehan 	error = vmcs_seg_desc_encoding(seg, &base, &limit, &access);
286366f6083SPeter Grehan 	if (error != 0)
287366f6083SPeter Grehan 		panic("vmcs_getdesc: invalid segment register %d", seg);
288366f6083SPeter Grehan 
289ba6f5e23SNeel Natu 	if (!running)
290366f6083SPeter Grehan 		VMPTRLD(vmcs);
291366f6083SPeter Grehan 	if ((error = vmread(base, &u64)) != 0)
292366f6083SPeter Grehan 		goto done;
293366f6083SPeter Grehan 	desc->base = u64;
294366f6083SPeter Grehan 
295366f6083SPeter Grehan 	if ((error = vmread(limit, &u64)) != 0)
296366f6083SPeter Grehan 		goto done;
297366f6083SPeter Grehan 	desc->limit = u64;
298366f6083SPeter Grehan 
299366f6083SPeter Grehan 	if (access != VMCS_INVALID_ENCODING) {
300366f6083SPeter Grehan 		if ((error = vmread(access, &u64)) != 0)
301366f6083SPeter Grehan 			goto done;
302366f6083SPeter Grehan 		desc->access = u64;
303366f6083SPeter Grehan 	}
304366f6083SPeter Grehan done:
305ba6f5e23SNeel Natu 	if (!running)
306366f6083SPeter Grehan 		VMCLEAR(vmcs);
307366f6083SPeter Grehan 	return (error);
308366f6083SPeter Grehan }
309366f6083SPeter Grehan 
310366f6083SPeter Grehan int
311366f6083SPeter Grehan vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count)
312366f6083SPeter Grehan {
313366f6083SPeter Grehan 	int error;
314366f6083SPeter Grehan 
315366f6083SPeter Grehan 	VMPTRLD(vmcs);
316366f6083SPeter Grehan 
317366f6083SPeter Grehan 	/*
318366f6083SPeter Grehan 	 * Guest MSRs are saved in the VM-exit MSR-store area.
319366f6083SPeter Grehan 	 * Guest MSRs are loaded from the VM-entry MSR-load area.
320366f6083SPeter Grehan 	 * Both areas point to the same location in memory.
321366f6083SPeter Grehan 	 */
322366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_EXIT_MSR_STORE, g_area)) != 0)
323366f6083SPeter Grehan 		goto done;
324366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_EXIT_MSR_STORE_COUNT, g_count)) != 0)
325366f6083SPeter Grehan 		goto done;
326366f6083SPeter Grehan 
327366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD, g_area)) != 0)
328366f6083SPeter Grehan 		goto done;
329366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD_COUNT, g_count)) != 0)
330366f6083SPeter Grehan 		goto done;
331366f6083SPeter Grehan 
332366f6083SPeter Grehan 	error = 0;
333366f6083SPeter Grehan done:
334366f6083SPeter Grehan 	VMCLEAR(vmcs);
335366f6083SPeter Grehan 	return (error);
336366f6083SPeter Grehan }
337366f6083SPeter Grehan 
338366f6083SPeter Grehan int
339c847a506SNeel Natu vmcs_init(struct vmcs *vmcs)
340366f6083SPeter Grehan {
341366f6083SPeter Grehan 	int error, codesel, datasel, tsssel;
342366f6083SPeter Grehan 	u_long cr0, cr4, efer;
343318224bbSNeel Natu 	uint64_t pat, fsbase, idtrbase;
344366f6083SPeter Grehan 
345b01c2033SNeel Natu 	codesel = vmm_get_host_codesel();
346b01c2033SNeel Natu 	datasel = vmm_get_host_datasel();
347b01c2033SNeel Natu 	tsssel = vmm_get_host_tsssel();
348366f6083SPeter Grehan 
349366f6083SPeter Grehan 	/*
350366f6083SPeter Grehan 	 * Make sure we have a "current" VMCS to work with.
351366f6083SPeter Grehan 	 */
352366f6083SPeter Grehan 	VMPTRLD(vmcs);
353366f6083SPeter Grehan 
354366f6083SPeter Grehan 	/* Host state */
355366f6083SPeter Grehan 
356366f6083SPeter Grehan 	/* Initialize host IA32_PAT MSR */
357b01c2033SNeel Natu 	pat = vmm_get_host_pat();
358366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_IA32_PAT, pat)) != 0)
359366f6083SPeter Grehan 		goto done;
360366f6083SPeter Grehan 
361366f6083SPeter Grehan 	/* Load the IA32_EFER MSR */
362b01c2033SNeel Natu 	efer = vmm_get_host_efer();
363366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_IA32_EFER, efer)) != 0)
364366f6083SPeter Grehan 		goto done;
365366f6083SPeter Grehan 
366366f6083SPeter Grehan 	/* Load the control registers */
367bd8572e0SNeel Natu 
368b01c2033SNeel Natu 	cr0 = vmm_get_host_cr0();
369366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0)
370366f6083SPeter Grehan 		goto done;
371366f6083SPeter Grehan 
372b01c2033SNeel Natu 	cr4 = vmm_get_host_cr4() | CR4_VMXE;
373366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0)
374366f6083SPeter Grehan 		goto done;
375366f6083SPeter Grehan 
376366f6083SPeter Grehan 	/* Load the segment selectors */
377366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_ES_SELECTOR, datasel)) != 0)
378366f6083SPeter Grehan 		goto done;
379366f6083SPeter Grehan 
380366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_CS_SELECTOR, codesel)) != 0)
381366f6083SPeter Grehan 		goto done;
382366f6083SPeter Grehan 
383366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_SS_SELECTOR, datasel)) != 0)
384366f6083SPeter Grehan 		goto done;
385366f6083SPeter Grehan 
386366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_DS_SELECTOR, datasel)) != 0)
387366f6083SPeter Grehan 		goto done;
388366f6083SPeter Grehan 
389366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_FS_SELECTOR, datasel)) != 0)
390366f6083SPeter Grehan 		goto done;
391366f6083SPeter Grehan 
392366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_GS_SELECTOR, datasel)) != 0)
393366f6083SPeter Grehan 		goto done;
394366f6083SPeter Grehan 
395366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_HOST_TR_SELECTOR, tsssel)) != 0)
396366f6083SPeter Grehan 		goto done;
397366f6083SPeter Grehan 
398366f6083SPeter Grehan 	/*
399366f6083SPeter Grehan 	 * Load the Base-Address for %fs and idtr.
400366f6083SPeter Grehan 	 *
401366f6083SPeter Grehan 	 * Note that we exclude %gs, tss and gdtr here because their base
402366f6083SPeter Grehan 	 * address is pcpu specific.
403366f6083SPeter Grehan 	 */
404b01c2033SNeel Natu 	fsbase = vmm_get_host_fsbase();
405b01c2033SNeel Natu 	if ((error = vmwrite(VMCS_HOST_FS_BASE, fsbase)) != 0)
406366f6083SPeter Grehan 		goto done;
407366f6083SPeter Grehan 
408b01c2033SNeel Natu 	idtrbase = vmm_get_host_idtrbase();
409b01c2033SNeel Natu 	if ((error = vmwrite(VMCS_HOST_IDTR_BASE, idtrbase)) != 0)
410366f6083SPeter Grehan 		goto done;
411366f6083SPeter Grehan 
412366f6083SPeter Grehan 	/* instruction pointer */
413*58a6aaf7STycho Nightingale 	if (no_flush_rsb) {
414*58a6aaf7STycho Nightingale 		if ((error = vmwrite(VMCS_HOST_RIP,
415*58a6aaf7STycho Nightingale 		    (u_long)vmx_exit_guest)) != 0)
416366f6083SPeter Grehan 			goto done;
417*58a6aaf7STycho Nightingale 	} else {
418*58a6aaf7STycho Nightingale 		if ((error = vmwrite(VMCS_HOST_RIP,
419*58a6aaf7STycho Nightingale 		    (u_long)vmx_exit_guest_flush_rsb)) != 0)
420*58a6aaf7STycho Nightingale 			goto done;
421*58a6aaf7STycho Nightingale 	}
422366f6083SPeter Grehan 
423366f6083SPeter Grehan 	/* link pointer */
424366f6083SPeter Grehan 	if ((error = vmwrite(VMCS_LINK_POINTER, ~0)) != 0)
425366f6083SPeter Grehan 		goto done;
426366f6083SPeter Grehan done:
427366f6083SPeter Grehan 	VMCLEAR(vmcs);
428366f6083SPeter Grehan 	return (error);
429366f6083SPeter Grehan }
430366f6083SPeter Grehan 
431b3996dd4SJohn Baldwin #ifdef DDB
432b3996dd4SJohn Baldwin extern int vmxon_enabled[];
433b3996dd4SJohn Baldwin 
434b3996dd4SJohn Baldwin DB_SHOW_COMMAND(vmcs, db_show_vmcs)
435b3996dd4SJohn Baldwin {
436b3996dd4SJohn Baldwin 	uint64_t cur_vmcs, val;
437b3996dd4SJohn Baldwin 	uint32_t exit;
438b3996dd4SJohn Baldwin 
439b3996dd4SJohn Baldwin 	if (!vmxon_enabled[curcpu]) {
440b3996dd4SJohn Baldwin 		db_printf("VMX not enabled\n");
441b3996dd4SJohn Baldwin 		return;
442b3996dd4SJohn Baldwin 	}
443b3996dd4SJohn Baldwin 
444b3996dd4SJohn Baldwin 	if (have_addr) {
445b3996dd4SJohn Baldwin 		db_printf("Only current VMCS supported\n");
446b3996dd4SJohn Baldwin 		return;
447b3996dd4SJohn Baldwin 	}
448b3996dd4SJohn Baldwin 
449b3996dd4SJohn Baldwin 	vmptrst(&cur_vmcs);
450b3996dd4SJohn Baldwin 	if (cur_vmcs == VMCS_INITIAL) {
451b3996dd4SJohn Baldwin 		db_printf("No current VM context\n");
452b3996dd4SJohn Baldwin 		return;
453b3996dd4SJohn Baldwin 	}
454b3996dd4SJohn Baldwin 	db_printf("VMCS: %jx\n", cur_vmcs);
455b3996dd4SJohn Baldwin 	db_printf("VPID: %lu\n", vmcs_read(VMCS_VPID));
456b3996dd4SJohn Baldwin 	db_printf("Activity: ");
457b3996dd4SJohn Baldwin 	val = vmcs_read(VMCS_GUEST_ACTIVITY);
458b3996dd4SJohn Baldwin 	switch (val) {
459b3996dd4SJohn Baldwin 	case 0:
460b3996dd4SJohn Baldwin 		db_printf("Active");
461b3996dd4SJohn Baldwin 		break;
462b3996dd4SJohn Baldwin 	case 1:
463b3996dd4SJohn Baldwin 		db_printf("HLT");
464b3996dd4SJohn Baldwin 		break;
465b3996dd4SJohn Baldwin 	case 2:
466b3996dd4SJohn Baldwin 		db_printf("Shutdown");
467b3996dd4SJohn Baldwin 		break;
468b3996dd4SJohn Baldwin 	case 3:
469b3996dd4SJohn Baldwin 		db_printf("Wait for SIPI");
470b3996dd4SJohn Baldwin 		break;
471b3996dd4SJohn Baldwin 	default:
472b3996dd4SJohn Baldwin 		db_printf("Unknown: %#lx", val);
473b3996dd4SJohn Baldwin 	}
474b3996dd4SJohn Baldwin 	db_printf("\n");
475b3996dd4SJohn Baldwin 	exit = vmcs_read(VMCS_EXIT_REASON);
476b3996dd4SJohn Baldwin 	if (exit & 0x80000000)
477b3996dd4SJohn Baldwin 		db_printf("Entry Failure Reason: %u\n", exit & 0xffff);
478b3996dd4SJohn Baldwin 	else
479b3996dd4SJohn Baldwin 		db_printf("Exit Reason: %u\n", exit & 0xffff);
480b3996dd4SJohn Baldwin 	db_printf("Qualification: %#lx\n", vmcs_exit_qualification());
481b3996dd4SJohn Baldwin 	db_printf("Guest Linear Address: %#lx\n",
482b3996dd4SJohn Baldwin 	    vmcs_read(VMCS_GUEST_LINEAR_ADDRESS));
483b3996dd4SJohn Baldwin 	switch (exit & 0x8000ffff) {
484b3996dd4SJohn Baldwin 	case EXIT_REASON_EXCEPTION:
485b3996dd4SJohn Baldwin 	case EXIT_REASON_EXT_INTR:
486f7d47425SNeel Natu 		val = vmcs_read(VMCS_EXIT_INTR_INFO);
487b3996dd4SJohn Baldwin 		db_printf("Interrupt Type: ");
488b3996dd4SJohn Baldwin 		switch (val >> 8 & 0x7) {
489b3996dd4SJohn Baldwin 		case 0:
490b3996dd4SJohn Baldwin 			db_printf("external");
491b3996dd4SJohn Baldwin 			break;
492b3996dd4SJohn Baldwin 		case 2:
493b3996dd4SJohn Baldwin 			db_printf("NMI");
494b3996dd4SJohn Baldwin 			break;
495b3996dd4SJohn Baldwin 		case 3:
496b3996dd4SJohn Baldwin 			db_printf("HW exception");
497b3996dd4SJohn Baldwin 			break;
498b3996dd4SJohn Baldwin 		case 4:
499b3996dd4SJohn Baldwin 			db_printf("SW exception");
500b3996dd4SJohn Baldwin 			break;
501b3996dd4SJohn Baldwin 		default:
502b3996dd4SJohn Baldwin 			db_printf("?? %lu", val >> 8 & 0x7);
503b3996dd4SJohn Baldwin 			break;
504b3996dd4SJohn Baldwin 		}
505b3996dd4SJohn Baldwin 		db_printf("  Vector: %lu", val & 0xff);
506b3996dd4SJohn Baldwin 		if (val & 0x800)
507b3996dd4SJohn Baldwin 			db_printf("  Error Code: %lx",
508f7d47425SNeel Natu 			    vmcs_read(VMCS_EXIT_INTR_ERRCODE));
509b3996dd4SJohn Baldwin 		db_printf("\n");
510b3996dd4SJohn Baldwin 		break;
511b3996dd4SJohn Baldwin 	case EXIT_REASON_EPT_FAULT:
512b3996dd4SJohn Baldwin 	case EXIT_REASON_EPT_MISCONFIG:
513b3996dd4SJohn Baldwin 		db_printf("Guest Physical Address: %#lx\n",
514b3996dd4SJohn Baldwin 		    vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS));
515b3996dd4SJohn Baldwin 		break;
516b3996dd4SJohn Baldwin 	}
517b3996dd4SJohn Baldwin 	db_printf("VM-instruction error: %#lx\n", vmcs_instruction_error());
518b3996dd4SJohn Baldwin }
519b3996dd4SJohn Baldwin #endif
520