1366f6083SPeter Grehan /*- 2366f6083SPeter Grehan * Copyright (c) 2011 NetApp, Inc. 3366f6083SPeter Grehan * All rights reserved. 4366f6083SPeter Grehan * 5366f6083SPeter Grehan * Redistribution and use in source and binary forms, with or without 6366f6083SPeter Grehan * modification, are permitted provided that the following conditions 7366f6083SPeter Grehan * are met: 8366f6083SPeter Grehan * 1. Redistributions of source code must retain the above copyright 9366f6083SPeter Grehan * notice, this list of conditions and the following disclaimer. 10366f6083SPeter Grehan * 2. Redistributions in binary form must reproduce the above copyright 11366f6083SPeter Grehan * notice, this list of conditions and the following disclaimer in the 12366f6083SPeter Grehan * documentation and/or other materials provided with the distribution. 13366f6083SPeter Grehan * 14366f6083SPeter Grehan * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15366f6083SPeter Grehan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16366f6083SPeter Grehan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17366f6083SPeter Grehan * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18366f6083SPeter Grehan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19366f6083SPeter Grehan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20366f6083SPeter Grehan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21366f6083SPeter Grehan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22366f6083SPeter Grehan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23366f6083SPeter Grehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24366f6083SPeter Grehan * SUCH DAMAGE. 25366f6083SPeter Grehan * 26366f6083SPeter Grehan * $FreeBSD$ 27366f6083SPeter Grehan */ 28366f6083SPeter Grehan 29b3996dd4SJohn Baldwin #include "opt_ddb.h" 30b3996dd4SJohn Baldwin 31366f6083SPeter Grehan #include <sys/cdefs.h> 32366f6083SPeter Grehan __FBSDID("$FreeBSD$"); 33366f6083SPeter Grehan 34366f6083SPeter Grehan #include <sys/param.h> 35366f6083SPeter Grehan #include <sys/systm.h> 36366f6083SPeter Grehan #include <sys/pcpu.h> 37366f6083SPeter Grehan 38366f6083SPeter Grehan #include <vm/vm.h> 39366f6083SPeter Grehan #include <vm/pmap.h> 40366f6083SPeter Grehan 41366f6083SPeter Grehan #include <machine/segments.h> 42366f6083SPeter Grehan #include <machine/vmm.h> 43b01c2033SNeel Natu #include "vmm_host.h" 44366f6083SPeter Grehan #include "vmx_cpufunc.h" 45*3de83862SNeel Natu #include "vmcs.h" 46366f6083SPeter Grehan #include "ept.h" 47366f6083SPeter Grehan #include "vmx.h" 48366f6083SPeter Grehan 49b3996dd4SJohn Baldwin #ifdef DDB 50b3996dd4SJohn Baldwin #include <ddb/ddb.h> 51b3996dd4SJohn Baldwin #endif 52b3996dd4SJohn Baldwin 53366f6083SPeter Grehan static uint64_t 54366f6083SPeter Grehan vmcs_fix_regval(uint32_t encoding, uint64_t val) 55366f6083SPeter Grehan { 56366f6083SPeter Grehan 57366f6083SPeter Grehan switch (encoding) { 58366f6083SPeter Grehan case VMCS_GUEST_CR0: 59366f6083SPeter Grehan val = vmx_fix_cr0(val); 60366f6083SPeter Grehan break; 61366f6083SPeter Grehan case VMCS_GUEST_CR4: 62366f6083SPeter Grehan val = vmx_fix_cr4(val); 63366f6083SPeter Grehan break; 64366f6083SPeter Grehan default: 65366f6083SPeter Grehan break; 66366f6083SPeter Grehan } 67366f6083SPeter Grehan return (val); 68366f6083SPeter Grehan } 69366f6083SPeter Grehan 70366f6083SPeter Grehan static uint32_t 71366f6083SPeter Grehan vmcs_field_encoding(int ident) 72366f6083SPeter Grehan { 73366f6083SPeter Grehan switch (ident) { 74366f6083SPeter Grehan case VM_REG_GUEST_CR0: 75366f6083SPeter Grehan return (VMCS_GUEST_CR0); 76366f6083SPeter Grehan case VM_REG_GUEST_CR3: 77366f6083SPeter Grehan return (VMCS_GUEST_CR3); 78366f6083SPeter Grehan case VM_REG_GUEST_CR4: 79366f6083SPeter Grehan return (VMCS_GUEST_CR4); 80366f6083SPeter Grehan case VM_REG_GUEST_DR7: 81366f6083SPeter Grehan return (VMCS_GUEST_DR7); 82366f6083SPeter Grehan case VM_REG_GUEST_RSP: 83366f6083SPeter Grehan return (VMCS_GUEST_RSP); 84366f6083SPeter Grehan case VM_REG_GUEST_RIP: 85366f6083SPeter Grehan return (VMCS_GUEST_RIP); 86366f6083SPeter Grehan case VM_REG_GUEST_RFLAGS: 87366f6083SPeter Grehan return (VMCS_GUEST_RFLAGS); 88366f6083SPeter Grehan case VM_REG_GUEST_ES: 89366f6083SPeter Grehan return (VMCS_GUEST_ES_SELECTOR); 90366f6083SPeter Grehan case VM_REG_GUEST_CS: 91366f6083SPeter Grehan return (VMCS_GUEST_CS_SELECTOR); 92366f6083SPeter Grehan case VM_REG_GUEST_SS: 93366f6083SPeter Grehan return (VMCS_GUEST_SS_SELECTOR); 94366f6083SPeter Grehan case VM_REG_GUEST_DS: 95366f6083SPeter Grehan return (VMCS_GUEST_DS_SELECTOR); 96366f6083SPeter Grehan case VM_REG_GUEST_FS: 97366f6083SPeter Grehan return (VMCS_GUEST_FS_SELECTOR); 98366f6083SPeter Grehan case VM_REG_GUEST_GS: 99366f6083SPeter Grehan return (VMCS_GUEST_GS_SELECTOR); 100366f6083SPeter Grehan case VM_REG_GUEST_TR: 101366f6083SPeter Grehan return (VMCS_GUEST_TR_SELECTOR); 102366f6083SPeter Grehan case VM_REG_GUEST_LDTR: 103366f6083SPeter Grehan return (VMCS_GUEST_LDTR_SELECTOR); 104366f6083SPeter Grehan case VM_REG_GUEST_EFER: 105366f6083SPeter Grehan return (VMCS_GUEST_IA32_EFER); 106366f6083SPeter Grehan default: 107366f6083SPeter Grehan return (-1); 108366f6083SPeter Grehan } 109366f6083SPeter Grehan 110366f6083SPeter Grehan } 111366f6083SPeter Grehan 112366f6083SPeter Grehan static int 113366f6083SPeter Grehan vmcs_seg_desc_encoding(int seg, uint32_t *base, uint32_t *lim, uint32_t *acc) 114366f6083SPeter Grehan { 115366f6083SPeter Grehan 116366f6083SPeter Grehan switch (seg) { 117366f6083SPeter Grehan case VM_REG_GUEST_ES: 118366f6083SPeter Grehan *base = VMCS_GUEST_ES_BASE; 119366f6083SPeter Grehan *lim = VMCS_GUEST_ES_LIMIT; 120366f6083SPeter Grehan *acc = VMCS_GUEST_ES_ACCESS_RIGHTS; 121366f6083SPeter Grehan break; 122366f6083SPeter Grehan case VM_REG_GUEST_CS: 123366f6083SPeter Grehan *base = VMCS_GUEST_CS_BASE; 124366f6083SPeter Grehan *lim = VMCS_GUEST_CS_LIMIT; 125366f6083SPeter Grehan *acc = VMCS_GUEST_CS_ACCESS_RIGHTS; 126366f6083SPeter Grehan break; 127366f6083SPeter Grehan case VM_REG_GUEST_SS: 128366f6083SPeter Grehan *base = VMCS_GUEST_SS_BASE; 129366f6083SPeter Grehan *lim = VMCS_GUEST_SS_LIMIT; 130366f6083SPeter Grehan *acc = VMCS_GUEST_SS_ACCESS_RIGHTS; 131366f6083SPeter Grehan break; 132366f6083SPeter Grehan case VM_REG_GUEST_DS: 133366f6083SPeter Grehan *base = VMCS_GUEST_DS_BASE; 134366f6083SPeter Grehan *lim = VMCS_GUEST_DS_LIMIT; 135366f6083SPeter Grehan *acc = VMCS_GUEST_DS_ACCESS_RIGHTS; 136366f6083SPeter Grehan break; 137366f6083SPeter Grehan case VM_REG_GUEST_FS: 138366f6083SPeter Grehan *base = VMCS_GUEST_FS_BASE; 139366f6083SPeter Grehan *lim = VMCS_GUEST_FS_LIMIT; 140366f6083SPeter Grehan *acc = VMCS_GUEST_FS_ACCESS_RIGHTS; 141366f6083SPeter Grehan break; 142366f6083SPeter Grehan case VM_REG_GUEST_GS: 143366f6083SPeter Grehan *base = VMCS_GUEST_GS_BASE; 144366f6083SPeter Grehan *lim = VMCS_GUEST_GS_LIMIT; 145366f6083SPeter Grehan *acc = VMCS_GUEST_GS_ACCESS_RIGHTS; 146366f6083SPeter Grehan break; 147366f6083SPeter Grehan case VM_REG_GUEST_TR: 148366f6083SPeter Grehan *base = VMCS_GUEST_TR_BASE; 149366f6083SPeter Grehan *lim = VMCS_GUEST_TR_LIMIT; 150366f6083SPeter Grehan *acc = VMCS_GUEST_TR_ACCESS_RIGHTS; 151366f6083SPeter Grehan break; 152366f6083SPeter Grehan case VM_REG_GUEST_LDTR: 153366f6083SPeter Grehan *base = VMCS_GUEST_LDTR_BASE; 154366f6083SPeter Grehan *lim = VMCS_GUEST_LDTR_LIMIT; 155366f6083SPeter Grehan *acc = VMCS_GUEST_LDTR_ACCESS_RIGHTS; 156366f6083SPeter Grehan break; 157366f6083SPeter Grehan case VM_REG_GUEST_IDTR: 158366f6083SPeter Grehan *base = VMCS_GUEST_IDTR_BASE; 159366f6083SPeter Grehan *lim = VMCS_GUEST_IDTR_LIMIT; 160366f6083SPeter Grehan *acc = VMCS_INVALID_ENCODING; 161366f6083SPeter Grehan break; 162366f6083SPeter Grehan case VM_REG_GUEST_GDTR: 163366f6083SPeter Grehan *base = VMCS_GUEST_GDTR_BASE; 164366f6083SPeter Grehan *lim = VMCS_GUEST_GDTR_LIMIT; 165366f6083SPeter Grehan *acc = VMCS_INVALID_ENCODING; 166366f6083SPeter Grehan break; 167366f6083SPeter Grehan default: 168366f6083SPeter Grehan return (EINVAL); 169366f6083SPeter Grehan } 170366f6083SPeter Grehan 171366f6083SPeter Grehan return (0); 172366f6083SPeter Grehan } 173366f6083SPeter Grehan 174366f6083SPeter Grehan int 175d3c11f40SPeter Grehan vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *retval) 176366f6083SPeter Grehan { 177366f6083SPeter Grehan int error; 178366f6083SPeter Grehan uint32_t encoding; 179366f6083SPeter Grehan 180366f6083SPeter Grehan /* 181366f6083SPeter Grehan * If we need to get at vmx-specific state in the VMCS we can bypass 182366f6083SPeter Grehan * the translation of 'ident' to 'encoding' by simply setting the 183366f6083SPeter Grehan * sign bit. As it so happens the upper 16 bits are reserved (i.e 184366f6083SPeter Grehan * set to 0) in the encodings for the VMCS so we are free to use the 185366f6083SPeter Grehan * sign bit. 186366f6083SPeter Grehan */ 187366f6083SPeter Grehan if (ident < 0) 188366f6083SPeter Grehan encoding = ident & 0x7fffffff; 189366f6083SPeter Grehan else 190366f6083SPeter Grehan encoding = vmcs_field_encoding(ident); 191366f6083SPeter Grehan 192366f6083SPeter Grehan if (encoding == (uint32_t)-1) 193366f6083SPeter Grehan return (EINVAL); 194366f6083SPeter Grehan 195d3c11f40SPeter Grehan if (!running) 196366f6083SPeter Grehan VMPTRLD(vmcs); 197d3c11f40SPeter Grehan 198366f6083SPeter Grehan error = vmread(encoding, retval); 199d3c11f40SPeter Grehan 200d3c11f40SPeter Grehan if (!running) 201366f6083SPeter Grehan VMCLEAR(vmcs); 202d3c11f40SPeter Grehan 203366f6083SPeter Grehan return (error); 204366f6083SPeter Grehan } 205366f6083SPeter Grehan 206366f6083SPeter Grehan int 207d3c11f40SPeter Grehan vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val) 208366f6083SPeter Grehan { 209366f6083SPeter Grehan int error; 210366f6083SPeter Grehan uint32_t encoding; 211366f6083SPeter Grehan 212366f6083SPeter Grehan if (ident < 0) 213366f6083SPeter Grehan encoding = ident & 0x7fffffff; 214366f6083SPeter Grehan else 215366f6083SPeter Grehan encoding = vmcs_field_encoding(ident); 216366f6083SPeter Grehan 217366f6083SPeter Grehan if (encoding == (uint32_t)-1) 218366f6083SPeter Grehan return (EINVAL); 219366f6083SPeter Grehan 220366f6083SPeter Grehan val = vmcs_fix_regval(encoding, val); 221366f6083SPeter Grehan 222d3c11f40SPeter Grehan if (!running) 223366f6083SPeter Grehan VMPTRLD(vmcs); 224d3c11f40SPeter Grehan 225366f6083SPeter Grehan error = vmwrite(encoding, val); 226d3c11f40SPeter Grehan 227d3c11f40SPeter Grehan if (!running) 228366f6083SPeter Grehan VMCLEAR(vmcs); 229d3c11f40SPeter Grehan 230366f6083SPeter Grehan return (error); 231366f6083SPeter Grehan } 232366f6083SPeter Grehan 233366f6083SPeter Grehan int 234366f6083SPeter Grehan vmcs_setdesc(struct vmcs *vmcs, int seg, struct seg_desc *desc) 235366f6083SPeter Grehan { 236366f6083SPeter Grehan int error; 237366f6083SPeter Grehan uint32_t base, limit, access; 238366f6083SPeter Grehan 239366f6083SPeter Grehan error = vmcs_seg_desc_encoding(seg, &base, &limit, &access); 240366f6083SPeter Grehan if (error != 0) 241366f6083SPeter Grehan panic("vmcs_setdesc: invalid segment register %d", seg); 242366f6083SPeter Grehan 243366f6083SPeter Grehan VMPTRLD(vmcs); 244366f6083SPeter Grehan if ((error = vmwrite(base, desc->base)) != 0) 245366f6083SPeter Grehan goto done; 246366f6083SPeter Grehan 247366f6083SPeter Grehan if ((error = vmwrite(limit, desc->limit)) != 0) 248366f6083SPeter Grehan goto done; 249366f6083SPeter Grehan 250366f6083SPeter Grehan if (access != VMCS_INVALID_ENCODING) { 251366f6083SPeter Grehan if ((error = vmwrite(access, desc->access)) != 0) 252366f6083SPeter Grehan goto done; 253366f6083SPeter Grehan } 254366f6083SPeter Grehan done: 255366f6083SPeter Grehan VMCLEAR(vmcs); 256366f6083SPeter Grehan return (error); 257366f6083SPeter Grehan } 258366f6083SPeter Grehan 259366f6083SPeter Grehan int 260366f6083SPeter Grehan vmcs_getdesc(struct vmcs *vmcs, int seg, struct seg_desc *desc) 261366f6083SPeter Grehan { 262366f6083SPeter Grehan int error; 263366f6083SPeter Grehan uint32_t base, limit, access; 264366f6083SPeter Grehan uint64_t u64; 265366f6083SPeter Grehan 266366f6083SPeter Grehan error = vmcs_seg_desc_encoding(seg, &base, &limit, &access); 267366f6083SPeter Grehan if (error != 0) 268366f6083SPeter Grehan panic("vmcs_getdesc: invalid segment register %d", seg); 269366f6083SPeter Grehan 270366f6083SPeter Grehan VMPTRLD(vmcs); 271366f6083SPeter Grehan if ((error = vmread(base, &u64)) != 0) 272366f6083SPeter Grehan goto done; 273366f6083SPeter Grehan desc->base = u64; 274366f6083SPeter Grehan 275366f6083SPeter Grehan if ((error = vmread(limit, &u64)) != 0) 276366f6083SPeter Grehan goto done; 277366f6083SPeter Grehan desc->limit = u64; 278366f6083SPeter Grehan 279366f6083SPeter Grehan if (access != VMCS_INVALID_ENCODING) { 280366f6083SPeter Grehan if ((error = vmread(access, &u64)) != 0) 281366f6083SPeter Grehan goto done; 282366f6083SPeter Grehan desc->access = u64; 283366f6083SPeter Grehan } 284366f6083SPeter Grehan done: 285366f6083SPeter Grehan VMCLEAR(vmcs); 286366f6083SPeter Grehan return (error); 287366f6083SPeter Grehan } 288366f6083SPeter Grehan 289366f6083SPeter Grehan int 290366f6083SPeter Grehan vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count) 291366f6083SPeter Grehan { 292366f6083SPeter Grehan int error; 293366f6083SPeter Grehan 294366f6083SPeter Grehan VMPTRLD(vmcs); 295366f6083SPeter Grehan 296366f6083SPeter Grehan /* 297366f6083SPeter Grehan * Guest MSRs are saved in the VM-exit MSR-store area. 298366f6083SPeter Grehan * Guest MSRs are loaded from the VM-entry MSR-load area. 299366f6083SPeter Grehan * Both areas point to the same location in memory. 300366f6083SPeter Grehan */ 301366f6083SPeter Grehan if ((error = vmwrite(VMCS_EXIT_MSR_STORE, g_area)) != 0) 302366f6083SPeter Grehan goto done; 303366f6083SPeter Grehan if ((error = vmwrite(VMCS_EXIT_MSR_STORE_COUNT, g_count)) != 0) 304366f6083SPeter Grehan goto done; 305366f6083SPeter Grehan 306366f6083SPeter Grehan if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD, g_area)) != 0) 307366f6083SPeter Grehan goto done; 308366f6083SPeter Grehan if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD_COUNT, g_count)) != 0) 309366f6083SPeter Grehan goto done; 310366f6083SPeter Grehan 311366f6083SPeter Grehan error = 0; 312366f6083SPeter Grehan done: 313366f6083SPeter Grehan VMCLEAR(vmcs); 314366f6083SPeter Grehan return (error); 315366f6083SPeter Grehan } 316366f6083SPeter Grehan 317366f6083SPeter Grehan int 318366f6083SPeter Grehan vmcs_set_defaults(struct vmcs *vmcs, 319318224bbSNeel Natu u_long host_rip, u_long host_rsp, uint64_t eptp, 320366f6083SPeter Grehan uint32_t pinbased_ctls, uint32_t procbased_ctls, 321366f6083SPeter Grehan uint32_t procbased_ctls2, uint32_t exit_ctls, 322366f6083SPeter Grehan uint32_t entry_ctls, u_long msr_bitmap, uint16_t vpid) 323366f6083SPeter Grehan { 324366f6083SPeter Grehan int error, codesel, datasel, tsssel; 325366f6083SPeter Grehan u_long cr0, cr4, efer; 326318224bbSNeel Natu uint64_t pat, fsbase, idtrbase; 327366f6083SPeter Grehan uint32_t exc_bitmap; 328366f6083SPeter Grehan 329b01c2033SNeel Natu codesel = vmm_get_host_codesel(); 330b01c2033SNeel Natu datasel = vmm_get_host_datasel(); 331b01c2033SNeel Natu tsssel = vmm_get_host_tsssel(); 332366f6083SPeter Grehan 333366f6083SPeter Grehan /* 334366f6083SPeter Grehan * Make sure we have a "current" VMCS to work with. 335366f6083SPeter Grehan */ 336366f6083SPeter Grehan VMPTRLD(vmcs); 337366f6083SPeter Grehan 338366f6083SPeter Grehan /* 339366f6083SPeter Grehan * Load the VMX controls 340366f6083SPeter Grehan */ 341366f6083SPeter Grehan if ((error = vmwrite(VMCS_PIN_BASED_CTLS, pinbased_ctls)) != 0) 342366f6083SPeter Grehan goto done; 343366f6083SPeter Grehan if ((error = vmwrite(VMCS_PRI_PROC_BASED_CTLS, procbased_ctls)) != 0) 344366f6083SPeter Grehan goto done; 345366f6083SPeter Grehan if ((error = vmwrite(VMCS_SEC_PROC_BASED_CTLS, procbased_ctls2)) != 0) 346366f6083SPeter Grehan goto done; 347366f6083SPeter Grehan if ((error = vmwrite(VMCS_EXIT_CTLS, exit_ctls)) != 0) 348366f6083SPeter Grehan goto done; 349366f6083SPeter Grehan if ((error = vmwrite(VMCS_ENTRY_CTLS, entry_ctls)) != 0) 350366f6083SPeter Grehan goto done; 351366f6083SPeter Grehan 352366f6083SPeter Grehan /* Guest state */ 353366f6083SPeter Grehan 354366f6083SPeter Grehan /* Initialize guest IA32_PAT MSR with the default value */ 355366f6083SPeter Grehan pat = PAT_VALUE(0, PAT_WRITE_BACK) | 356366f6083SPeter Grehan PAT_VALUE(1, PAT_WRITE_THROUGH) | 357366f6083SPeter Grehan PAT_VALUE(2, PAT_UNCACHED) | 358366f6083SPeter Grehan PAT_VALUE(3, PAT_UNCACHEABLE) | 359366f6083SPeter Grehan PAT_VALUE(4, PAT_WRITE_BACK) | 360366f6083SPeter Grehan PAT_VALUE(5, PAT_WRITE_THROUGH) | 361366f6083SPeter Grehan PAT_VALUE(6, PAT_UNCACHED) | 362366f6083SPeter Grehan PAT_VALUE(7, PAT_UNCACHEABLE); 363366f6083SPeter Grehan if ((error = vmwrite(VMCS_GUEST_IA32_PAT, pat)) != 0) 364366f6083SPeter Grehan goto done; 365366f6083SPeter Grehan 366366f6083SPeter Grehan /* Host state */ 367366f6083SPeter Grehan 368366f6083SPeter Grehan /* Initialize host IA32_PAT MSR */ 369b01c2033SNeel Natu pat = vmm_get_host_pat(); 370366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_IA32_PAT, pat)) != 0) 371366f6083SPeter Grehan goto done; 372366f6083SPeter Grehan 373366f6083SPeter Grehan /* Load the IA32_EFER MSR */ 374b01c2033SNeel Natu efer = vmm_get_host_efer(); 375366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_IA32_EFER, efer)) != 0) 376366f6083SPeter Grehan goto done; 377366f6083SPeter Grehan 378366f6083SPeter Grehan /* Load the control registers */ 379bd8572e0SNeel Natu 380b01c2033SNeel Natu cr0 = vmm_get_host_cr0(); 381366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0) 382366f6083SPeter Grehan goto done; 383366f6083SPeter Grehan 384b01c2033SNeel Natu cr4 = vmm_get_host_cr4() | CR4_VMXE; 385366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0) 386366f6083SPeter Grehan goto done; 387366f6083SPeter Grehan 388366f6083SPeter Grehan /* Load the segment selectors */ 389366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_ES_SELECTOR, datasel)) != 0) 390366f6083SPeter Grehan goto done; 391366f6083SPeter Grehan 392366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_CS_SELECTOR, codesel)) != 0) 393366f6083SPeter Grehan goto done; 394366f6083SPeter Grehan 395366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_SS_SELECTOR, datasel)) != 0) 396366f6083SPeter Grehan goto done; 397366f6083SPeter Grehan 398366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_DS_SELECTOR, datasel)) != 0) 399366f6083SPeter Grehan goto done; 400366f6083SPeter Grehan 401366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_FS_SELECTOR, datasel)) != 0) 402366f6083SPeter Grehan goto done; 403366f6083SPeter Grehan 404366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_GS_SELECTOR, datasel)) != 0) 405366f6083SPeter Grehan goto done; 406366f6083SPeter Grehan 407366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_TR_SELECTOR, tsssel)) != 0) 408366f6083SPeter Grehan goto done; 409366f6083SPeter Grehan 410366f6083SPeter Grehan /* 411366f6083SPeter Grehan * Load the Base-Address for %fs and idtr. 412366f6083SPeter Grehan * 413366f6083SPeter Grehan * Note that we exclude %gs, tss and gdtr here because their base 414366f6083SPeter Grehan * address is pcpu specific. 415366f6083SPeter Grehan */ 416b01c2033SNeel Natu fsbase = vmm_get_host_fsbase(); 417b01c2033SNeel Natu if ((error = vmwrite(VMCS_HOST_FS_BASE, fsbase)) != 0) 418366f6083SPeter Grehan goto done; 419366f6083SPeter Grehan 420b01c2033SNeel Natu idtrbase = vmm_get_host_idtrbase(); 421b01c2033SNeel Natu if ((error = vmwrite(VMCS_HOST_IDTR_BASE, idtrbase)) != 0) 422366f6083SPeter Grehan goto done; 423366f6083SPeter Grehan 424366f6083SPeter Grehan /* instruction pointer */ 425366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_RIP, host_rip)) != 0) 426366f6083SPeter Grehan goto done; 427366f6083SPeter Grehan 428366f6083SPeter Grehan /* stack pointer */ 429366f6083SPeter Grehan if ((error = vmwrite(VMCS_HOST_RSP, host_rsp)) != 0) 430366f6083SPeter Grehan goto done; 431366f6083SPeter Grehan 432366f6083SPeter Grehan /* eptp */ 433366f6083SPeter Grehan if ((error = vmwrite(VMCS_EPTP, eptp)) != 0) 434366f6083SPeter Grehan goto done; 435366f6083SPeter Grehan 436366f6083SPeter Grehan /* vpid */ 437366f6083SPeter Grehan if ((error = vmwrite(VMCS_VPID, vpid)) != 0) 438366f6083SPeter Grehan goto done; 439366f6083SPeter Grehan 440366f6083SPeter Grehan /* msr bitmap */ 441366f6083SPeter Grehan if ((error = vmwrite(VMCS_MSR_BITMAP, msr_bitmap)) != 0) 442366f6083SPeter Grehan goto done; 443366f6083SPeter Grehan 444366f6083SPeter Grehan /* exception bitmap */ 445366f6083SPeter Grehan exc_bitmap = 1 << IDT_MC; 446366f6083SPeter Grehan if ((error = vmwrite(VMCS_EXCEPTION_BITMAP, exc_bitmap)) != 0) 447366f6083SPeter Grehan goto done; 448366f6083SPeter Grehan 449366f6083SPeter Grehan /* link pointer */ 450366f6083SPeter Grehan if ((error = vmwrite(VMCS_LINK_POINTER, ~0)) != 0) 451366f6083SPeter Grehan goto done; 452366f6083SPeter Grehan done: 453366f6083SPeter Grehan VMCLEAR(vmcs); 454366f6083SPeter Grehan return (error); 455366f6083SPeter Grehan } 456366f6083SPeter Grehan 457b3996dd4SJohn Baldwin #ifdef DDB 458b3996dd4SJohn Baldwin extern int vmxon_enabled[]; 459b3996dd4SJohn Baldwin 460b3996dd4SJohn Baldwin DB_SHOW_COMMAND(vmcs, db_show_vmcs) 461b3996dd4SJohn Baldwin { 462b3996dd4SJohn Baldwin uint64_t cur_vmcs, val; 463b3996dd4SJohn Baldwin uint32_t exit; 464b3996dd4SJohn Baldwin 465b3996dd4SJohn Baldwin if (!vmxon_enabled[curcpu]) { 466b3996dd4SJohn Baldwin db_printf("VMX not enabled\n"); 467b3996dd4SJohn Baldwin return; 468b3996dd4SJohn Baldwin } 469b3996dd4SJohn Baldwin 470b3996dd4SJohn Baldwin if (have_addr) { 471b3996dd4SJohn Baldwin db_printf("Only current VMCS supported\n"); 472b3996dd4SJohn Baldwin return; 473b3996dd4SJohn Baldwin } 474b3996dd4SJohn Baldwin 475b3996dd4SJohn Baldwin vmptrst(&cur_vmcs); 476b3996dd4SJohn Baldwin if (cur_vmcs == VMCS_INITIAL) { 477b3996dd4SJohn Baldwin db_printf("No current VM context\n"); 478b3996dd4SJohn Baldwin return; 479b3996dd4SJohn Baldwin } 480b3996dd4SJohn Baldwin db_printf("VMCS: %jx\n", cur_vmcs); 481b3996dd4SJohn Baldwin db_printf("VPID: %lu\n", vmcs_read(VMCS_VPID)); 482b3996dd4SJohn Baldwin db_printf("Activity: "); 483b3996dd4SJohn Baldwin val = vmcs_read(VMCS_GUEST_ACTIVITY); 484b3996dd4SJohn Baldwin switch (val) { 485b3996dd4SJohn Baldwin case 0: 486b3996dd4SJohn Baldwin db_printf("Active"); 487b3996dd4SJohn Baldwin break; 488b3996dd4SJohn Baldwin case 1: 489b3996dd4SJohn Baldwin db_printf("HLT"); 490b3996dd4SJohn Baldwin break; 491b3996dd4SJohn Baldwin case 2: 492b3996dd4SJohn Baldwin db_printf("Shutdown"); 493b3996dd4SJohn Baldwin break; 494b3996dd4SJohn Baldwin case 3: 495b3996dd4SJohn Baldwin db_printf("Wait for SIPI"); 496b3996dd4SJohn Baldwin break; 497b3996dd4SJohn Baldwin default: 498b3996dd4SJohn Baldwin db_printf("Unknown: %#lx", val); 499b3996dd4SJohn Baldwin } 500b3996dd4SJohn Baldwin db_printf("\n"); 501b3996dd4SJohn Baldwin exit = vmcs_read(VMCS_EXIT_REASON); 502b3996dd4SJohn Baldwin if (exit & 0x80000000) 503b3996dd4SJohn Baldwin db_printf("Entry Failure Reason: %u\n", exit & 0xffff); 504b3996dd4SJohn Baldwin else 505b3996dd4SJohn Baldwin db_printf("Exit Reason: %u\n", exit & 0xffff); 506b3996dd4SJohn Baldwin db_printf("Qualification: %#lx\n", vmcs_exit_qualification()); 507b3996dd4SJohn Baldwin db_printf("Guest Linear Address: %#lx\n", 508b3996dd4SJohn Baldwin vmcs_read(VMCS_GUEST_LINEAR_ADDRESS)); 509b3996dd4SJohn Baldwin switch (exit & 0x8000ffff) { 510b3996dd4SJohn Baldwin case EXIT_REASON_EXCEPTION: 511b3996dd4SJohn Baldwin case EXIT_REASON_EXT_INTR: 512b3996dd4SJohn Baldwin val = vmcs_read(VMCS_EXIT_INTERRUPTION_INFO); 513b3996dd4SJohn Baldwin db_printf("Interrupt Type: "); 514b3996dd4SJohn Baldwin switch (val >> 8 & 0x7) { 515b3996dd4SJohn Baldwin case 0: 516b3996dd4SJohn Baldwin db_printf("external"); 517b3996dd4SJohn Baldwin break; 518b3996dd4SJohn Baldwin case 2: 519b3996dd4SJohn Baldwin db_printf("NMI"); 520b3996dd4SJohn Baldwin break; 521b3996dd4SJohn Baldwin case 3: 522b3996dd4SJohn Baldwin db_printf("HW exception"); 523b3996dd4SJohn Baldwin break; 524b3996dd4SJohn Baldwin case 4: 525b3996dd4SJohn Baldwin db_printf("SW exception"); 526b3996dd4SJohn Baldwin break; 527b3996dd4SJohn Baldwin default: 528b3996dd4SJohn Baldwin db_printf("?? %lu", val >> 8 & 0x7); 529b3996dd4SJohn Baldwin break; 530b3996dd4SJohn Baldwin } 531b3996dd4SJohn Baldwin db_printf(" Vector: %lu", val & 0xff); 532b3996dd4SJohn Baldwin if (val & 0x800) 533b3996dd4SJohn Baldwin db_printf(" Error Code: %lx", 534b3996dd4SJohn Baldwin vmcs_read(VMCS_EXIT_INTERRUPTION_ERROR)); 535b3996dd4SJohn Baldwin db_printf("\n"); 536b3996dd4SJohn Baldwin break; 537b3996dd4SJohn Baldwin case EXIT_REASON_EPT_FAULT: 538b3996dd4SJohn Baldwin case EXIT_REASON_EPT_MISCONFIG: 539b3996dd4SJohn Baldwin db_printf("Guest Physical Address: %#lx\n", 540b3996dd4SJohn Baldwin vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS)); 541b3996dd4SJohn Baldwin break; 542b3996dd4SJohn Baldwin } 543b3996dd4SJohn Baldwin db_printf("VM-instruction error: %#lx\n", vmcs_instruction_error()); 544b3996dd4SJohn Baldwin } 545b3996dd4SJohn Baldwin #endif 546