xref: /freebsd/sys/amd64/vmm/amd/svm_softc.h (revision ebc3c37c6f86103a58daa4e00b9a56e8dabc68ba)
1b18ac2d8SNeel Natu /*-
2*ebc3c37cSMarcelo Araujo  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3*ebc3c37cSMarcelo Araujo  *
4b18ac2d8SNeel Natu  * Copyright (c) 2013 Anish Gupta (akgupt3@gmail.com)
5b18ac2d8SNeel Natu  * All rights reserved.
6b18ac2d8SNeel Natu  *
7b18ac2d8SNeel Natu  * Redistribution and use in source and binary forms, with or without
8b18ac2d8SNeel Natu  * modification, are permitted provided that the following conditions
9b18ac2d8SNeel Natu  * are met:
10b18ac2d8SNeel Natu  * 1. Redistributions of source code must retain the above copyright
11b18ac2d8SNeel Natu  *    notice unmodified, this list of conditions, and the following
12b18ac2d8SNeel Natu  *    disclaimer.
13b18ac2d8SNeel Natu  * 2. Redistributions in binary form must reproduce the above copyright
14b18ac2d8SNeel Natu  *    notice, this list of conditions and the following disclaimer in the
15b18ac2d8SNeel Natu  *    documentation and/or other materials provided with the distribution.
16b18ac2d8SNeel Natu  *
17b18ac2d8SNeel Natu  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18b18ac2d8SNeel Natu  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19b18ac2d8SNeel Natu  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20b18ac2d8SNeel Natu  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21b18ac2d8SNeel Natu  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22b18ac2d8SNeel Natu  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23b18ac2d8SNeel Natu  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24b18ac2d8SNeel Natu  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25b18ac2d8SNeel Natu  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26b18ac2d8SNeel Natu  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27b18ac2d8SNeel Natu  *
28b18ac2d8SNeel Natu  * $FreeBSD$
29b18ac2d8SNeel Natu  */
30b18ac2d8SNeel Natu 
31b18ac2d8SNeel Natu #ifndef _SVM_SOFTC_H_
32b18ac2d8SNeel Natu #define _SVM_SOFTC_H_
33b18ac2d8SNeel Natu 
34b18ac2d8SNeel Natu #define SVM_IO_BITMAP_SIZE	(3 * PAGE_SIZE)
35b18ac2d8SNeel Natu #define SVM_MSR_BITMAP_SIZE	(2 * PAGE_SIZE)
36b18ac2d8SNeel Natu 
37a2684814SNeel Natu struct asid {
38a2684814SNeel Natu 	uint64_t	gen;	/* range is [1, ~0UL] */
39a2684814SNeel Natu 	uint32_t	num;	/* range is [1, nasid - 1] */
40a2684814SNeel Natu };
41a2684814SNeel Natu 
42b18ac2d8SNeel Natu /*
43f37dbf57SNeel Natu  * XXX separate out 'struct vmcb' from 'svm_vcpu' to avoid wasting space
44f37dbf57SNeel Natu  * due to VMCB alignment requirements.
45b18ac2d8SNeel Natu  */
46b18ac2d8SNeel Natu struct svm_vcpu {
47b18ac2d8SNeel Natu 	struct vmcb	vmcb;	 /* hardware saved vcpu context */
48b18ac2d8SNeel Natu 	struct svm_regctx swctx; /* software saved vcpu context */
49b18ac2d8SNeel Natu 	uint64_t	vmcb_pa; /* VMCB physical address */
502ce12423SNeel Natu 	uint64_t	nextrip; /* next instruction to be executed by guest */
51b18ac2d8SNeel Natu         int		lastcpu; /* host cpu that the vcpu last ran on */
52a2684814SNeel Natu 	uint32_t	dirty;	 /* state cache bits that must be cleared */
53a2684814SNeel Natu 	long		eptgen;	 /* pmap->pm_eptgen when the vcpu last ran */
54a2684814SNeel Natu 	struct asid	asid;
55b18ac2d8SNeel Natu } __aligned(PAGE_SIZE);
56b18ac2d8SNeel Natu 
57b18ac2d8SNeel Natu /*
58b18ac2d8SNeel Natu  * SVM softc, one per virtual machine.
59b18ac2d8SNeel Natu  */
60b18ac2d8SNeel Natu struct svm_softc {
61eee8190aSPeter Grehan 	uint8_t apic_page[VM_MAXCPU][PAGE_SIZE];
62b18ac2d8SNeel Natu 	struct svm_vcpu vcpu[VM_MAXCPU];
63f37dbf57SNeel Natu 	vm_offset_t 	nptp;			    /* nested page table */
64091da2dfSAndriy Gapon 	uint8_t		*iopm_bitmap;    /* shared by all vcpus */
65091da2dfSAndriy Gapon 	uint8_t		*msr_bitmap;    /* shared by all vcpus */
66f37dbf57SNeel Natu 	struct vm	*vm;
67091da2dfSAndriy Gapon };
68b18ac2d8SNeel Natu 
69a0b78f09SPeter Grehan CTASSERT((offsetof(struct svm_softc, nptp) & PAGE_MASK) == 0);
70b18ac2d8SNeel Natu 
71b18ac2d8SNeel Natu static __inline struct svm_vcpu *
72b18ac2d8SNeel Natu svm_get_vcpu(struct svm_softc *sc, int vcpu)
73b18ac2d8SNeel Natu {
74b18ac2d8SNeel Natu 
75b18ac2d8SNeel Natu 	return (&(sc->vcpu[vcpu]));
76b18ac2d8SNeel Natu }
77b18ac2d8SNeel Natu 
78b18ac2d8SNeel Natu static __inline struct vmcb *
79b18ac2d8SNeel Natu svm_get_vmcb(struct svm_softc *sc, int vcpu)
80b18ac2d8SNeel Natu {
81b18ac2d8SNeel Natu 
82b18ac2d8SNeel Natu 	return (&(sc->vcpu[vcpu].vmcb));
83b18ac2d8SNeel Natu }
84b18ac2d8SNeel Natu 
85b18ac2d8SNeel Natu static __inline struct vmcb_state *
86b18ac2d8SNeel Natu svm_get_vmcb_state(struct svm_softc *sc, int vcpu)
87b18ac2d8SNeel Natu {
88b18ac2d8SNeel Natu 
89b18ac2d8SNeel Natu 	return (&(sc->vcpu[vcpu].vmcb.state));
90b18ac2d8SNeel Natu }
91b18ac2d8SNeel Natu 
92b18ac2d8SNeel Natu static __inline struct vmcb_ctrl *
93b18ac2d8SNeel Natu svm_get_vmcb_ctrl(struct svm_softc *sc, int vcpu)
94b18ac2d8SNeel Natu {
95b18ac2d8SNeel Natu 
96b18ac2d8SNeel Natu 	return (&(sc->vcpu[vcpu].vmcb.ctrl));
97b18ac2d8SNeel Natu }
98b18ac2d8SNeel Natu 
99b18ac2d8SNeel Natu static __inline struct svm_regctx *
100b18ac2d8SNeel Natu svm_get_guest_regctx(struct svm_softc *sc, int vcpu)
101b18ac2d8SNeel Natu {
102b18ac2d8SNeel Natu 
103b18ac2d8SNeel Natu 	return (&(sc->vcpu[vcpu].swctx));
104b18ac2d8SNeel Natu }
105b18ac2d8SNeel Natu 
106af198d88SNeel Natu static __inline void
107af198d88SNeel Natu svm_set_dirty(struct svm_softc *sc, int vcpu, uint32_t dirtybits)
108af198d88SNeel Natu {
109af198d88SNeel Natu         struct svm_vcpu *vcpustate;
110af198d88SNeel Natu 
111af198d88SNeel Natu         vcpustate = svm_get_vcpu(sc, vcpu);
112af198d88SNeel Natu 
113af198d88SNeel Natu         vcpustate->dirty |= dirtybits;
114af198d88SNeel Natu }
115af198d88SNeel Natu 
116b18ac2d8SNeel Natu #endif /* _SVM_SOFTC_H_ */
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