1b18ac2d8SNeel Natu /*- 2b18ac2d8SNeel Natu * Copyright (c) 2013 Anish Gupta (akgupt3@gmail.com) 3b18ac2d8SNeel Natu * All rights reserved. 4b18ac2d8SNeel Natu * 5b18ac2d8SNeel Natu * Redistribution and use in source and binary forms, with or without 6b18ac2d8SNeel Natu * modification, are permitted provided that the following conditions 7b18ac2d8SNeel Natu * are met: 8b18ac2d8SNeel Natu * 1. Redistributions of source code must retain the above copyright 9b18ac2d8SNeel Natu * notice unmodified, this list of conditions, and the following 10b18ac2d8SNeel Natu * disclaimer. 11b18ac2d8SNeel Natu * 2. Redistributions in binary form must reproduce the above copyright 12b18ac2d8SNeel Natu * notice, this list of conditions and the following disclaimer in the 13b18ac2d8SNeel Natu * documentation and/or other materials provided with the distribution. 14b18ac2d8SNeel Natu * 15b18ac2d8SNeel Natu * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16b18ac2d8SNeel Natu * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17b18ac2d8SNeel Natu * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18b18ac2d8SNeel Natu * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19b18ac2d8SNeel Natu * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20b18ac2d8SNeel Natu * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21b18ac2d8SNeel Natu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22b18ac2d8SNeel Natu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23b18ac2d8SNeel Natu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24b18ac2d8SNeel Natu * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25b18ac2d8SNeel Natu * 26b18ac2d8SNeel Natu * $FreeBSD$ 27b18ac2d8SNeel Natu */ 28b18ac2d8SNeel Natu 29b18ac2d8SNeel Natu #ifndef _SVM_SOFTC_H_ 30b18ac2d8SNeel Natu #define _SVM_SOFTC_H_ 31b18ac2d8SNeel Natu 32b18ac2d8SNeel Natu #define SVM_IO_BITMAP_SIZE (3 * PAGE_SIZE) 33b18ac2d8SNeel Natu #define SVM_MSR_BITMAP_SIZE (2 * PAGE_SIZE) 34b18ac2d8SNeel Natu 35a2684814SNeel Natu struct asid { 36a2684814SNeel Natu uint64_t gen; /* range is [1, ~0UL] */ 37a2684814SNeel Natu uint32_t num; /* range is [1, nasid - 1] */ 38a2684814SNeel Natu }; 39a2684814SNeel Natu 40b18ac2d8SNeel Natu /* 41b18ac2d8SNeel Natu * svm_vpcu contains SVM VMCB state and vcpu register state. 42b18ac2d8SNeel Natu */ 43b18ac2d8SNeel Natu struct svm_vcpu { 44b18ac2d8SNeel Natu struct vmcb vmcb; /* hardware saved vcpu context */ 45b18ac2d8SNeel Natu struct svm_regctx swctx; /* software saved vcpu context */ 46b18ac2d8SNeel Natu uint64_t vmcb_pa; /* VMCB physical address */ 47b18ac2d8SNeel Natu int lastcpu; /* host cpu that the vcpu last ran on */ 48a2684814SNeel Natu uint32_t dirty; /* state cache bits that must be cleared */ 49a2684814SNeel Natu long eptgen; /* pmap->pm_eptgen when the vcpu last ran */ 50a2684814SNeel Natu struct asid asid; 51b18ac2d8SNeel Natu } __aligned(PAGE_SIZE); 52b18ac2d8SNeel Natu 53b18ac2d8SNeel Natu /* 54b18ac2d8SNeel Natu * SVM softc, one per virtual machine. 55b18ac2d8SNeel Natu */ 56b18ac2d8SNeel Natu struct svm_softc { 57b18ac2d8SNeel Natu /* 58b18ac2d8SNeel Natu * IO permission map, VMCB.ctrl.iopm_base_pa should point to this. 59b18ac2d8SNeel Natu * If a bit is set, access to I/O port is intercepted. 60b18ac2d8SNeel Natu */ 61b18ac2d8SNeel Natu uint8_t iopm_bitmap[SVM_IO_BITMAP_SIZE]; 62b18ac2d8SNeel Natu 63b18ac2d8SNeel Natu /* 64b18ac2d8SNeel Natu * MSR permission bitmap, VMCB.ctrl.msrpm_base_pa should point to this. 65b18ac2d8SNeel Natu * Two bits are used for each MSR with the LSB used for read access 66b18ac2d8SNeel Natu * and the MSB used for write access. A value of '1' indicates that 67b18ac2d8SNeel Natu * the operation is intercepted. 68b18ac2d8SNeel Natu */ 69b18ac2d8SNeel Natu uint8_t msr_bitmap[SVM_MSR_BITMAP_SIZE]; 70b18ac2d8SNeel Natu 71eee8190aSPeter Grehan uint8_t apic_page[VM_MAXCPU][PAGE_SIZE]; 72b18ac2d8SNeel Natu /* Nested Paging */ 73a0b78f09SPeter Grehan vm_offset_t nptp; 74b18ac2d8SNeel Natu 75b18ac2d8SNeel Natu /* Virtual machine pointer. */ 76b18ac2d8SNeel Natu struct vm *vm; 77b18ac2d8SNeel Natu 78b18ac2d8SNeel Natu /* Guest VCPU h/w and s/w context. */ 79b18ac2d8SNeel Natu struct svm_vcpu vcpu[VM_MAXCPU]; 80b18ac2d8SNeel Natu } __aligned(PAGE_SIZE); 81b18ac2d8SNeel Natu 82a0b78f09SPeter Grehan CTASSERT((offsetof(struct svm_softc, nptp) & PAGE_MASK) == 0); 83b18ac2d8SNeel Natu 84b18ac2d8SNeel Natu static __inline struct svm_vcpu * 85b18ac2d8SNeel Natu svm_get_vcpu(struct svm_softc *sc, int vcpu) 86b18ac2d8SNeel Natu { 87b18ac2d8SNeel Natu 88b18ac2d8SNeel Natu return (&(sc->vcpu[vcpu])); 89b18ac2d8SNeel Natu } 90b18ac2d8SNeel Natu 91b18ac2d8SNeel Natu static __inline struct vmcb * 92b18ac2d8SNeel Natu svm_get_vmcb(struct svm_softc *sc, int vcpu) 93b18ac2d8SNeel Natu { 94b18ac2d8SNeel Natu 95b18ac2d8SNeel Natu return (&(sc->vcpu[vcpu].vmcb)); 96b18ac2d8SNeel Natu } 97b18ac2d8SNeel Natu 98b18ac2d8SNeel Natu static __inline struct vmcb_state * 99b18ac2d8SNeel Natu svm_get_vmcb_state(struct svm_softc *sc, int vcpu) 100b18ac2d8SNeel Natu { 101b18ac2d8SNeel Natu 102b18ac2d8SNeel Natu return (&(sc->vcpu[vcpu].vmcb.state)); 103b18ac2d8SNeel Natu } 104b18ac2d8SNeel Natu 105b18ac2d8SNeel Natu static __inline struct vmcb_ctrl * 106b18ac2d8SNeel Natu svm_get_vmcb_ctrl(struct svm_softc *sc, int vcpu) 107b18ac2d8SNeel Natu { 108b18ac2d8SNeel Natu 109b18ac2d8SNeel Natu return (&(sc->vcpu[vcpu].vmcb.ctrl)); 110b18ac2d8SNeel Natu } 111b18ac2d8SNeel Natu 112b18ac2d8SNeel Natu static __inline struct svm_regctx * 113b18ac2d8SNeel Natu svm_get_guest_regctx(struct svm_softc *sc, int vcpu) 114b18ac2d8SNeel Natu { 115b18ac2d8SNeel Natu 116b18ac2d8SNeel Natu return (&(sc->vcpu[vcpu].swctx)); 117b18ac2d8SNeel Natu } 118b18ac2d8SNeel Natu 119*af198d88SNeel Natu static __inline void 120*af198d88SNeel Natu svm_set_dirty(struct svm_softc *sc, int vcpu, uint32_t dirtybits) 121*af198d88SNeel Natu { 122*af198d88SNeel Natu struct svm_vcpu *vcpustate; 123*af198d88SNeel Natu 124*af198d88SNeel Natu vcpustate = svm_get_vcpu(sc, vcpu); 125*af198d88SNeel Natu 126*af198d88SNeel Natu vcpustate->dirty |= dirtybits; 127*af198d88SNeel Natu } 128*af198d88SNeel Natu 129b18ac2d8SNeel Natu #endif /* _SVM_SOFTC_H_ */ 130