1*2164af29SRuslan Bukin /*- 2*2164af29SRuslan Bukin * Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com> 3*2164af29SRuslan Bukin * All rights reserved. 4*2164af29SRuslan Bukin * 5*2164af29SRuslan Bukin * This software was developed by BAE Systems, the University of Cambridge 6*2164af29SRuslan Bukin * Computer Laboratory, and Memorial University under DARPA/AFRL contract 7*2164af29SRuslan Bukin * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing 8*2164af29SRuslan Bukin * (TC) research program. 9*2164af29SRuslan Bukin * 10*2164af29SRuslan Bukin * Redistribution and use in source and binary forms, with or without 11*2164af29SRuslan Bukin * modification, are permitted provided that the following conditions 12*2164af29SRuslan Bukin * are met: 13*2164af29SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 14*2164af29SRuslan Bukin * notice, this list of conditions and the following disclaimer. 15*2164af29SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 16*2164af29SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 17*2164af29SRuslan Bukin * documentation and/or other materials provided with the distribution. 18*2164af29SRuslan Bukin * 19*2164af29SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20*2164af29SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21*2164af29SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22*2164af29SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23*2164af29SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24*2164af29SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25*2164af29SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26*2164af29SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27*2164af29SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28*2164af29SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29*2164af29SRuslan Bukin * SUCH DAMAGE. 30*2164af29SRuslan Bukin */ 31*2164af29SRuslan Bukin 32*2164af29SRuslan Bukin #ifndef _AMD64_SGX_SGXVAR_H_ 33*2164af29SRuslan Bukin #define _AMD64_SGX_SGXVAR_H_ 34*2164af29SRuslan Bukin 35*2164af29SRuslan Bukin #define SGX_CPUID 0x12 36*2164af29SRuslan Bukin #define SGX_PAGE_SIZE 4096 37*2164af29SRuslan Bukin #define SGX_VA_PAGE_SLOTS 512 38*2164af29SRuslan Bukin #define SGX_VA_PAGES_OFFS 512 39*2164af29SRuslan Bukin #define SGX_SECS_VM_OBJECT_INDEX -1 40*2164af29SRuslan Bukin #define SGX_SIGSTRUCT_SIZE 1808 41*2164af29SRuslan Bukin #define SGX_EINITTOKEN_SIZE 304 42*2164af29SRuslan Bukin #define SGX_IOCTL_MAX_DATA_LEN 26 43*2164af29SRuslan Bukin #define SGX_ENCL_SIZE_MAX_DEF 0x1000000000ULL 44*2164af29SRuslan Bukin #define SGX_EFAULT 99 45*2164af29SRuslan Bukin 46*2164af29SRuslan Bukin #ifndef LOCORE 47*2164af29SRuslan Bukin static MALLOC_DEFINE(M_SGX, "sgx", "SGX driver"); 48*2164af29SRuslan Bukin 49*2164af29SRuslan Bukin struct sgx_vm_handle { 50*2164af29SRuslan Bukin struct sgx_softc *sc; 51*2164af29SRuslan Bukin vm_object_t mem; 52*2164af29SRuslan Bukin uint64_t base; 53*2164af29SRuslan Bukin vm_size_t size; 54*2164af29SRuslan Bukin struct sgx_enclave *enclave; 55*2164af29SRuslan Bukin }; 56*2164af29SRuslan Bukin 57*2164af29SRuslan Bukin /* EPC (Enclave Page Cache) page. */ 58*2164af29SRuslan Bukin struct epc_page { 59*2164af29SRuslan Bukin uint64_t base; 60*2164af29SRuslan Bukin uint64_t phys; 61*2164af29SRuslan Bukin int index; 62*2164af29SRuslan Bukin }; 63*2164af29SRuslan Bukin 64*2164af29SRuslan Bukin struct sgx_enclave { 65*2164af29SRuslan Bukin uint64_t base; 66*2164af29SRuslan Bukin uint64_t size; 67*2164af29SRuslan Bukin struct sgx_vm_handle *vmh; 68*2164af29SRuslan Bukin TAILQ_ENTRY(sgx_enclave) next; 69*2164af29SRuslan Bukin vm_object_t object; 70*2164af29SRuslan Bukin struct epc_page *secs_epc_page; 71*2164af29SRuslan Bukin }; 72*2164af29SRuslan Bukin 73*2164af29SRuslan Bukin struct sgx_softc { 74*2164af29SRuslan Bukin struct cdev *sgx_cdev; 75*2164af29SRuslan Bukin struct mtx mtx_encls; 76*2164af29SRuslan Bukin struct mtx mtx; 77*2164af29SRuslan Bukin uint64_t epc_base; 78*2164af29SRuslan Bukin uint64_t epc_size; 79*2164af29SRuslan Bukin struct epc_page *epc_pages; 80*2164af29SRuslan Bukin struct vmem *vmem_epc; 81*2164af29SRuslan Bukin uint32_t npages; 82*2164af29SRuslan Bukin TAILQ_HEAD(, sgx_enclave) enclaves; 83*2164af29SRuslan Bukin uint64_t enclave_size_max; 84*2164af29SRuslan Bukin uint8_t state; 85*2164af29SRuslan Bukin #define SGX_STATE_RUNNING (1 << 0) 86*2164af29SRuslan Bukin }; 87*2164af29SRuslan Bukin #endif /* !LOCORE */ 88*2164af29SRuslan Bukin 89*2164af29SRuslan Bukin #endif /* !_AMD64_SGX_SGXVAR_H_ */ 90