1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * Copyright (c) 1994 John S. Dyson 7 * All rights reserved. 8 * Copyright (c) 2003 Peter Wemm 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * William Jolitz. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the University of 25 * California, Berkeley and its contributors. 26 * 4. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91 43 * $FreeBSD$ 44 */ 45 46 #ifndef _MACHINE_VMPARAM_H_ 47 #define _MACHINE_VMPARAM_H_ 1 48 49 /* 50 * Machine dependent constants for AMD64. 51 */ 52 53 /* 54 * Virtual memory related constants, all in bytes 55 */ 56 #define MAXTSIZ (32768UL*1024*1024) /* max text size */ 57 #ifndef DFLDSIZ 58 #define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */ 59 #endif 60 #ifndef MAXDSIZ 61 #define MAXDSIZ (32768UL*1024*1024) /* max data size */ 62 #endif 63 #ifndef DFLSSIZ 64 #define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */ 65 #endif 66 #ifndef MAXSSIZ 67 #define MAXSSIZ (512UL*1024*1024) /* max stack size */ 68 #endif 69 #ifndef SGROWSIZ 70 #define SGROWSIZ (128UL*1024) /* amount to grow stack */ 71 #endif 72 73 /* 74 * We provide a machine specific single page allocator through the use 75 * of the direct mapped segment. This uses 2MB pages for reduced 76 * TLB pressure. 77 */ 78 #if !defined(KASAN) && !defined(KMSAN) 79 #define UMA_MD_SMALL_ALLOC 80 #endif 81 82 /* 83 * The physical address space is densely populated. 84 */ 85 #define VM_PHYSSEG_DENSE 86 87 /* 88 * The number of PHYSSEG entries must be one greater than the number 89 * of phys_avail entries because the phys_avail entry that spans the 90 * largest physical address that is accessible by ISA DMA is split 91 * into two PHYSSEG entries. 92 */ 93 #define VM_PHYSSEG_MAX 63 94 95 /* 96 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool 97 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 98 * the pool from which physical pages for page tables and small UMA 99 * objects are allocated. 100 */ 101 #define VM_NFREEPOOL 2 102 #define VM_FREEPOOL_DEFAULT 0 103 #define VM_FREEPOOL_DIRECT 1 104 105 /* 106 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages 107 * that have physical addresses below 4G but are not accessible by ISA DMA, 108 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA 109 * DMA. 110 */ 111 #define VM_NFREELIST 3 112 #define VM_FREELIST_DEFAULT 0 113 #define VM_FREELIST_DMA32 1 114 #define VM_FREELIST_LOWMEM 2 115 116 #define VM_LOWMEM_BOUNDARY (16 << 20) /* 16MB ISA DMA limit */ 117 118 /* 119 * Create the DMA32 free list only if the number of physical pages above 120 * physical address 4G is at least 16M, which amounts to 64GB of physical 121 * memory. 122 */ 123 #define VM_DMA32_NPAGES_THRESHOLD 16777216 124 125 /* 126 * An allocation size of 16MB is supported in order to optimize the 127 * use of the direct map by UMA. Specifically, a cache line contains 128 * at most 8 PDEs, collectively mapping 16MB of physical memory. By 129 * reducing the number of distinct 16MB "pages" that are used by UMA, 130 * the physical memory allocator reduces the likelihood of both 2MB 131 * page TLB misses and cache misses caused by 2MB page TLB misses. 132 */ 133 #define VM_NFREEORDER 13 134 135 /* 136 * Enable superpage reservations: 1 level. 137 */ 138 #ifndef VM_NRESERVLEVEL 139 #define VM_NRESERVLEVEL 1 140 #endif 141 142 /* 143 * Level 0 reservations consist of 512 pages. 144 */ 145 #ifndef VM_LEVEL_0_ORDER 146 #define VM_LEVEL_0_ORDER 9 147 #endif 148 149 #ifdef SMP 150 #define PA_LOCK_COUNT 256 151 #endif 152 153 /* 154 * Kernel physical load address for non-UEFI boot and for legacy UEFI loader. 155 * Newer UEFI loader loads kernel anywhere below 4G, with memory allocated 156 * by boot services. 157 * Needs to be aligned at 2MB superpage boundary. 158 */ 159 #ifndef KERNLOAD 160 #define KERNLOAD 0x200000 161 #endif 162 163 /* 164 * Virtual addresses of things. Derived from the page directory and 165 * page table indexes from pmap.h for precision. 166 * 167 * 0x0000000000000000 - 0x00007fffffffffff user map 168 * 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole) 169 * 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot) 170 * 0xffff804020100fff - 0xffff807fffffffff unused 171 * 0xffff808000000000 - 0xffff847fffffffff large map (can be tuned up) 172 * 0xffff848000000000 - 0xfffff77fffffffff unused (large map extends there) 173 * 0xfffff60000000000 - 0xfffff7ffffffffff 2TB KMSAN origin map, optional 174 * 0xfffff78000000000 - 0xfffff7bfffffffff 512GB KASAN shadow map, optional 175 * 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map 176 * 0xfffffc0000000000 - 0xfffffdffffffffff 2TB KMSAN shadow map, optional 177 * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map 178 * 179 * Within the kernel map: 180 * 181 * 0xfffffe0000000000 vm_page_array 182 * 0xffffffff80000000 KERNBASE 183 */ 184 185 #define VM_MIN_KERNEL_ADDRESS KV4ADDR(KPML4BASE, 0, 0, 0) 186 #define VM_MAX_KERNEL_ADDRESS KV4ADDR(KPML4BASE + NKPML4E - 1, \ 187 NPDPEPG-1, NPDEPG-1, NPTEPG-1) 188 189 #define DMAP_MIN_ADDRESS KV4ADDR(DMPML4I, 0, 0, 0) 190 #define DMAP_MAX_ADDRESS KV4ADDR(DMPML4I + NDMPML4E, 0, 0, 0) 191 192 #define KASAN_MIN_ADDRESS KV4ADDR(KASANPML4I, 0, 0, 0) 193 #define KASAN_MAX_ADDRESS KV4ADDR(KASANPML4I + NKASANPML4E, 0, 0, 0) 194 195 #define KMSAN_SHAD_MIN_ADDRESS KV4ADDR(KMSANSHADPML4I, 0, 0, 0) 196 #define KMSAN_SHAD_MAX_ADDRESS KV4ADDR(KMSANSHADPML4I + NKMSANSHADPML4E, \ 197 0, 0, 0) 198 199 #define KMSAN_ORIG_MIN_ADDRESS KV4ADDR(KMSANORIGPML4I, 0, 0, 0) 200 #define KMSAN_ORIG_MAX_ADDRESS KV4ADDR(KMSANORIGPML4I + NKMSANORIGPML4E, \ 201 0, 0, 0) 202 203 #define LARGEMAP_MIN_ADDRESS KV4ADDR(LMSPML4I, 0, 0, 0) 204 #define LARGEMAP_MAX_ADDRESS KV4ADDR(LMEPML4I + 1, 0, 0, 0) 205 206 /* 207 * Formally kernel mapping starts at KERNBASE, but kernel linker 208 * script leaves first PDE reserved. For legacy BIOS boot, kernel is 209 * loaded at KERNLOAD = 2M, and initial kernel page table maps 210 * physical memory from zero to KERNend starting at KERNBASE. 211 * 212 * KERNSTART is where the first actual kernel page is mapped, after 213 * the compatibility mapping. 214 */ 215 #define KERNBASE KV4ADDR(KPML4I, KPDPI, 0, 0) 216 #define KERNSTART (KERNBASE + NBPDR) 217 218 #define UPT_MAX_ADDRESS KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I) 219 #define UPT_MIN_ADDRESS KV4ADDR(PML4PML4I, 0, 0, 0) 220 221 #define VM_MAXUSER_ADDRESS_LA57 UVADDR(NUPML5E, 0, 0, 0, 0) 222 #define VM_MAXUSER_ADDRESS_LA48 UVADDR(0, NUP4ML4E, 0, 0, 0) 223 #define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS_LA57 224 225 #define SHAREDPAGE_LA57 (VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE) 226 #define SHAREDPAGE_LA48 (VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE) 227 #define USRSTACK_LA57 SHAREDPAGE_LA57 228 #define USRSTACK_LA48 SHAREDPAGE_LA48 229 #define USRSTACK USRSTACK_LA48 230 #define PS_STRINGS_LA57 (USRSTACK_LA57 - sizeof(struct ps_strings)) 231 #define PS_STRINGS_LA48 (USRSTACK_LA48 - sizeof(struct ps_strings)) 232 233 #define VM_MAX_ADDRESS UPT_MAX_ADDRESS 234 #define VM_MIN_ADDRESS (0) 235 236 /* 237 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's 238 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works 239 * because the result is not actually accessed until later, but the early 240 * vt fb startup needs to be reworked. 241 */ 242 #define PMAP_HAS_DMAP 1 243 #define PHYS_TO_DMAP(x) ({ \ 244 KASSERT(dmaplimit == 0 || (x) < dmaplimit, \ 245 ("physical address %#jx not covered by the DMAP", \ 246 (uintmax_t)x)); \ 247 (x) | DMAP_MIN_ADDRESS; }) 248 249 #define DMAP_TO_PHYS(x) ({ \ 250 KASSERT((x) < (DMAP_MIN_ADDRESS + dmaplimit) && \ 251 (x) >= DMAP_MIN_ADDRESS, \ 252 ("virtual address %#jx not covered by the DMAP", \ 253 (uintmax_t)x)); \ 254 (x) & ~DMAP_MIN_ADDRESS; }) 255 256 /* 257 * amd64 maps the page array into KVA so that it can be more easily 258 * allocated on the correct memory domains. 259 */ 260 #define PMAP_HAS_PAGE_ARRAY 1 261 262 /* 263 * How many physical pages per kmem arena virtual page. 264 */ 265 #ifndef VM_KMEM_SIZE_SCALE 266 #define VM_KMEM_SIZE_SCALE (1) 267 #endif 268 269 /* 270 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the 271 * kernel map. 272 */ 273 #ifndef VM_KMEM_SIZE_MAX 274 #define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ 275 VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5) 276 #endif 277 278 /* initial pagein size of beginning of executable file */ 279 #ifndef VM_INITIAL_PAGEIN 280 #define VM_INITIAL_PAGEIN 16 281 #endif 282 283 #define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */ 284 285 /* 286 * Use a fairly large batch size since we expect amd64 systems to have lots of 287 * memory. 288 */ 289 #define VM_BATCHQUEUE_SIZE 31 290 291 /* 292 * The pmap can create non-transparent large page mappings. 293 */ 294 #define PMAP_HAS_LARGEPAGES 1 295 296 /* 297 * Need a page dump array for minidump. 298 */ 299 #define MINIDUMP_PAGE_TRACKING 1 300 301 #endif /* _MACHINE_VMPARAM_H_ */ 302