1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * Copyright (c) 1994 John S. Dyson 7 * All rights reserved. 8 * Copyright (c) 2003 Peter Wemm 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * William Jolitz. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed by the University of 25 * California, Berkeley and its contributors. 26 * 4. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 * 42 * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91 43 * $FreeBSD$ 44 */ 45 46 #ifdef __i386__ 47 #include <i386/vmparam.h> 48 #else /* !__i386__ */ 49 50 #ifndef _MACHINE_VMPARAM_H_ 51 #define _MACHINE_VMPARAM_H_ 1 52 53 /* 54 * Machine dependent constants for AMD64. 55 */ 56 57 /* 58 * Virtual memory related constants, all in bytes 59 */ 60 #define MAXTSIZ (32768UL*1024*1024) /* max text size */ 61 #ifndef DFLDSIZ 62 #define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */ 63 #endif 64 #ifndef MAXDSIZ 65 #define MAXDSIZ (32768UL*1024*1024) /* max data size */ 66 #endif 67 #ifndef DFLSSIZ 68 #define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */ 69 #endif 70 #ifndef MAXSSIZ 71 #define MAXSSIZ (512UL*1024*1024) /* max stack size */ 72 #endif 73 #ifndef SGROWSIZ 74 #define SGROWSIZ (128UL*1024) /* amount to grow stack */ 75 #endif 76 77 /* 78 * We provide a machine specific single page allocator through the use 79 * of the direct mapped segment. This uses 2MB pages for reduced 80 * TLB pressure. 81 */ 82 #if !defined(KASAN) && !defined(KMSAN) 83 #define UMA_MD_SMALL_ALLOC 84 #endif 85 86 /* 87 * The physical address space is densely populated. 88 */ 89 #define VM_PHYSSEG_DENSE 90 91 /* 92 * The number of PHYSSEG entries must be one greater than the number 93 * of phys_avail entries because the phys_avail entry that spans the 94 * largest physical address that is accessible by ISA DMA is split 95 * into two PHYSSEG entries. 96 */ 97 #define VM_PHYSSEG_MAX 63 98 99 /* 100 * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool 101 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 102 * the pool from which physical pages for page tables and small UMA 103 * objects are allocated. 104 */ 105 #define VM_NFREEPOOL 2 106 #define VM_FREEPOOL_DEFAULT 0 107 #define VM_FREEPOOL_DIRECT 1 108 109 /* 110 * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages 111 * that have physical addresses below 4G but are not accessible by ISA DMA, 112 * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA 113 * DMA. 114 */ 115 #define VM_NFREELIST 3 116 #define VM_FREELIST_DEFAULT 0 117 #define VM_FREELIST_DMA32 1 118 #define VM_FREELIST_LOWMEM 2 119 120 #define VM_LOWMEM_BOUNDARY (16 << 20) /* 16MB ISA DMA limit */ 121 122 /* 123 * Create the DMA32 free list only if the number of physical pages above 124 * physical address 4G is at least 16M, which amounts to 64GB of physical 125 * memory. 126 */ 127 #define VM_DMA32_NPAGES_THRESHOLD 16777216 128 129 /* 130 * An allocation size of 16MB is supported in order to optimize the 131 * use of the direct map by UMA. Specifically, a cache line contains 132 * at most 8 PDEs, collectively mapping 16MB of physical memory. By 133 * reducing the number of distinct 16MB "pages" that are used by UMA, 134 * the physical memory allocator reduces the likelihood of both 2MB 135 * page TLB misses and cache misses caused by 2MB page TLB misses. 136 */ 137 #define VM_NFREEORDER 13 138 139 /* 140 * Enable superpage reservations: 1 level. 141 */ 142 #ifndef VM_NRESERVLEVEL 143 #define VM_NRESERVLEVEL 1 144 #endif 145 146 /* 147 * Level 0 reservations consist of 512 pages. 148 */ 149 #ifndef VM_LEVEL_0_ORDER 150 #define VM_LEVEL_0_ORDER 9 151 #endif 152 153 #ifdef SMP 154 #define PA_LOCK_COUNT 256 155 #endif 156 157 /* 158 * Kernel physical load address for non-UEFI boot and for legacy UEFI loader. 159 * Newer UEFI loader loads kernel anywhere below 4G, with memory allocated 160 * by boot services. 161 * Needs to be aligned at 2MB superpage boundary. 162 */ 163 #ifndef KERNLOAD 164 #define KERNLOAD 0x200000 165 #endif 166 167 /* 168 * Virtual addresses of things. Derived from the page directory and 169 * page table indexes from pmap.h for precision. 170 * 171 * 0x0000000000000000 - 0x00007fffffffffff user map 172 * 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole) 173 * 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot) 174 * 0xffff804020100fff - 0xffff807fffffffff unused 175 * 0xffff808000000000 - 0xffff847fffffffff large map (can be tuned up) 176 * 0xffff848000000000 - 0xfffff77fffffffff unused (large map extends there) 177 * 0xfffff60000000000 - 0xfffff7ffffffffff 2TB KMSAN origin map, optional 178 * 0xfffff78000000000 - 0xfffff7bfffffffff 512GB KASAN shadow map, optional 179 * 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map 180 * 0xfffffc0000000000 - 0xfffffdffffffffff 2TB KMSAN shadow map, optional 181 * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map 182 * 183 * Within the kernel map: 184 * 185 * 0xfffffe0000000000 vm_page_array 186 * 0xffffffff80000000 KERNBASE 187 */ 188 189 #define VM_MIN_KERNEL_ADDRESS KV4ADDR(KPML4BASE, 0, 0, 0) 190 #define VM_MAX_KERNEL_ADDRESS KV4ADDR(KPML4BASE + NKPML4E - 1, \ 191 NPDPEPG-1, NPDEPG-1, NPTEPG-1) 192 193 #define DMAP_MIN_ADDRESS KV4ADDR(DMPML4I, 0, 0, 0) 194 #define DMAP_MAX_ADDRESS KV4ADDR(DMPML4I + NDMPML4E, 0, 0, 0) 195 196 #define KASAN_MIN_ADDRESS KV4ADDR(KASANPML4I, 0, 0, 0) 197 #define KASAN_MAX_ADDRESS KV4ADDR(KASANPML4I + NKASANPML4E, 0, 0, 0) 198 199 #define KMSAN_SHAD_MIN_ADDRESS KV4ADDR(KMSANSHADPML4I, 0, 0, 0) 200 #define KMSAN_SHAD_MAX_ADDRESS KV4ADDR(KMSANSHADPML4I + NKMSANSHADPML4E, \ 201 0, 0, 0) 202 203 #define KMSAN_ORIG_MIN_ADDRESS KV4ADDR(KMSANORIGPML4I, 0, 0, 0) 204 #define KMSAN_ORIG_MAX_ADDRESS KV4ADDR(KMSANORIGPML4I + NKMSANORIGPML4E, \ 205 0, 0, 0) 206 207 #define LARGEMAP_MIN_ADDRESS KV4ADDR(LMSPML4I, 0, 0, 0) 208 #define LARGEMAP_MAX_ADDRESS KV4ADDR(LMEPML4I + 1, 0, 0, 0) 209 210 /* 211 * Formally kernel mapping starts at KERNBASE, but kernel linker 212 * script leaves first PDE reserved. For legacy BIOS boot, kernel is 213 * loaded at KERNLOAD = 2M, and initial kernel page table maps 214 * physical memory from zero to KERNend starting at KERNBASE. 215 * 216 * KERNSTART is where the first actual kernel page is mapped, after 217 * the compatibility mapping. 218 */ 219 #define KERNBASE KV4ADDR(KPML4I, KPDPI, 0, 0) 220 #define KERNSTART (KERNBASE + NBPDR) 221 222 #define UPT_MAX_ADDRESS KV4ADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I) 223 #define UPT_MIN_ADDRESS KV4ADDR(PML4PML4I, 0, 0, 0) 224 225 #define VM_MAXUSER_ADDRESS_LA57 UVADDR(NUPML5E, 0, 0, 0, 0) 226 #define VM_MAXUSER_ADDRESS_LA48 UVADDR(0, NUP4ML4E, 0, 0, 0) 227 #define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS_LA57 228 229 #define SHAREDPAGE_LA57 (VM_MAXUSER_ADDRESS_LA57 - PAGE_SIZE) 230 #define SHAREDPAGE_LA48 (VM_MAXUSER_ADDRESS_LA48 - PAGE_SIZE) 231 #define USRSTACK_LA57 SHAREDPAGE_LA57 232 #define USRSTACK_LA48 SHAREDPAGE_LA48 233 #define USRSTACK USRSTACK_LA48 234 #define PS_STRINGS_LA57 (USRSTACK_LA57 - sizeof(struct ps_strings)) 235 #define PS_STRINGS_LA48 (USRSTACK_LA48 - sizeof(struct ps_strings)) 236 237 #define VM_MAX_ADDRESS UPT_MAX_ADDRESS 238 #define VM_MIN_ADDRESS (0) 239 240 /* 241 * XXX Allowing dmaplimit == 0 is a temporary workaround for vt(4) efifb's 242 * early use of PHYS_TO_DMAP before the mapping is actually setup. This works 243 * because the result is not actually accessed until later, but the early 244 * vt fb startup needs to be reworked. 245 */ 246 #define PHYS_IN_DMAP(pa) (dmaplimit == 0 || (pa) < dmaplimit) 247 #define VIRT_IN_DMAP(va) ((va) >= DMAP_MIN_ADDRESS && \ 248 (va) < (DMAP_MIN_ADDRESS + dmaplimit)) 249 250 #define PMAP_HAS_DMAP 1 251 #define PHYS_TO_DMAP(x) ({ \ 252 KASSERT(PHYS_IN_DMAP(x), \ 253 ("physical address %#jx not covered by the DMAP", \ 254 (uintmax_t)x)); \ 255 (x) | DMAP_MIN_ADDRESS; }) 256 257 #define DMAP_TO_PHYS(x) ({ \ 258 KASSERT(VIRT_IN_DMAP(x), \ 259 ("virtual address %#jx not covered by the DMAP", \ 260 (uintmax_t)x)); \ 261 (x) & ~DMAP_MIN_ADDRESS; }) 262 263 /* 264 * amd64 maps the page array into KVA so that it can be more easily 265 * allocated on the correct memory domains. 266 */ 267 #define PMAP_HAS_PAGE_ARRAY 1 268 269 /* 270 * How many physical pages per kmem arena virtual page. 271 */ 272 #ifndef VM_KMEM_SIZE_SCALE 273 #define VM_KMEM_SIZE_SCALE (1) 274 #endif 275 276 /* 277 * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the 278 * kernel map. 279 */ 280 #ifndef VM_KMEM_SIZE_MAX 281 #define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ 282 VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5) 283 #endif 284 285 /* initial pagein size of beginning of executable file */ 286 #ifndef VM_INITIAL_PAGEIN 287 #define VM_INITIAL_PAGEIN 16 288 #endif 289 290 #define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */ 291 292 /* 293 * The pmap can create non-transparent large page mappings. 294 */ 295 #define PMAP_HAS_LARGEPAGES 1 296 297 /* 298 * Need a page dump array for minidump. 299 */ 300 #define MINIDUMP_PAGE_TRACKING 1 301 302 #endif /* _MACHINE_VMPARAM_H_ */ 303 304 #endif /* __i386__ */ 305