1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _VMM_INSTRUCTION_EMUL_H_ 30 #define _VMM_INSTRUCTION_EMUL_H_ 31 32 #include <sys/mman.h> 33 34 /* 35 * Callback functions to read and write memory regions. 36 */ 37 typedef int (*mem_region_read_t)(struct vcpu *vcpu, uint64_t gpa, 38 uint64_t *rval, int rsize, void *arg); 39 40 typedef int (*mem_region_write_t)(struct vcpu *vcpu, uint64_t gpa, 41 uint64_t wval, int wsize, void *arg); 42 43 /* 44 * Emulate the decoded 'vie' instruction. 45 * 46 * The callbacks 'mrr' and 'mrw' emulate reads and writes to the memory region 47 * containing 'gpa'. 'mrarg' is an opaque argument that is passed into the 48 * callback functions. 49 * 50 * 'void *vm' should be 'struct vm *' when called from kernel context and 51 * 'struct vmctx *' when called from user context. 52 * s 53 */ 54 int vmm_emulate_instruction(struct vcpu *vcpu, uint64_t gpa, struct vie *vie, 55 struct vm_guest_paging *paging, mem_region_read_t mrr, 56 mem_region_write_t mrw, void *mrarg); 57 58 int vie_update_register(struct vcpu *vcpu, enum vm_reg_name reg, 59 uint64_t val, int size); 60 61 /* 62 * Returns 1 if an alignment check exception should be injected and 0 otherwise. 63 */ 64 int vie_alignment_check(int cpl, int operand_size, uint64_t cr0, 65 uint64_t rflags, uint64_t gla); 66 67 /* Returns 1 if the 'gla' is not canonical and 0 otherwise. */ 68 int vie_canonical_check(enum vm_cpu_mode cpu_mode, uint64_t gla); 69 70 uint64_t vie_size2mask(int size); 71 72 int vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum vm_reg_name seg, 73 struct seg_desc *desc, uint64_t off, int length, int addrsize, int prot, 74 uint64_t *gla); 75 76 #ifdef _KERNEL 77 /* 78 * APIs to fetch and decode the instruction from nested page fault handler. 79 * 80 * 'vie' must be initialized before calling 'vmm_fetch_instruction()' 81 */ 82 int vmm_fetch_instruction(struct vcpu *vcpu, 83 struct vm_guest_paging *guest_paging, 84 uint64_t rip, int inst_length, struct vie *vie, 85 int *is_fault); 86 87 /* 88 * Translate the guest linear address 'gla' to a guest physical address. 89 * 90 * retval is_fault Interpretation 91 * 0 0 'gpa' contains result of the translation 92 * 0 1 An exception was injected into the guest 93 * EFAULT N/A An unrecoverable hypervisor error occurred 94 */ 95 int vm_gla2gpa(struct vcpu *vcpu, struct vm_guest_paging *paging, 96 uint64_t gla, int prot, uint64_t *gpa, int *is_fault); 97 98 /* 99 * Like vm_gla2gpa, but no exceptions are injected into the guest and 100 * PTEs are not changed. 101 */ 102 int vm_gla2gpa_nofault(struct vcpu *vcpu, struct vm_guest_paging *paging, 103 uint64_t gla, int prot, uint64_t *gpa, int *is_fault); 104 #endif /* _KERNEL */ 105 106 void vie_restart(struct vie *vie); 107 void vie_init(struct vie *vie, const char *inst_bytes, int inst_length); 108 109 /* 110 * Decode the instruction fetched into 'vie' so it can be emulated. 111 * 112 * 'gla' is the guest linear address provided by the hardware assist 113 * that caused the nested page table fault. It is used to verify that 114 * the software instruction decoding is in agreement with the hardware. 115 * 116 * Some hardware assists do not provide the 'gla' to the hypervisor. 117 * To skip the 'gla' verification for this or any other reason pass 118 * in VIE_INVALID_GLA instead. 119 */ 120 #ifdef _KERNEL 121 #define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */ 122 int vmm_decode_instruction(struct vcpu *vcpu, uint64_t gla, 123 enum vm_cpu_mode cpu_mode, int csd, struct vie *vie); 124 #else /* !_KERNEL */ 125 /* 126 * Permit instruction decoding logic to be compiled outside of the kernel for 127 * rapid iteration and validation. No GLA validation is performed, obviously. 128 */ 129 int vmm_decode_instruction(enum vm_cpu_mode cpu_mode, int csd, 130 struct vie *vie); 131 #endif /* _KERNEL */ 132 133 #endif /* _VMM_INSTRUCTION_EMUL_H_ */ 134