xref: /freebsd/sys/amd64/include/vmm_instruction_emul.h (revision d3956e46736ffaee5060c9baf0a40f428bc34ec3)
1ba9b7bf7SNeel Natu /*-
2c49761ddSPedro F. Giffuni  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3c49761ddSPedro F. Giffuni  *
4ba9b7bf7SNeel Natu  * Copyright (c) 2012 NetApp, Inc.
5ba9b7bf7SNeel Natu  * All rights reserved.
6ba9b7bf7SNeel Natu  *
7ba9b7bf7SNeel Natu  * Redistribution and use in source and binary forms, with or without
8ba9b7bf7SNeel Natu  * modification, are permitted provided that the following conditions
9ba9b7bf7SNeel Natu  * are met:
10ba9b7bf7SNeel Natu  * 1. Redistributions of source code must retain the above copyright
11ba9b7bf7SNeel Natu  *    notice, this list of conditions and the following disclaimer.
12ba9b7bf7SNeel Natu  * 2. Redistributions in binary form must reproduce the above copyright
13ba9b7bf7SNeel Natu  *    notice, this list of conditions and the following disclaimer in the
14ba9b7bf7SNeel Natu  *    documentation and/or other materials provided with the distribution.
15ba9b7bf7SNeel Natu  *
16ba9b7bf7SNeel Natu  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17ba9b7bf7SNeel Natu  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18ba9b7bf7SNeel Natu  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ba9b7bf7SNeel Natu  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20ba9b7bf7SNeel Natu  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21ba9b7bf7SNeel Natu  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22ba9b7bf7SNeel Natu  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23ba9b7bf7SNeel Natu  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24ba9b7bf7SNeel Natu  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25ba9b7bf7SNeel Natu  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26ba9b7bf7SNeel Natu  * SUCH DAMAGE.
27ba9b7bf7SNeel Natu  *
28ba9b7bf7SNeel Natu  * $FreeBSD$
29ba9b7bf7SNeel Natu  */
30ba9b7bf7SNeel Natu 
31ba9b7bf7SNeel Natu #ifndef	_VMM_INSTRUCTION_EMUL_H_
32ba9b7bf7SNeel Natu #define	_VMM_INSTRUCTION_EMUL_H_
33ba9b7bf7SNeel Natu 
3465ffa035SNeel Natu #include <sys/mman.h>
3565ffa035SNeel Natu 
36ba9b7bf7SNeel Natu /*
37*d3956e46SJohn Baldwin  * Allow for different arguments to identify vCPUs in userspace vs the
38*d3956e46SJohn Baldwin  * kernel.  Eventually we should add struct vcpu in userland and
39*d3956e46SJohn Baldwin  * always use the kernel arguments removing these macros.
40*d3956e46SJohn Baldwin  */
41*d3956e46SJohn Baldwin #ifdef _KERNEL
42*d3956e46SJohn Baldwin #define	VCPU_DECL	struct vcpu *vcpu
43*d3956e46SJohn Baldwin #define	VCPU_ARGS	vcpu
44*d3956e46SJohn Baldwin #else
45*d3956e46SJohn Baldwin #define	VCPU_DECL	void *vm, int vcpuid
46*d3956e46SJohn Baldwin #define	VCPU_ARGS	vm, vcpuid
47*d3956e46SJohn Baldwin #endif
48*d3956e46SJohn Baldwin 
49*d3956e46SJohn Baldwin /*
50ba9b7bf7SNeel Natu  * Callback functions to read and write memory regions.
51ba9b7bf7SNeel Natu  */
52*d3956e46SJohn Baldwin typedef int (*mem_region_read_t)(VCPU_DECL, uint64_t gpa,
53ba9b7bf7SNeel Natu 				 uint64_t *rval, int rsize, void *arg);
54ba9b7bf7SNeel Natu 
55*d3956e46SJohn Baldwin typedef int (*mem_region_write_t)(VCPU_DECL, uint64_t gpa,
56ba9b7bf7SNeel Natu 				  uint64_t wval, int wsize, void *arg);
57ba9b7bf7SNeel Natu 
58ba9b7bf7SNeel Natu /*
59ba9b7bf7SNeel Natu  * Emulate the decoded 'vie' instruction.
60ba9b7bf7SNeel Natu  *
61ba9b7bf7SNeel Natu  * The callbacks 'mrr' and 'mrw' emulate reads and writes to the memory region
62ba9b7bf7SNeel Natu  * containing 'gpa'. 'mrarg' is an opaque argument that is passed into the
63ba9b7bf7SNeel Natu  * callback functions.
64ba9b7bf7SNeel Natu  *
65ba9b7bf7SNeel Natu  * 'void *vm' should be 'struct vm *' when called from kernel context and
66ba9b7bf7SNeel Natu  * 'struct vmctx *' when called from user context.
67ba9b7bf7SNeel Natu  * s
68ba9b7bf7SNeel Natu  */
69*d3956e46SJohn Baldwin int vmm_emulate_instruction(VCPU_DECL, uint64_t gpa, struct vie *vie,
70d665d229SNeel Natu     struct vm_guest_paging *paging, mem_region_read_t mrr,
71d665d229SNeel Natu     mem_region_write_t mrw, void *mrarg);
72ba9b7bf7SNeel Natu 
73*d3956e46SJohn Baldwin int vie_update_register(VCPU_DECL, enum vm_reg_name reg,
74d17b5104SNeel Natu     uint64_t val, int size);
75d17b5104SNeel Natu 
76a7424861SNeel Natu /*
77a7424861SNeel Natu  * Returns 1 if an alignment check exception should be injected and 0 otherwise.
78a7424861SNeel Natu  */
79a7424861SNeel Natu int vie_alignment_check(int cpl, int operand_size, uint64_t cr0,
80a7424861SNeel Natu     uint64_t rflags, uint64_t gla);
81a7424861SNeel Natu 
82e813a873SNeel Natu /* Returns 1 if the 'gla' is not canonical and 0 otherwise. */
83e813a873SNeel Natu int vie_canonical_check(enum vm_cpu_mode cpu_mode, uint64_t gla);
84e813a873SNeel Natu 
85a7424861SNeel Natu uint64_t vie_size2mask(int size);
86a7424861SNeel Natu 
8765ffa035SNeel Natu int vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum vm_reg_name seg,
8865ffa035SNeel Natu     struct seg_desc *desc, uint64_t off, int length, int addrsize, int prot,
8965ffa035SNeel Natu     uint64_t *gla);
905382c19dSNeel Natu 
91ba9b7bf7SNeel Natu #ifdef _KERNEL
92ba9b7bf7SNeel Natu /*
93ba9b7bf7SNeel Natu  * APIs to fetch and decode the instruction from nested page fault handler.
94318224bbSNeel Natu  *
95318224bbSNeel Natu  * 'vie' must be initialized before calling 'vmm_fetch_instruction()'
96ba9b7bf7SNeel Natu  */
97*d3956e46SJohn Baldwin int vmm_fetch_instruction(struct vcpu *vcpu,
98e813a873SNeel Natu 			  struct vm_guest_paging *guest_paging,
999c4d5478SNeel Natu 			  uint64_t rip, int inst_length, struct vie *vie,
1009c4d5478SNeel Natu 			  int *is_fault);
101ba9b7bf7SNeel Natu 
102fd949af6SNeel Natu /*
103fd949af6SNeel Natu  * Translate the guest linear address 'gla' to a guest physical address.
104fd949af6SNeel Natu  *
1059c4d5478SNeel Natu  * retval	is_fault	Interpretation
1069c4d5478SNeel Natu  *   0		   0		'gpa' contains result of the translation
1079c4d5478SNeel Natu  *   0		   1		An exception was injected into the guest
1089c4d5478SNeel Natu  * EFAULT	  N/A		An unrecoverable hypervisor error occurred
109fd949af6SNeel Natu  */
110*d3956e46SJohn Baldwin int vm_gla2gpa(struct vcpu *vcpu, struct vm_guest_paging *paging,
1119c4d5478SNeel Natu     uint64_t gla, int prot, uint64_t *gpa, int *is_fault);
112fd949af6SNeel Natu 
1135f8754c0SJohn Baldwin /*
1145f8754c0SJohn Baldwin  * Like vm_gla2gpa, but no exceptions are injected into the guest and
1155f8754c0SJohn Baldwin  * PTEs are not changed.
1165f8754c0SJohn Baldwin  */
117*d3956e46SJohn Baldwin int vm_gla2gpa_nofault(struct vcpu *vcpu, struct vm_guest_paging *paging,
1185f8754c0SJohn Baldwin     uint64_t gla, int prot, uint64_t *gpa, int *is_fault);
119b645fd45SConrad Meyer #endif /* _KERNEL */
1205f8754c0SJohn Baldwin 
1214daa95f8SConrad Meyer void vie_restart(struct vie *vie);
122c2a875f9SNeel Natu void vie_init(struct vie *vie, const char *inst_bytes, int inst_length);
123318224bbSNeel Natu 
12466f71b7dSNeel Natu /*
12566f71b7dSNeel Natu  * Decode the instruction fetched into 'vie' so it can be emulated.
12666f71b7dSNeel Natu  *
12766f71b7dSNeel Natu  * 'gla' is the guest linear address provided by the hardware assist
12866f71b7dSNeel Natu  * that caused the nested page table fault. It is used to verify that
12966f71b7dSNeel Natu  * the software instruction decoding is in agreement with the hardware.
13066f71b7dSNeel Natu  *
13166f71b7dSNeel Natu  * Some hardware assists do not provide the 'gla' to the hypervisor.
13266f71b7dSNeel Natu  * To skip the 'gla' verification for this or any other reason pass
13366f71b7dSNeel Natu  * in VIE_INVALID_GLA instead.
13466f71b7dSNeel Natu  */
135b645fd45SConrad Meyer #ifdef _KERNEL
13666f71b7dSNeel Natu #define	VIE_INVALID_GLA		(1UL << 63)	/* a non-canonical address */
137*d3956e46SJohn Baldwin int vmm_decode_instruction(struct vcpu *vcpu, uint64_t gla,
138f7a9f178SNeel Natu 			   enum vm_cpu_mode cpu_mode, int csd, struct vie *vie);
139b645fd45SConrad Meyer #else /* !_KERNEL */
140b645fd45SConrad Meyer /*
141b645fd45SConrad Meyer  * Permit instruction decoding logic to be compiled outside of the kernel for
142b645fd45SConrad Meyer  * rapid iteration and validation.  No GLA validation is performed, obviously.
143b645fd45SConrad Meyer  */
144b645fd45SConrad Meyer int vmm_decode_instruction(enum vm_cpu_mode cpu_mode, int csd,
145b645fd45SConrad Meyer     struct vie *vie);
146ba9b7bf7SNeel Natu #endif	/* _KERNEL */
147ba9b7bf7SNeel Natu 
148ba9b7bf7SNeel Natu #endif	/* _VMM_INSTRUCTION_EMUL_H_ */
149