1ba9b7bf7SNeel Natu /*- 2ba9b7bf7SNeel Natu * Copyright (c) 2012 NetApp, Inc. 3ba9b7bf7SNeel Natu * All rights reserved. 4ba9b7bf7SNeel Natu * 5ba9b7bf7SNeel Natu * Redistribution and use in source and binary forms, with or without 6ba9b7bf7SNeel Natu * modification, are permitted provided that the following conditions 7ba9b7bf7SNeel Natu * are met: 8ba9b7bf7SNeel Natu * 1. Redistributions of source code must retain the above copyright 9ba9b7bf7SNeel Natu * notice, this list of conditions and the following disclaimer. 10ba9b7bf7SNeel Natu * 2. Redistributions in binary form must reproduce the above copyright 11ba9b7bf7SNeel Natu * notice, this list of conditions and the following disclaimer in the 12ba9b7bf7SNeel Natu * documentation and/or other materials provided with the distribution. 13ba9b7bf7SNeel Natu * 14ba9b7bf7SNeel Natu * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15ba9b7bf7SNeel Natu * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16ba9b7bf7SNeel Natu * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17ba9b7bf7SNeel Natu * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18ba9b7bf7SNeel Natu * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19ba9b7bf7SNeel Natu * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20ba9b7bf7SNeel Natu * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21ba9b7bf7SNeel Natu * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22ba9b7bf7SNeel Natu * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23ba9b7bf7SNeel Natu * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24ba9b7bf7SNeel Natu * SUCH DAMAGE. 25ba9b7bf7SNeel Natu * 26ba9b7bf7SNeel Natu * $FreeBSD$ 27ba9b7bf7SNeel Natu */ 28ba9b7bf7SNeel Natu 29ba9b7bf7SNeel Natu #ifndef _VMM_INSTRUCTION_EMUL_H_ 30ba9b7bf7SNeel Natu #define _VMM_INSTRUCTION_EMUL_H_ 31ba9b7bf7SNeel Natu 32ba9b7bf7SNeel Natu /* 33ba9b7bf7SNeel Natu * Callback functions to read and write memory regions. 34ba9b7bf7SNeel Natu */ 35ba9b7bf7SNeel Natu typedef int (*mem_region_read_t)(void *vm, int cpuid, uint64_t gpa, 36ba9b7bf7SNeel Natu uint64_t *rval, int rsize, void *arg); 37ba9b7bf7SNeel Natu 38ba9b7bf7SNeel Natu typedef int (*mem_region_write_t)(void *vm, int cpuid, uint64_t gpa, 39ba9b7bf7SNeel Natu uint64_t wval, int wsize, void *arg); 40ba9b7bf7SNeel Natu 41ba9b7bf7SNeel Natu /* 42ba9b7bf7SNeel Natu * Emulate the decoded 'vie' instruction. 43ba9b7bf7SNeel Natu * 44ba9b7bf7SNeel Natu * The callbacks 'mrr' and 'mrw' emulate reads and writes to the memory region 45ba9b7bf7SNeel Natu * containing 'gpa'. 'mrarg' is an opaque argument that is passed into the 46ba9b7bf7SNeel Natu * callback functions. 47ba9b7bf7SNeel Natu * 48ba9b7bf7SNeel Natu * 'void *vm' should be 'struct vm *' when called from kernel context and 49ba9b7bf7SNeel Natu * 'struct vmctx *' when called from user context. 50ba9b7bf7SNeel Natu * s 51ba9b7bf7SNeel Natu */ 52ba9b7bf7SNeel Natu int vmm_emulate_instruction(void *vm, int cpuid, uint64_t gpa, struct vie *vie, 53ba9b7bf7SNeel Natu mem_region_read_t mrr, mem_region_write_t mrw, 54ba9b7bf7SNeel Natu void *mrarg); 55ba9b7bf7SNeel Natu 56d17b5104SNeel Natu int vie_update_register(void *vm, int vcpuid, enum vm_reg_name reg, 57d17b5104SNeel Natu uint64_t val, int size); 58d17b5104SNeel Natu 59a7424861SNeel Natu /* 60a7424861SNeel Natu * Returns 1 if an alignment check exception should be injected and 0 otherwise. 61a7424861SNeel Natu */ 62a7424861SNeel Natu int vie_alignment_check(int cpl, int operand_size, uint64_t cr0, 63a7424861SNeel Natu uint64_t rflags, uint64_t gla); 64a7424861SNeel Natu 65e813a873SNeel Natu /* Returns 1 if the 'gla' is not canonical and 0 otherwise. */ 66e813a873SNeel Natu int vie_canonical_check(enum vm_cpu_mode cpu_mode, uint64_t gla); 67e813a873SNeel Natu 68a7424861SNeel Natu uint64_t vie_size2mask(int size); 69a7424861SNeel Natu 70*5382c19dSNeel Natu int vie_calculate_gla(enum vm_cpu_mode cpu_mode, int addrsize, 71*5382c19dSNeel Natu enum vm_reg_name seg, struct seg_desc *desc, uint64_t off, uint64_t *gla); 72*5382c19dSNeel Natu 73ba9b7bf7SNeel Natu #ifdef _KERNEL 74ba9b7bf7SNeel Natu /* 75ba9b7bf7SNeel Natu * APIs to fetch and decode the instruction from nested page fault handler. 76318224bbSNeel Natu * 77318224bbSNeel Natu * 'vie' must be initialized before calling 'vmm_fetch_instruction()' 78ba9b7bf7SNeel Natu */ 79ba9b7bf7SNeel Natu int vmm_fetch_instruction(struct vm *vm, int cpuid, 80e813a873SNeel Natu struct vm_guest_paging *guest_paging, 81e813a873SNeel Natu uint64_t rip, int inst_length, struct vie *vie); 82ba9b7bf7SNeel Natu 83fd949af6SNeel Natu /* 84fd949af6SNeel Natu * Translate the guest linear address 'gla' to a guest physical address. 85fd949af6SNeel Natu * 86fd949af6SNeel Natu * Returns 0 on success and '*gpa' contains the result of the translation. 87e813a873SNeel Natu * Returns 1 if an exception was injected into the guest. 88fd949af6SNeel Natu * Returns -1 otherwise. 89fd949af6SNeel Natu */ 90e813a873SNeel Natu int vmm_gla2gpa(struct vm *vm, int vcpuid, struct vm_guest_paging *paging, 91e813a873SNeel Natu uint64_t gla, int prot, uint64_t *gpa); 92fd949af6SNeel Natu 93318224bbSNeel Natu void vie_init(struct vie *vie); 94318224bbSNeel Natu 9566f71b7dSNeel Natu /* 9666f71b7dSNeel Natu * Decode the instruction fetched into 'vie' so it can be emulated. 9766f71b7dSNeel Natu * 9866f71b7dSNeel Natu * 'gla' is the guest linear address provided by the hardware assist 9966f71b7dSNeel Natu * that caused the nested page table fault. It is used to verify that 10066f71b7dSNeel Natu * the software instruction decoding is in agreement with the hardware. 10166f71b7dSNeel Natu * 10266f71b7dSNeel Natu * Some hardware assists do not provide the 'gla' to the hypervisor. 10366f71b7dSNeel Natu * To skip the 'gla' verification for this or any other reason pass 10466f71b7dSNeel Natu * in VIE_INVALID_GLA instead. 10566f71b7dSNeel Natu */ 10666f71b7dSNeel Natu #define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */ 10700f3efe1SJohn Baldwin int vmm_decode_instruction(struct vm *vm, int cpuid, uint64_t gla, 108e813a873SNeel Natu enum vm_cpu_mode cpu_mode, struct vie *vie); 109ba9b7bf7SNeel Natu #endif /* _KERNEL */ 110ba9b7bf7SNeel Natu 111ba9b7bf7SNeel Natu #endif /* _VMM_INSTRUCTION_EMUL_H_ */ 112