1ba9b7bf7SNeel Natu /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3c49761ddSPedro F. Giffuni * 4ba9b7bf7SNeel Natu * Copyright (c) 2012 NetApp, Inc. 5ba9b7bf7SNeel Natu * All rights reserved. 6ba9b7bf7SNeel Natu * 7ba9b7bf7SNeel Natu * Redistribution and use in source and binary forms, with or without 8ba9b7bf7SNeel Natu * modification, are permitted provided that the following conditions 9ba9b7bf7SNeel Natu * are met: 10ba9b7bf7SNeel Natu * 1. Redistributions of source code must retain the above copyright 11ba9b7bf7SNeel Natu * notice, this list of conditions and the following disclaimer. 12ba9b7bf7SNeel Natu * 2. Redistributions in binary form must reproduce the above copyright 13ba9b7bf7SNeel Natu * notice, this list of conditions and the following disclaimer in the 14ba9b7bf7SNeel Natu * documentation and/or other materials provided with the distribution. 15ba9b7bf7SNeel Natu * 16ba9b7bf7SNeel Natu * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17ba9b7bf7SNeel Natu * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18ba9b7bf7SNeel Natu * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19ba9b7bf7SNeel Natu * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20ba9b7bf7SNeel Natu * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21ba9b7bf7SNeel Natu * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22ba9b7bf7SNeel Natu * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23ba9b7bf7SNeel Natu * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24ba9b7bf7SNeel Natu * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25ba9b7bf7SNeel Natu * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26ba9b7bf7SNeel Natu * SUCH DAMAGE. 27ba9b7bf7SNeel Natu */ 28ba9b7bf7SNeel Natu 29ba9b7bf7SNeel Natu #ifndef _VMM_INSTRUCTION_EMUL_H_ 30ba9b7bf7SNeel Natu #define _VMM_INSTRUCTION_EMUL_H_ 31ba9b7bf7SNeel Natu 3265ffa035SNeel Natu #include <sys/mman.h> 3365ffa035SNeel Natu 34ba9b7bf7SNeel Natu /* 35ba9b7bf7SNeel Natu * Callback functions to read and write memory regions. 36ba9b7bf7SNeel Natu */ 377d9ef309SJohn Baldwin typedef int (*mem_region_read_t)(struct vcpu *vcpu, uint64_t gpa, 38ba9b7bf7SNeel Natu uint64_t *rval, int rsize, void *arg); 39ba9b7bf7SNeel Natu 407d9ef309SJohn Baldwin typedef int (*mem_region_write_t)(struct vcpu *vcpu, uint64_t gpa, 41ba9b7bf7SNeel Natu uint64_t wval, int wsize, void *arg); 42ba9b7bf7SNeel Natu 43ba9b7bf7SNeel Natu /* 44ba9b7bf7SNeel Natu * Emulate the decoded 'vie' instruction. 45ba9b7bf7SNeel Natu * 46ba9b7bf7SNeel Natu * The callbacks 'mrr' and 'mrw' emulate reads and writes to the memory region 47ba9b7bf7SNeel Natu * containing 'gpa'. 'mrarg' is an opaque argument that is passed into the 48ba9b7bf7SNeel Natu * callback functions. 49ba9b7bf7SNeel Natu * 50ba9b7bf7SNeel Natu * 'void *vm' should be 'struct vm *' when called from kernel context and 51ba9b7bf7SNeel Natu * 'struct vmctx *' when called from user context. 52ba9b7bf7SNeel Natu * s 53ba9b7bf7SNeel Natu */ 547d9ef309SJohn Baldwin int vmm_emulate_instruction(struct vcpu *vcpu, uint64_t gpa, struct vie *vie, 55d665d229SNeel Natu struct vm_guest_paging *paging, mem_region_read_t mrr, 56d665d229SNeel Natu mem_region_write_t mrw, void *mrarg); 57ba9b7bf7SNeel Natu 587d9ef309SJohn Baldwin int vie_update_register(struct vcpu *vcpu, enum vm_reg_name reg, 59d17b5104SNeel Natu uint64_t val, int size); 60d17b5104SNeel Natu 61a7424861SNeel Natu /* 62a7424861SNeel Natu * Returns 1 if an alignment check exception should be injected and 0 otherwise. 63a7424861SNeel Natu */ 64a7424861SNeel Natu int vie_alignment_check(int cpl, int operand_size, uint64_t cr0, 65a7424861SNeel Natu uint64_t rflags, uint64_t gla); 66a7424861SNeel Natu 67e813a873SNeel Natu /* Returns 1 if the 'gla' is not canonical and 0 otherwise. */ 68e813a873SNeel Natu int vie_canonical_check(enum vm_cpu_mode cpu_mode, uint64_t gla); 69e813a873SNeel Natu 70a7424861SNeel Natu uint64_t vie_size2mask(int size); 71a7424861SNeel Natu 7265ffa035SNeel Natu int vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum vm_reg_name seg, 7365ffa035SNeel Natu struct seg_desc *desc, uint64_t off, int length, int addrsize, int prot, 7465ffa035SNeel Natu uint64_t *gla); 755382c19dSNeel Natu 76ba9b7bf7SNeel Natu #ifdef _KERNEL 77ba9b7bf7SNeel Natu /* 78ba9b7bf7SNeel Natu * APIs to fetch and decode the instruction from nested page fault handler. 79318224bbSNeel Natu * 80318224bbSNeel Natu * 'vie' must be initialized before calling 'vmm_fetch_instruction()' 81ba9b7bf7SNeel Natu */ 82d3956e46SJohn Baldwin int vmm_fetch_instruction(struct vcpu *vcpu, 83e813a873SNeel Natu struct vm_guest_paging *guest_paging, 849c4d5478SNeel Natu uint64_t rip, int inst_length, struct vie *vie, 859c4d5478SNeel Natu int *is_fault); 86ba9b7bf7SNeel Natu 87fd949af6SNeel Natu /* 88fd949af6SNeel Natu * Translate the guest linear address 'gla' to a guest physical address. 89fd949af6SNeel Natu * 909c4d5478SNeel Natu * retval is_fault Interpretation 919c4d5478SNeel Natu * 0 0 'gpa' contains result of the translation 929c4d5478SNeel Natu * 0 1 An exception was injected into the guest 939c4d5478SNeel Natu * EFAULT N/A An unrecoverable hypervisor error occurred 94fd949af6SNeel Natu */ 95d3956e46SJohn Baldwin int vm_gla2gpa(struct vcpu *vcpu, struct vm_guest_paging *paging, 969c4d5478SNeel Natu uint64_t gla, int prot, uint64_t *gpa, int *is_fault); 97fd949af6SNeel Natu 985f8754c0SJohn Baldwin /* 995f8754c0SJohn Baldwin * Like vm_gla2gpa, but no exceptions are injected into the guest and 1005f8754c0SJohn Baldwin * PTEs are not changed. 1015f8754c0SJohn Baldwin */ 102d3956e46SJohn Baldwin int vm_gla2gpa_nofault(struct vcpu *vcpu, struct vm_guest_paging *paging, 1035f8754c0SJohn Baldwin uint64_t gla, int prot, uint64_t *gpa, int *is_fault); 104b645fd45SConrad Meyer #endif /* _KERNEL */ 1055f8754c0SJohn Baldwin 1064daa95f8SConrad Meyer void vie_restart(struct vie *vie); 107c2a875f9SNeel Natu void vie_init(struct vie *vie, const char *inst_bytes, int inst_length); 108318224bbSNeel Natu 10966f71b7dSNeel Natu /* 11066f71b7dSNeel Natu * Decode the instruction fetched into 'vie' so it can be emulated. 11166f71b7dSNeel Natu * 11266f71b7dSNeel Natu * 'gla' is the guest linear address provided by the hardware assist 11366f71b7dSNeel Natu * that caused the nested page table fault. It is used to verify that 11466f71b7dSNeel Natu * the software instruction decoding is in agreement with the hardware. 11566f71b7dSNeel Natu * 11666f71b7dSNeel Natu * Some hardware assists do not provide the 'gla' to the hypervisor. 11766f71b7dSNeel Natu * To skip the 'gla' verification for this or any other reason pass 11866f71b7dSNeel Natu * in VIE_INVALID_GLA instead. 11966f71b7dSNeel Natu */ 120b645fd45SConrad Meyer #ifdef _KERNEL 12166f71b7dSNeel Natu #define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */ 122d3956e46SJohn Baldwin int vmm_decode_instruction(struct vcpu *vcpu, uint64_t gla, 123f7a9f178SNeel Natu enum vm_cpu_mode cpu_mode, int csd, struct vie *vie); 124b645fd45SConrad Meyer #else /* !_KERNEL */ 125b645fd45SConrad Meyer /* 126b645fd45SConrad Meyer * Permit instruction decoding logic to be compiled outside of the kernel for 127b645fd45SConrad Meyer * rapid iteration and validation. No GLA validation is performed, obviously. 128b645fd45SConrad Meyer */ 129b645fd45SConrad Meyer int vmm_decode_instruction(enum vm_cpu_mode cpu_mode, int csd, 130b645fd45SConrad Meyer struct vie *vie); 131ba9b7bf7SNeel Natu #endif /* _KERNEL */ 132ba9b7bf7SNeel Natu 133ba9b7bf7SNeel Natu #endif /* _VMM_INSTRUCTION_EMUL_H_ */ 134